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src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

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@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, 2019, Red Hat Inc. All rights reserved.
+ * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 only, as
  * published by the Free Software Foundation.

@@ -168,14 +168,17 @@
   void build_frame(int framesize);
   void remove_frame(int framesize);
 
   virtual void _call_Unimplemented(address call_site) {
     mov(rscratch2, call_site);
+    haltsim();
   }
 
 #define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__)
 
+  virtual void notify(int type);
+
   // aliases defined in AARCH64 spec
 
   template<class T>
   inline void cmpw(Register Rd, T imm)  { subsw(zr, Rd, imm); }
 

@@ -783,12 +786,10 @@
   void resolve_jobject(Register value, Register thread, Register tmp);
 
   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
   void c2bool(Register x);
 
-  void load_method_holder(Register holder, Register method);
-
   // oop manipulations
   void load_klass(Register dst, Register src);
   void store_klass(Register dst, Register src);
   void cmp_klass(Register oop, Register trial_klass, Register tmp);
 

@@ -923,15 +924,10 @@
   void check_klass_subtype(Register sub_klass,
                            Register super_klass,
                            Register temp_reg,
                            Label& L_success);
 
-  void clinit_barrier(Register klass,
-                      Register thread,
-                      Label* L_fast_path = NULL,
-                      Label* L_slow_path = NULL);
-
   Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
 
 
   // Debugging
 

@@ -1180,10 +1176,32 @@
   // bootstraps into the generated ARM code which directly follows the
   // stub
   //
 
   public:
+  // enum used for aarch64--x86 linkage to define return type of x86 function
+  enum ret_type { ret_type_void, ret_type_integral, ret_type_float, ret_type_double};
+
+#ifdef BUILTIN_SIM
+  void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type, address *prolog_ptr = NULL);
+#else
+  void c_stub_prolog(int gp_arg_count, int fp_arg_count, int ret_type) { }
+#endif
+
+  // special version of call_VM_leaf_base needed for aarch64 simulator
+  // where we need to specify both the gp and fp arg counts and the
+  // return type so that the linkage routine from aarch64 to x86 and
+  // back knows which aarch64 registers to copy to x86 registers and
+  // which x86 result register to copy back to an aarch64 register
+
+  void call_VM_leaf_base1(
+    address  entry_point,             // the entry point
+    int      number_of_gp_arguments,  // the number of gp reg arguments to pass
+    int      number_of_fp_arguments,  // the number of fp reg arguments to pass
+    ret_type type,                    // the return type for the call
+    Label*   retaddr = NULL
+  );
 
   void ldr_constant(Register dest, const Address &const_addr) {
     if (NearCpool) {
       ldr(dest, const_addr);
     } else {

@@ -1342,13 +1360,10 @@
       spill(tmp1, true, dst_offset);
       unspill(tmp1, true, src_offset+8);
       spill(tmp1, true, dst_offset+8);
     }
   }
-
-  void cache_wb(Address line);
-  void cache_wbsync(bool is_pre);
 };
 
 #ifdef ASSERT
 inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
 #endif
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