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src/hotspot/cpu/aarch64/macroAssembler_aarch64_log.cpp

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*** 284,294 **** bind(CHECKED_CORNER_CASES); // all corner cases are handled frecpe(vtmp5, vtmp5, S); // vtmp5 ~= 1/vtmp5 lsr(tmp2, rscratch1, 48); movz(tmp4, 0x77f0, 48); ! fmovd(vtmp4, 1.0); movz(tmp1, INF_OR_NAN_PREFIX, 48); bfm(tmp4, rscratch1, 0, 51); // tmp4 = 0x77F0 << 48 | mantissa(X) // vtmp1 = AS_DOUBLE_BITS(0x77F0 << 48 | mantissa(X)) == mx fmovd(vtmp1, tmp4); subw(tmp2, tmp2, 16); --- 284,294 ---- bind(CHECKED_CORNER_CASES); // all corner cases are handled frecpe(vtmp5, vtmp5, S); // vtmp5 ~= 1/vtmp5 lsr(tmp2, rscratch1, 48); movz(tmp4, 0x77f0, 48); ! fmovd(vtmp4, 1.0d); movz(tmp1, INF_OR_NAN_PREFIX, 48); bfm(tmp4, rscratch1, 0, 51); // tmp4 = 0x77F0 << 48 | mantissa(X) // vtmp1 = AS_DOUBLE_BITS(0x77F0 << 48 | mantissa(X)) == mx fmovd(vtmp1, tmp4); subw(tmp2, tmp2, 16);
*** 356,365 **** br(LE, RETURN_MINF_OR_NAN); cmp(rscratch1, tmp1); br(GE, DONE); cmp(rscratch1, tmp2); br(NE, CHECKED_CORNER_CASES); ! fmovd(v0, 0.0); } bind(DONE); ret(lr); } --- 356,365 ---- br(LE, RETURN_MINF_OR_NAN); cmp(rscratch1, tmp1); br(GE, DONE); cmp(rscratch1, tmp2); br(NE, CHECKED_CORNER_CASES); ! fmovd(v0, 0.0d); } bind(DONE); ret(lr); }
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