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src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp

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@@ -69,11 +69,10 @@
     }
 #endif
 
     if (ShenandoahSATBBarrier && !dest_uninitialized && !ShenandoahHeap::heap()->heuristics()->can_do_traversal_gc()) {
       Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
-      assert_different_registers(dst, count, thread); // we don't care about src here?
 #ifndef _LP64
       __ push(thread);
       __ get_thread(thread);
 #endif
 

@@ -143,12 +142,10 @@
       __ mov(dst, rdx); // restore 'to'
     }
 #endif
 
     Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
-    assert_different_registers(dst, thread); // do we care about src at all here?
-
 #ifndef _LP64
     __ push(thread);
     __ get_thread(thread);
 #endif
 

@@ -341,11 +338,11 @@
   // - Invert the result back, and copy to dst
 
   bool borrow_reg = (tmp == noreg);
   if (borrow_reg) {
     // No free registers available. Make one useful.
-    tmp = LP64_ONLY(rscratch1) NOT_LP64(rdx);
+    tmp = rscratch1;
     __ push(tmp);
   }
 
   Label done;
   __ movptr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));

@@ -363,26 +360,14 @@
 }
 
 
 void ShenandoahBarrierSetAssembler::load_reference_barrier_not_null(MacroAssembler* masm, Register dst) {
   assert(ShenandoahLoadRefBarrier, "Should be enabled");
-
-  Label done;
-
 #ifdef _LP64
-  Register thread = r15_thread;
-#else
-  Register thread = rcx;
-  if (thread == dst) {
-    thread = rbx;
-  }
-  __ push(thread);
-  __ get_thread(thread);
-#endif
-  assert_different_registers(dst, thread);
+  Label done;
 
-  Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
+  Address gc_state(r15_thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
   __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);
   __ jccb(Assembler::zero, done);
 
    if (dst != rax) {
      __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.

@@ -393,13 +378,12 @@
    if (dst != rax) {
      __ xchgptr(rax, dst); // Swap back obj with rax.
    }
 
   __ bind(done);
-
-#ifndef _LP64
-  __ pop(thread);
+#else
+  Unimplemented();
 #endif
 }
 
 void ShenandoahBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {
   if (ShenandoahStoreValEnqueueBarrier) {

@@ -410,38 +394,28 @@
 void ShenandoahBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
   assert(ShenandoahStoreValEnqueueBarrier, "should be enabled");
 
   if (dst == noreg) return;
 
+#ifdef _LP64
   if (ShenandoahStoreValEnqueueBarrier) {
     // The set of registers to be saved+restored is the same as in the write-barrier above.
     // Those are the commonly used registers in the interpreter.
     __ pusha();
     // __ push_callee_saved_registers();
     __ subptr(rsp, 2 * Interpreter::stackElementSize);
     __ movdbl(Address(rsp, 0), xmm0);
 
-#ifdef _LP64
-    Register thread = r15_thread;
-#else
-    Register thread = rcx;
-    if (thread == dst || thread == tmp) {
-      thread = rdi;
-    }
-    if (thread == dst || thread == tmp) {
-      thread = rbx;
-    }
-    __ get_thread(thread);
-#endif
-    assert_different_registers(dst, tmp, thread);
-
-    satb_write_barrier_pre(masm, noreg, dst, thread, tmp, true, false);
+    satb_write_barrier_pre(masm, noreg, dst, r15_thread, tmp, true, false);
     __ movdbl(xmm0, Address(rsp, 0));
     __ addptr(rsp, 2 * Interpreter::stackElementSize);
     //__ pop_callee_saved_registers();
     __ popa();
   }
+#else
+  Unimplemented();
+#endif
 }
 
 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst) {
   if (ShenandoahLoadRefBarrier) {
     Label done;

@@ -462,11 +436,10 @@
   if (on_oop) {
     load_reference_barrier(masm, dst);
 
     if (ShenandoahKeepAliveBarrier && on_reference) {
       const Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
-      assert_different_registers(dst, tmp1, tmp_thread);
       NOT_LP64(__ get_thread(thread));
       // Generate the SATB pre-barrier code to log the value of
       // the referent field in an SATB buffer.
       shenandoah_write_barrier_pre(masm /* masm */,
                                    noreg /* obj */,

@@ -498,18 +471,17 @@
       }
     } else {
       __ lea(tmp1, dst);
     }
 
-    assert_different_registers(val, tmp1, tmp2, tmp3, rthread);
-
 #ifndef _LP64
-    __ get_thread(rthread);
     InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
-    imasm->save_bcp();
 #endif
 
+    NOT_LP64(__ get_thread(rcx));
+    NOT_LP64(imasm->save_bcp());
+
     if (needs_pre_barrier) {
       shenandoah_write_barrier_pre(masm /*masm*/,
                                    tmp1 /* obj */,
                                    tmp2 /* pre_val */,
                                    rthread /* thread */,

@@ -529,37 +501,39 @@
   }
 }
 
 // Special Shenandoah CAS implementation that handles false negatives
 // due to concurrent evacuation.
+#ifndef _LP64
+void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
+                                                Register res, Address addr, Register oldval, Register newval,
+                                                bool exchange, Register tmp1, Register tmp2) {
+  // Shenandoah has no 32-bit version for this.
+  Unimplemented();
+}
+#else
 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
                                                 Register res, Address addr, Register oldval, Register newval,
                                                 bool exchange, Register tmp1, Register tmp2) {
   assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
   assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
 
   Label retry, done;
 
   // Remember oldval for retry logic below
-#ifdef _LP64
   if (UseCompressedOops) {
     __ movl(tmp1, oldval);
-  } else
-#endif
-  {
+  } else {
     __ movptr(tmp1, oldval);
   }
 
   // Step 1. Try to CAS with given arguments. If successful, then we are done,
   // and can safely return.
   if (os::is_MP()) __ lock();
-#ifdef _LP64
   if (UseCompressedOops) {
     __ cmpxchgl(newval, addr);
-  } else
-#endif
-  {
+  } else {
     __ cmpxchgptr(newval, addr);
   }
   __ jcc(Assembler::equal, done, true);
 
   // Step 2. CAS had failed. This may be a false negative.

@@ -567,24 +541,19 @@
   // The trouble comes when we compare the to-space pointer with the from-space
   // pointer to the same object. To resolve this, it will suffice to resolve both
   // oldval and the value from memory -- this will give both to-space pointers.
   // If they mismatch, then it was a legitimate failure.
   //
-#ifdef _LP64
   if (UseCompressedOops) {
     __ decode_heap_oop(tmp1);
   }
-#endif
   resolve_forward_pointer(masm, tmp1);
 
-#ifdef _LP64
   if (UseCompressedOops) {
     __ movl(tmp2, oldval);
     __ decode_heap_oop(tmp2);
-  } else
-#endif
-  {
+  } else {
     __ movptr(tmp2, oldval);
   }
   resolve_forward_pointer(masm, tmp2);
 
   __ cmpptr(tmp1, tmp2);

@@ -596,27 +565,21 @@
   // to memory while we were preparing for retry. Therefore, we can fail again
   // on retry, and so need to do this in loop, always resolving the failure
   // witness.
   __ bind(retry);
   if (os::is_MP()) __ lock();
-#ifdef _LP64
   if (UseCompressedOops) {
     __ cmpxchgl(newval, addr);
-  } else
-#endif
-  {
+  } else {
     __ cmpxchgptr(newval, addr);
   }
   __ jcc(Assembler::equal, done, true);
 
-#ifdef _LP64
   if (UseCompressedOops) {
     __ movl(tmp2, oldval);
     __ decode_heap_oop(tmp2);
-  } else
-#endif
-  {
+  } else {
     __ movptr(tmp2, oldval);
   }
   resolve_forward_pointer(masm, tmp2);
 
   __ cmpptr(tmp1, tmp2);

@@ -626,25 +589,15 @@
   // and promote the result. Note that we handle the flag from both the CAS
   // itself and from the retry loop.
   __ bind(done);
   if (!exchange) {
     assert(res != NULL, "need result register");
-#ifdef _LP64
     __ setb(Assembler::equal, res);
     __ movzbl(res, res);
-#else
-    // Need something else to clean the result, because some registers
-    // do not have byte encoding that movzbl wants. Cannot do the xor first,
-    // because it modifies the flags.
-    Label res_non_zero;
-    __ movptr(res, 1);
-    __ jcc(Assembler::equal, res_non_zero, true);
-    __ xorptr(res, res);
-    __ bind(res_non_zero);
-#endif
   }
 }
+#endif // LP64
 
 void ShenandoahBarrierSetAssembler::save_vector_registers(MacroAssembler* masm) {
   int num_xmm_regs = LP64_ONLY(16) NOT_LP64(8);
   if (UseAVX > 2) {
     num_xmm_regs = LP64_ONLY(32) NOT_LP64(8);

@@ -873,100 +826,94 @@
 address ShenandoahBarrierSetAssembler::generate_shenandoah_lrb(StubCodeGenerator* cgen) {
   __ align(CodeEntryAlignment);
   StubCodeMark mark(cgen, "StubRoutines", "shenandoah_lrb");
   address start = __ pc();
 
+#ifdef _LP64
   Label resolve_oop, slow_path;
 
   // We use RDI, which also serves as argument register for slow call.
   // RAX always holds the src object ptr, except after the slow call and
-  // the cmpxchg, then it holds the result. R8/RBX is used as temporary register.
-
-  Register tmp1 = rdi;
-  Register tmp2 = LP64_ONLY(r8) NOT_LP64(rbx);
-
-  __ push(tmp1);
-  __ push(tmp2);
+  // the cmpxchg, then it holds the result.
+  // R8 and RCX are used as temporary registers.
+  __ push(rdi);
+  __ push(r8);
 
-  // Check for object being in the collection set.
+  // Check for object beeing in the collection set.
   // TODO: Can we use only 1 register here?
   // The source object arrives here in rax.
   // live: rax
-  // live: tmp1
-  __ mov(tmp1, rax);
-  __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
-  // live: tmp2
-  __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
-  __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
-  // unlive: tmp1
-  __ testbool(tmp2);
-  // unlive: tmp2
+  // live: rdi
+  __ mov(rdi, rax);
+  __ shrptr(rdi, ShenandoahHeapRegion::region_size_bytes_shift_jint());
+  // live: r8
+  __ movptr(r8, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
+  __ movbool(r8, Address(r8, rdi, Address::times_1));
+  // unlive: rdi
+  __ testbool(r8);
+  // unlive: r8
   __ jccb(Assembler::notZero, resolve_oop);
 
-  __ pop(tmp2);
-  __ pop(tmp1);
+  __ pop(r8);
+  __ pop(rdi);
   __ ret(0);
 
   __ bind(resolve_oop);
 
-  __ movptr(tmp2, Address(rax, oopDesc::mark_offset_in_bytes()));
+  __ movptr(r8, Address(rax, oopDesc::mark_offset_in_bytes()));
   // Test if both lowest bits are set. We trick it by negating the bits
   // then test for both bits clear.
-  __ notptr(tmp2);
-  __ testb(tmp2, markOopDesc::marked_value);
+  __ notptr(r8);
+  __ testb(r8, markOopDesc::marked_value);
   __ jccb(Assembler::notZero, slow_path);
   // Clear both lower bits. It's still inverted, so set them, and then invert back.
-  __ orptr(tmp2, markOopDesc::marked_value);
-  __ notptr(tmp2);
-  // At this point, tmp2 contains the decoded forwarding pointer.
-  __ mov(rax, tmp2);
+  __ orptr(r8, markOopDesc::marked_value);
+  __ notptr(r8);
+  // At this point, r8 contains the decoded forwarding pointer.
+  __ mov(rax, r8);
 
-  __ pop(tmp2);
-  __ pop(tmp1);
+  __ pop(r8);
+  __ pop(rdi);
   __ ret(0);
 
   __ bind(slow_path);
 
   __ push(rcx);
   __ push(rdx);
   __ push(rdi);
   __ push(rsi);
-#ifdef _LP64
   __ push(r8);
   __ push(r9);
   __ push(r10);
   __ push(r11);
   __ push(r12);
   __ push(r13);
   __ push(r14);
   __ push(r15);
-#endif
-
   save_vector_registers(cgen->assembler());
   __ movptr(rdi, rax);
   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_JRT), rdi);
   restore_vector_registers(cgen->assembler());
-
-#ifdef _LP64
   __ pop(r15);
   __ pop(r14);
   __ pop(r13);
   __ pop(r12);
   __ pop(r11);
   __ pop(r10);
   __ pop(r9);
   __ pop(r8);
-#endif
   __ pop(rsi);
   __ pop(rdi);
   __ pop(rdx);
   __ pop(rcx);
 
-  __ pop(tmp2);
-  __ pop(tmp1);
+  __ pop(r8);
+  __ pop(rdi);
   __ ret(0);
-
+#else
+  ShouldNotReachHere();
+#endif
   return start;
 }
 
 #undef __
 
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