1 /*
  2 * Copyright (c) 2025-2026, Oracle and/or its affiliates. All rights reserved.
  3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4 *
  5 * This code is free software; you can redistribute it and/or modify it
  6 * under the terms of the GNU General Public License version 2 only, as
  7 * published by the Free Software Foundation.  Oracle designates this
  8 * particular file as subject to the "Classpath" exception as provided
  9 * by Oracle in the LICENSE file that accompanied this code.
 10 *
 11 * This code is distributed in the hope that it will be useful, but WITHOUT
 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14 * version 2 for more details (a copy is included in the LICENSE file that
 15 * accompanied this code).
 16 *
 17 * You should have received a copy of the GNU General Public License version
 18 * 2 along with this work; if not, write to the Free Software Foundation,
 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20 *
 21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22 * or visit www.oracle.com if you need additional information or have any
 23 * questions.
 24 */
 25 /*
 26 You probably should not edit this this file!!!
 27 It was auto generated 2026-11-09 13:29:58.342 by hat.FFIConfigCreator
 28 */
 29 #pragma once
 30 
 31 #include <iostream>
 32 
 33 struct BasicConfig{
 34     static constexpr int MINIMIZE_COPIES_BIT              = 1<<0x6;
 35     static constexpr int TRACE_BIT                        = 1<<0x7;
 36     static constexpr int PROFILE_BIT                      = 1<<0x8;
 37     static constexpr int SHOW_CODE_BIT                    = 1<<0x9;
 38     static constexpr int SHOW_KERNEL_MODEL_BIT            = 1<<0xa;
 39     static constexpr int SHOW_COMPUTE_MODEL_BIT           = 1<<0xb;
 40     static constexpr int SHOW_DEVICE_INFO_BIT             = 1<<0xc;
 41     static constexpr int INFO_BIT                         = 1<<0xd;
 42     static constexpr int WARN_BIT                         = 1<<0xe;
 43     static constexpr int UNIT_BIT                         = 1<<0xf;
 44     static constexpr int TRACE_COPIES_BIT                 = 1<<0x10;
 45     static constexpr int TRACE_SKIPPED_COPIES_BIT         = 1<<0x11;
 46     static constexpr int TRACE_ENQUEUES_BIT               = 1<<0x12;
 47     static constexpr int TRACE_CALLS_BIT                  = 1<<0x13;
 48     static constexpr int SHOW_WHY_BIT                     = 1<<0x14;
 49     static constexpr int SHOW_STATE_BIT                   = 1<<0x15;
 50     static constexpr int PTX_BIT                          = 1<<0x16;
 51     static constexpr int INTERPRET_BIT                    = 1<<0x17;
 52     static constexpr int HEADLESS_BIT                     = 1<<0x18;
 53     static constexpr int SHOW_LOWERED_KERNEL_MODEL_BIT    = 1<<0x19;
 54     static constexpr int SHOW_COMPILATION_PHASES_BIT      = 1<<0x1a;
 55     static constexpr int SHOW_COMPUTE_MODEL_JAVA_CODE_BIT = 1<<0x1b;
 56     static constexpr int CHECK_SSA_LOWERING_BIT           = 1<<0x1c;
 57     static constexpr int CUDA_NVCC_BIT                    = 1<<0x1d;
 58     static constexpr int CUDA_NVRTC_BIT                   = 1<<0x1e;
 59     static constexpr int OUT_OF_ORDER_BIT                 = 1<<0x1f;
 60     const static char *bitNames[]; // See below for initialization
 61     const static char *bitDescriptions[]; // See below for initialization
 62     int configBits;
 63     bool minimizeCopies;
 64     bool trace;
 65     bool profile;
 66     bool showCode;
 67     bool showKernelModel;
 68     bool showComputeModel;
 69     bool showDeviceInfo;
 70     bool info;
 71     bool warn;
 72     bool unit;
 73     bool traceCopies;
 74     bool traceSkippedCopies;
 75     bool traceEnqueues;
 76     bool traceCalls;
 77     bool showWhy;
 78     bool showState;
 79     bool ptx;
 80     bool interpret;
 81     bool headless;
 82     bool showLoweredKernelModel;
 83     bool showCompilationPhases;
 84     bool showComputeModelJavaCode;
 85     bool checkSsaLowering;
 86     bool cudaNvcc;
 87     bool cudaNvrtc;
 88     bool outOfOrder;
 89     int platform;
 90     int device;
 91     bool alwaysCopy;
 92     explicit BasicConfig(int configBits):
 93         configBits(configBits),
 94         minimizeCopies((configBits & MINIMIZE_COPIES_BIT)==MINIMIZE_COPIES_BIT),
 95         trace((configBits & TRACE_BIT)==TRACE_BIT),
 96         profile((configBits & PROFILE_BIT)==PROFILE_BIT),
 97         showCode((configBits & SHOW_CODE_BIT)==SHOW_CODE_BIT),
 98         showKernelModel((configBits & SHOW_KERNEL_MODEL_BIT)==SHOW_KERNEL_MODEL_BIT),
 99         showComputeModel((configBits & SHOW_COMPUTE_MODEL_BIT)==SHOW_COMPUTE_MODEL_BIT),
100         showDeviceInfo((configBits & SHOW_DEVICE_INFO_BIT)==SHOW_DEVICE_INFO_BIT),
101         info((configBits & INFO_BIT)==INFO_BIT),
102         warn((configBits & WARN_BIT)==WARN_BIT),
103         unit((configBits & UNIT_BIT)==UNIT_BIT),
104         traceCopies((configBits & TRACE_COPIES_BIT)==TRACE_COPIES_BIT),
105         traceSkippedCopies((configBits & TRACE_SKIPPED_COPIES_BIT)==TRACE_SKIPPED_COPIES_BIT),
106         traceEnqueues((configBits & TRACE_ENQUEUES_BIT)==TRACE_ENQUEUES_BIT),
107         traceCalls((configBits & TRACE_CALLS_BIT)==TRACE_CALLS_BIT),
108         showWhy((configBits & SHOW_WHY_BIT)==SHOW_WHY_BIT),
109         showState((configBits & SHOW_STATE_BIT)==SHOW_STATE_BIT),
110         ptx((configBits & PTX_BIT)==PTX_BIT),
111         interpret((configBits & INTERPRET_BIT)==INTERPRET_BIT),
112         headless((configBits & HEADLESS_BIT)==HEADLESS_BIT),
113         showLoweredKernelModel((configBits & SHOW_LOWERED_KERNEL_MODEL_BIT)==SHOW_LOWERED_KERNEL_MODEL_BIT),
114         showCompilationPhases((configBits & SHOW_COMPILATION_PHASES_BIT)==SHOW_COMPILATION_PHASES_BIT),
115         showComputeModelJavaCode((configBits & SHOW_COMPUTE_MODEL_JAVA_CODE_BIT)==SHOW_COMPUTE_MODEL_JAVA_CODE_BIT),
116         checkSsaLowering((configBits & CHECK_SSA_LOWERING_BIT)==CHECK_SSA_LOWERING_BIT),
117         cudaNvcc((configBits & CUDA_NVCC_BIT)==CUDA_NVCC_BIT),
118         cudaNvrtc((configBits & CUDA_NVRTC_BIT)==CUDA_NVRTC_BIT),
119         outOfOrder((configBits & OUT_OF_ORDER_BIT)==OUT_OF_ORDER_BIT),
120         platform(configBits & 0x7),
121         alwaysCopy(!minimizeCopies),
122         device((configBits & 0x38) >> 3){
123             if(showDeviceInfo){
124                 std::cout << "native minimizeCopies " << minimizeCopies << std::endl;
125                 std::cout << "native trace " << trace << std::endl;
126                 std::cout << "native profile " << profile << std::endl;
127                 std::cout << "native showCode " << showCode << std::endl;
128                 std::cout << "native showKernelModel " << showKernelModel << std::endl;
129                 std::cout << "native showComputeModel " << showComputeModel << std::endl;
130                 std::cout << "native showDeviceInfo " << showDeviceInfo << std::endl;
131                 std::cout << "native info " << info << std::endl;
132                 std::cout << "native warn " << warn << std::endl;
133                 std::cout << "native unit " << unit << std::endl;
134                 std::cout << "native traceCopies " << traceCopies << std::endl;
135                 std::cout << "native traceSkippedCopies " << traceSkippedCopies << std::endl;
136                 std::cout << "native traceEnqueues " << traceEnqueues << std::endl;
137                 std::cout << "native traceCalls " << traceCalls << std::endl;
138                 std::cout << "native showWhy " << showWhy << std::endl;
139                 std::cout << "native showState " << showState << std::endl;
140                 std::cout << "native ptx " << ptx << std::endl;
141                 std::cout << "native interpret " << interpret << std::endl;
142                 std::cout << "native headless " << headless << std::endl;
143                 std::cout << "native showLoweredKernelModel " << showLoweredKernelModel << std::endl;
144                 std::cout << "native showCompilationPhases " << showCompilationPhases << std::endl;
145                 std::cout << "native showComputeModelJavaCode " << showComputeModelJavaCode << std::endl;
146                 std::cout << "native checkSsaLowering " << checkSsaLowering << std::endl;
147                 std::cout << "native cudaNvcc " << cudaNvcc << std::endl;
148                 std::cout << "native cudaNvrtc " << cudaNvrtc << std::endl;
149                 std::cout << "native outOfOrder " << outOfOrder << std::endl;
150                 std::cout << "native platform " << platform << std::endl;
151                 std::cout << "native device " << device << std::endl;
152             }
153         }
154     virtual ~BasicConfig()= default;
155 };
156 
157 #ifdef shared_cpp
158 const char *BasicConfig::bitNames[]={
159     "MINIMIZE_COPIES_BIT",
160     "TRACE_BIT",
161     "PROFILE_BIT",
162     "SHOW_CODE_BIT",
163     "SHOW_KERNEL_MODEL_BIT",
164     "SHOW_COMPUTE_MODEL_BIT",
165     "SHOW_DEVICE_INFO_BIT",
166     "INFO_BIT",
167     "WARN_BIT",
168     "UNIT_BIT",
169     "TRACE_COPIES_BIT",
170     "TRACE_SKIPPED_COPIES_BIT",
171     "TRACE_ENQUEUES_BIT",
172     "TRACE_CALLS_BIT",
173     "SHOW_WHY_BIT",
174     "SHOW_STATE_BIT",
175     "PTX_BIT",
176     "INTERPRET_BIT",
177     "HEADLESS_BIT",
178     "SHOW_LOWERED_KERNEL_MODEL_BIT",
179     "SHOW_COMPILATION_PHASES_BIT",
180     "SHOW_COMPUTE_MODEL_JAVA_CODE_BIT",
181     "CHECK_SSA_LOWERING_BIT",
182     "CUDA_NVCC_BIT",
183     "CUDA_NVRTC_BIT",
184     "OUT_OF_ORDER_BIT",
185 };
186 const char *BasicConfig::bitDescriptions[]={
187     "FFI ONLY Try to minimize copies",
188     "FFI ONLY trace code",
189     "FFI ONLY Turn on profiling",
190     "Show generated code (PTX/OpenCL/CUDA)",
191     "Show (via OpWriter) Kernel Model",
192     "Show (via OpWriter) Compute Model",
193     "FFI show platform and device info",
194     "INFO level logging",
195     "WARN(ing) level logging ",
196     "UNIT test level logging  ",
197     "FFI ONLY trace copies",
198     "FFI ONLY Trace skipped copies (see MINIMIZE_COPIES) ",
199     "FFI ONLY trace enqueued tasks",
200     "FFI ONLY trace calls (enter/leave)",
201     "FFI ONLY show why we decided to copy buffer (H to D)",
202     "Show iface buffer state changes",
203     "FFI (NVIDIA) ONLY pass PTX rather than C99 CUDA code",
204     "Interpret the code model rather than converting to bytecode",
205     "Don't show UI",
206     "Show (via OpWriter) Lowered Kernel Model",
207     "Show HAT compilation phases",
208     "Show java code view of compute model",
209     "Verify that code model can be lowered to SSA",
210     "Select the NVCC CUDA Compiler",
211     "Select the NVRTC CUDA Compiler (Default)",
212     "Select the NVRTC CUDA Compiler (Default)",
213 };
214 #endif