1 /*
   2  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2015, Linaro Ltd. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "precompiled.hpp"
  28 #include "asm/macroAssembler.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "code/icBuffer.hpp"
  31 #include "gc_interface/collectedHeap.inline.hpp"
  32 #include "interpreter/bytecodes.hpp"
  33 #include "memory/resourceArea.hpp"
  34 #include "nativeInst_aarch32.hpp"
  35 #include "oops/oop.inline.hpp"
  36 
  37 int InlineCacheBuffer::ic_stub_code_size() {
  38   return     /* ldr */ NativeInstruction::arm_insn_sz +
  39       /* far_branch */ MacroAssembler::far_branch_size() +
  40       /* emit_int32 */ NativeInstruction::arm_insn_sz;
  41 }
  42 
  43 #define __ masm->
  44 
  45 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
  46   ResourceMark rm;
  47   CodeBuffer      code(code_begin, ic_stub_code_size());
  48   MacroAssembler* masm            = new MacroAssembler(&code);
  49   // note: even though the code contains an embedded value, we do not need reloc info
  50   // because
  51   // (1) the value is old (i.e., doesn't matter for scavenges)
  52   // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
  53   // assert(cached_value == NULL || cached_oop->is_perm(), "must be perm oop");
  54 
  55   address start = __ pc();
  56   Label l;
  57   __ ldr(rscratch2, l);
  58   __ far_jump(ExternalAddress(entry_point));
  59   __ bind(l);
  60   __ emit_int32((int32_t)cached_value);
  61   // Only need to invalidate the 1st two instructions - not the whole ic stub
  62   ICache::invalidate_range(code_begin, InlineCacheBuffer::ic_stub_code_size());
  63   assert(__ pc() - start == ic_stub_code_size(), "must be");
  64 }
  65 
  66 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
  67   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
  68   NativeJump* jump = nativeJump_at(code_begin + 4);
  69   return jump->jump_destination();
  70 }
  71 
  72 
  73 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
  74   // The word containing the cached value is at the end of this IC buffer
  75   uintptr_t *p = (uintptr_t *)(code_begin + ic_stub_code_size() - wordSize);
  76   void* o = (void*)*p;
  77   return o;
  78 }