< prev index next >

src/share/vm/c1/c1_Defs.hpp

Print this page




  24 
  25 #ifndef SHARE_VM_C1_C1_DEFS_HPP
  26 #define SHARE_VM_C1_C1_DEFS_HPP
  27 
  28 #include "utilities/globalDefinitions.hpp"
  29 #ifdef TARGET_ARCH_x86
  30 # include "register_x86.hpp"
  31 #endif
  32 #ifdef TARGET_ARCH_sparc
  33 # include "register_sparc.hpp"
  34 #endif
  35 #ifdef TARGET_ARCH_zero
  36 # include "register_zero.hpp"
  37 #endif
  38 #ifdef TARGET_ARCH_arm
  39 # include "register_arm.hpp"
  40 #endif
  41 #ifdef TARGET_ARCH_ppc
  42 # include "register_ppc.hpp"
  43 #endif



  44 
  45 // set frame size and return address offset to these values in blobs
  46 // (if the compiled frame uses ebp as link pointer on IA; otherwise,
  47 // the frame size must be fixed)
  48 enum {
  49   no_frame_size            = -1
  50 };
  51 
  52 
  53 #ifdef TARGET_ARCH_x86
  54 # include "c1_Defs_x86.hpp"
  55 #endif
  56 #ifdef TARGET_ARCH_sparc
  57 # include "c1_Defs_sparc.hpp"
  58 #endif
  59 #ifdef TARGET_ARCH_arm
  60 # include "c1_Defs_arm.hpp"
  61 #endif
  62 #ifdef TARGET_ARCH_ppc
  63 # include "c1_Defs_ppc.hpp"



  64 #endif
  65 
  66 
  67 // native word offsets from memory address
  68 enum {
  69   lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
  70   hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
  71 };
  72 
  73 
  74 // the processor may require explicit rounding operations to implement the strictFP mode
  75 enum {
  76   strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
  77 };
  78 
  79 
  80 // for debug info: a float value in a register may be saved in double precision by runtime stubs
  81 enum {
  82   float_saved_as_double = pd_float_saved_as_double
  83 };


  24 
  25 #ifndef SHARE_VM_C1_C1_DEFS_HPP
  26 #define SHARE_VM_C1_C1_DEFS_HPP
  27 
  28 #include "utilities/globalDefinitions.hpp"
  29 #ifdef TARGET_ARCH_x86
  30 # include "register_x86.hpp"
  31 #endif
  32 #ifdef TARGET_ARCH_sparc
  33 # include "register_sparc.hpp"
  34 #endif
  35 #ifdef TARGET_ARCH_zero
  36 # include "register_zero.hpp"
  37 #endif
  38 #ifdef TARGET_ARCH_arm
  39 # include "register_arm.hpp"
  40 #endif
  41 #ifdef TARGET_ARCH_ppc
  42 # include "register_ppc.hpp"
  43 #endif
  44 #ifdef TARGET_ARCH_aarch32
  45 # include "register_aarch32.hpp"
  46 #endif
  47 
  48 // set frame size and return address offset to these values in blobs
  49 // (if the compiled frame uses ebp as link pointer on IA; otherwise,
  50 // the frame size must be fixed)
  51 enum {
  52   no_frame_size            = -1
  53 };
  54 
  55 
  56 #ifdef TARGET_ARCH_x86
  57 # include "c1_Defs_x86.hpp"
  58 #endif
  59 #ifdef TARGET_ARCH_sparc
  60 # include "c1_Defs_sparc.hpp"
  61 #endif
  62 #ifdef TARGET_ARCH_arm
  63 # include "c1_Defs_arm.hpp"
  64 #endif
  65 #ifdef TARGET_ARCH_ppc
  66 # include "c1_Defs_ppc.hpp"
  67 #endif
  68 #ifdef TARGET_ARCH_aarch32
  69 # include "c1_Defs_aarch32.hpp"
  70 #endif
  71 
  72 
  73 // native word offsets from memory address
  74 enum {
  75   lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
  76   hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
  77 };
  78 
  79 
  80 // the processor may require explicit rounding operations to implement the strictFP mode
  81 enum {
  82   strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
  83 };
  84 
  85 
  86 // for debug info: a float value in a register may be saved in double precision by runtime stubs
  87 enum {
  88   float_saved_as_double = pd_float_saved_as_double
  89 };
< prev index next >