1 /*
   2  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
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  23  */
  24 
  25 #ifndef SHARE_VM_OPTO_REGMASK_HPP
  26 #define SHARE_VM_OPTO_REGMASK_HPP
  27 
  28 #include "code/vmreg.hpp"
  29 #include "libadt/port.hpp"
  30 #include "opto/optoreg.hpp"
  31 #if defined ADGLOBALS_MD_HPP
  32 # include ADGLOBALS_MD_HPP
  33 #elif defined TARGET_ARCH_MODEL_x86_32
  34 # include "adfiles/adGlobals_x86_32.hpp"
  35 #elif defined TARGET_ARCH_MODEL_x86_64
  36 # include "adfiles/adGlobals_x86_64.hpp"
  37 #elif defined TARGET_ARCH_MODEL_sparc
  38 # include "adfiles/adGlobals_sparc.hpp"
  39 #elif defined TARGET_ARCH_MODEL_zero
  40 # include "adfiles/adGlobals_zero.hpp"
  41 #elif defined TARGET_ARCH_MODEL_ppc_64
  42 # include "adfiles/adGlobals_ppc_64.hpp"
  43 #elif defined TARGET_ARCH_MODEL_aarch32
  44 # include "adfiles/adGlobals_aarch32.hpp"
  45 #endif
  46 
  47 // Some fun naming (textual) substitutions:
  48 //
  49 // RegMask::get_low_elem() ==> RegMask::find_first_elem()
  50 // RegMask::Special        ==> RegMask::Empty
  51 // RegMask::_flags         ==> RegMask::is_AllStack()
  52 // RegMask::operator<<=()  ==> RegMask::Insert()
  53 // RegMask::operator>>=()  ==> RegMask::Remove()
  54 // RegMask::Union()        ==> RegMask::OR
  55 // RegMask::Inter()        ==> RegMask::AND
  56 //
  57 // OptoRegister::RegName   ==> OptoReg::Name
  58 //
  59 // OptoReg::stack0()       ==> _last_Mach_Reg  or ZERO in core version
  60 //
  61 // numregs in chaitin      ==> proper degree in chaitin
  62 
  63 //-------------Non-zero bit search methods used by RegMask---------------------
  64 // Find lowest 1, or return 32 if empty
  65 int find_lowest_bit( uint32 mask );
  66 // Find highest 1, or return 32 if empty
  67 int find_hihghest_bit( uint32 mask );
  68 
  69 //------------------------------RegMask----------------------------------------
  70 // The ADL file describes how to print the machine-specific registers, as well
  71 // as any notion of register classes.  We provide a register mask, which is
  72 // just a collection of Register numbers.
  73 
  74 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
  75 // RM_SIZE is the size of a register mask in words.
  76 // FORALL_BODY replicates a BODY macro once per word in the register mask.
  77 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
  78 // However, it means the ADLC can redefine the unroll macro and all loops
  79 // over register masks will be unrolled by the correct amount.
  80 
  81 class RegMask VALUE_OBJ_CLASS_SPEC {
  82   union {
  83     double _dummy_force_double_alignment[RM_SIZE>>1];
  84     // Array of Register Mask bits.  This array is large enough to cover
  85     // all the machine registers and all parameters that need to be passed
  86     // on the stack (stack registers) up to some interesting limit.  Methods
  87     // that need more parameters will NOT be compiled.  On Intel, the limit
  88     // is something like 90+ parameters.
  89     int _A[RM_SIZE];
  90   };
  91 
  92   enum {
  93     _WordBits    = BitsPerInt,
  94     _LogWordBits = LogBitsPerInt,
  95     _RM_SIZE     = RM_SIZE   // local constant, imported, then hidden by #undef
  96   };
  97 
  98 public:
  99   enum { CHUNK_SIZE = RM_SIZE*_WordBits };
 100 
 101   // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
 102   // Also, consider the maximum alignment size for a normally allocated
 103   // value.  Since we allocate register pairs but not register quads (at
 104   // present), this alignment is SlotsPerLong (== 2).  A normally
 105   // aligned allocated register is either a single register, or a pair
 106   // of adjacent registers, the lower-numbered being even.
 107   // See also is_aligned_Pairs() below, and the padding added before
 108   // Matcher::_new_SP to keep allocated pairs aligned properly.
 109   // If we ever go to quad-word allocations, SlotsPerQuad will become
 110   // the controlling alignment constraint.  Note that this alignment
 111   // requirement is internal to the allocator, and independent of any
 112   // particular platform.
 113   enum { SlotsPerLong = 2,
 114          SlotsPerVecS = 1,
 115          SlotsPerVecD = 2,
 116          SlotsPerVecX = 4,
 117          SlotsPerVecY = 8 };
 118 
 119   // A constructor only used by the ADLC output.  All mask fields are filled
 120   // in directly.  Calls to this look something like RM(1,2,3,4);
 121   RegMask(
 122 #   define BODY(I) int a##I,
 123     FORALL_BODY
 124 #   undef BODY
 125     int dummy = 0 ) {
 126 #   define BODY(I) _A[I] = a##I;
 127     FORALL_BODY
 128 #   undef BODY
 129   }
 130 
 131   // Handy copying constructor
 132   RegMask( RegMask *rm ) {
 133 #   define BODY(I) _A[I] = rm->_A[I];
 134     FORALL_BODY
 135 #   undef BODY
 136   }
 137 
 138   // Construct an empty mask
 139   RegMask( ) { Clear(); }
 140 
 141   // Construct a mask with a single bit
 142   RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); }
 143 
 144   // Check for register being in mask
 145   int Member( OptoReg::Name reg ) const {
 146     assert( reg < CHUNK_SIZE, "" );
 147     return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1)));
 148   }
 149 
 150   // The last bit in the register mask indicates that the mask should repeat
 151   // indefinitely with ONE bits.  Returns TRUE if mask is infinite or
 152   // unbounded in size.  Returns FALSE if mask is finite size.
 153   int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); }
 154 
 155   // Work around an -xO3 optimization problme in WS6U1. The old way:
 156   //   void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }
 157   // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()
 158   // follows an Insert() loop, like the one found in init_spill_mask(). Using
 159   // Insert() instead works because the index into _A in computed instead of
 160   // constant.  See bug 4665841.
 161   void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); }
 162 
 163   // Test for being a not-empty mask.
 164   int is_NotEmpty( ) const {
 165     int tmp = 0;
 166 #   define BODY(I) tmp |= _A[I];
 167     FORALL_BODY
 168 #   undef BODY
 169     return tmp;
 170   }
 171 
 172   // Find lowest-numbered register from mask, or BAD if mask is empty.
 173   OptoReg::Name find_first_elem() const {
 174     int base, bits;
 175 #   define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else
 176     FORALL_BODY
 177 #   undef BODY
 178       { base = OptoReg::Bad; bits = 1<<0; }
 179     return OptoReg::Name(base + find_lowest_bit(bits));
 180   }
 181   // Get highest-numbered register from mask, or BAD if mask is empty.
 182   OptoReg::Name find_last_elem() const {
 183     int base, bits;
 184 #   define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else
 185     FORALL_BODY
 186 #   undef BODY
 187       { base = OptoReg::Bad; bits = 1<<0; }
 188     return OptoReg::Name(base + find_hihghest_bit(bits));
 189   }
 190 
 191   // Find the lowest-numbered register pair in the mask.  Return the
 192   // HIGHEST register number in the pair, or BAD if no pairs.
 193   // Assert that the mask contains only bit pairs.
 194   OptoReg::Name find_first_pair() const;
 195 
 196   // Clear out partial bits; leave only aligned adjacent bit pairs.
 197   void clear_to_pairs();
 198   // Smear out partial bits; leave only aligned adjacent bit pairs.
 199   void smear_to_pairs();
 200   // Verify that the mask contains only aligned adjacent bit pairs
 201   void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); }
 202   // Test that the mask contains only aligned adjacent bit pairs
 203   bool is_aligned_pairs() const;
 204 
 205   // mask is a pair of misaligned registers
 206   bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); }
 207   // Test for single register
 208   int is_bound1() const;
 209   // Test for a single adjacent pair
 210   int is_bound_pair() const;
 211   // Test for a single adjacent set of ideal register's size.
 212   int is_bound(uint ireg) const {
 213     if (is_vector(ireg)) {
 214       if (is_bound_set(num_registers(ireg)))
 215         return true;
 216     } else if (is_bound1() || is_bound_pair()) {
 217       return true;
 218     }
 219     return false;
 220   }
 221 
 222   // Find the lowest-numbered register set in the mask.  Return the
 223   // HIGHEST register number in the set, or BAD if no sets.
 224   // Assert that the mask contains only bit sets.
 225   OptoReg::Name find_first_set(const int size) const;
 226 
 227   // Clear out partial bits; leave only aligned adjacent bit sets of size.
 228   void clear_to_sets(const int size);
 229   // Smear out partial bits to aligned adjacent bit sets.
 230   void smear_to_sets(const int size);
 231   // Verify that the mask contains only aligned adjacent bit sets
 232   void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
 233   // Test that the mask contains only aligned adjacent bit sets
 234   bool is_aligned_sets(const int size) const;
 235 
 236   // mask is a set of misaligned registers
 237   bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);}
 238 
 239   // Test for a single adjacent set
 240   int is_bound_set(const int size) const;
 241 
 242   static bool is_vector(uint ireg);
 243   static int num_registers(uint ireg);
 244 
 245   // Fast overlap test.  Non-zero if any registers in common.
 246   int overlap( const RegMask &rm ) const {
 247     return
 248 #   define BODY(I) (_A[I] & rm._A[I]) |
 249     FORALL_BODY
 250 #   undef BODY
 251     0 ;
 252   }
 253 
 254   // Special test for register pressure based splitting
 255   // UP means register only, Register plus stack, or stack only is DOWN
 256   bool is_UP() const;
 257 
 258   // Clear a register mask
 259   void Clear( ) {
 260 #   define BODY(I) _A[I] = 0;
 261     FORALL_BODY
 262 #   undef BODY
 263   }
 264 
 265   // Fill a register mask with 1's
 266   void Set_All( ) {
 267 #   define BODY(I) _A[I] = -1;
 268     FORALL_BODY
 269 #   undef BODY
 270   }
 271 
 272   // Insert register into mask
 273   void Insert( OptoReg::Name reg ) {
 274     assert( reg < CHUNK_SIZE, "" );
 275     _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1)));
 276   }
 277 
 278   // Remove register from mask
 279   void Remove( OptoReg::Name reg ) {
 280     assert( reg < CHUNK_SIZE, "" );
 281     _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1)));
 282   }
 283 
 284   // OR 'rm' into 'this'
 285   void OR( const RegMask &rm ) {
 286 #   define BODY(I) this->_A[I] |= rm._A[I];
 287     FORALL_BODY
 288 #   undef BODY
 289   }
 290 
 291   // AND 'rm' into 'this'
 292   void AND( const RegMask &rm ) {
 293 #   define BODY(I) this->_A[I] &= rm._A[I];
 294     FORALL_BODY
 295 #   undef BODY
 296   }
 297 
 298   // Subtract 'rm' from 'this'
 299   void SUBTRACT( const RegMask &rm ) {
 300 #   define BODY(I) _A[I] &= ~rm._A[I];
 301     FORALL_BODY
 302 #   undef BODY
 303   }
 304 
 305   // Compute size of register mask: number of bits
 306   uint Size() const;
 307 
 308 #ifndef PRODUCT
 309   void print() const { dump(); }
 310   void dump(outputStream *st = tty) const; // Print a mask
 311 #endif
 312 
 313   static const RegMask Empty;   // Common empty mask
 314 
 315   static bool can_represent(OptoReg::Name reg) {
 316     // NOTE: -1 in computation reflects the usage of the last
 317     //       bit of the regmask as an infinite stack flag and
 318     //       -7 is to keep mask aligned for largest value (VecY).
 319     return (int)reg < (int)(CHUNK_SIZE-1);
 320   }
 321   static bool can_represent_arg(OptoReg::Name reg) {
 322     // NOTE: -SlotsPerVecY in computation reflects the need
 323     //       to keep mask aligned for largest value (VecY).
 324     return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY);
 325   }
 326 };
 327 
 328 // Do not use this constant directly in client code!
 329 #undef RM_SIZE
 330 
 331 #endif // SHARE_VM_OPTO_REGMASK_HPP