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src/cpu/aarch64/vm/macroAssembler_aarch64.hpp

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 423 private:
 424 
 425   void mov_immediate64(Register dst, u_int64_t imm64);
 426   void mov_immediate32(Register dst, u_int32_t imm32);
 427 
 428   int push(unsigned int bitset, Register stack);
 429   int pop(unsigned int bitset, Register stack);
 430 
 431   void mov(Register dst, Address a);
 432 
 433 public:
 434   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
 435   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 436 
 437   // Push and pop everything that might be clobbered by a native
 438   // runtime call except rscratch1 and rscratch2.  (They are always
 439   // scratch, so we don't have to protect them.)  Only save the lower
 440   // 64 bits of each vector register.
 441   void push_call_clobbered_registers();
 442   void pop_call_clobbered_registers();


 443 
 444   // now mov instructions for loading absolute addresses and 32 or
 445   // 64 bit integers
 446 
 447   inline void mov(Register dst, address addr)
 448   {
 449     mov_immediate64(dst, (u_int64_t)addr);
 450   }
 451 
 452   inline void mov(Register dst, u_int64_t imm64)
 453   {
 454     mov_immediate64(dst, imm64);
 455   }
 456 
 457   inline void movw(Register dst, u_int32_t imm32)
 458   {
 459     mov_immediate32(dst, imm32);
 460   }
 461 
 462   inline void mov(Register dst, long l)
 463   {
 464     mov(dst, (u_int64_t)l);
 465   }
 466 
 467   inline void mov(Register dst, int i)
 468   {
 469     mov(dst, (long)i);
 470   }




 423 private:
 424 
 425   void mov_immediate64(Register dst, u_int64_t imm64);
 426   void mov_immediate32(Register dst, u_int32_t imm32);
 427 
 428   int push(unsigned int bitset, Register stack);
 429   int pop(unsigned int bitset, Register stack);
 430 
 431   void mov(Register dst, Address a);
 432 
 433 public:
 434   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
 435   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 436 
 437   // Push and pop everything that might be clobbered by a native
 438   // runtime call except rscratch1 and rscratch2.  (They are always
 439   // scratch, so we don't have to protect them.)  Only save the lower
 440   // 64 bits of each vector register.
 441   void push_call_clobbered_registers();
 442   void pop_call_clobbered_registers();
 443   void push_call_clobbered_fp_registers();
 444   void pop_call_clobbered_fp_registers();
 445 
 446   // now mov instructions for loading absolute addresses and 32 or
 447   // 64 bit integers
 448 
 449   void mov(Register dst, address addr);



 450 
 451   inline void mov(Register dst, u_int64_t imm64)
 452   {
 453     mov_immediate64(dst, imm64);
 454   }
 455 
 456   inline void movw(Register dst, u_int32_t imm32)
 457   {
 458     mov_immediate32(dst, imm32);
 459   }
 460 
 461   inline void mov(Register dst, long l)
 462   {
 463     mov(dst, (u_int64_t)l);
 464   }
 465 
 466   inline void mov(Register dst, int i)
 467   {
 468     mov(dst, (long)i);
 469   }


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