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src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp

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*** 681,690 **** --- 681,693 ---- __ brx(acond, false, Assembler::pn, *(op->label())); } // The peephole pass fills the delay slot } + void LIR_Assembler::emit_opShenandoahWriteBarrier(LIR_OpShenandoahWriteBarrier* op) { + Unimplemented(); + } void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) { Bytecodes::Code code = op->bytecode(); LIR_Opr dst = op->result_opr();
*** 3481,3491 **** __ srlx(rs, 32, rd); __ srl (rs, 0, rd->successor()); } ! void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest) { LIR_Address* addr = addr_opr->as_address_ptr(); assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1, "can't handle complex addresses yet"); if (Assembler::is_simm13(addr->disp())) { __ add(addr->base()->as_pointer_register(), addr->disp(), dest->as_pointer_register()); --- 3484,3494 ---- __ srlx(rs, 32, rd); __ srl (rs, 0, rd->successor()); } ! void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info) { LIR_Address* addr = addr_opr->as_address_ptr(); assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1, "can't handle complex addresses yet"); if (Assembler::is_simm13(addr->disp())) { __ add(addr->base()->as_pointer_register(), addr->disp(), dest->as_pointer_register());
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