1 /*
   2  * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_ASM_ASSEMBLER_HPP
  26 #define SHARE_VM_ASM_ASSEMBLER_HPP
  27 
  28 #include "asm/codeBuffer.hpp"
  29 #include "code/oopRecorder.hpp"
  30 #include "code/relocInfo.hpp"
  31 #include "memory/allocation.hpp"
  32 #include "utilities/debug.hpp"
  33 #include "utilities/growableArray.hpp"
  34 #include "utilities/top.hpp"
  35 #ifdef TARGET_ARCH_x86
  36 # include "register_x86.hpp"
  37 # include "vm_version_x86.hpp"
  38 #endif
  39 #ifdef TARGET_ARCH_sparc
  40 # include "register_sparc.hpp"
  41 # include "vm_version_sparc.hpp"
  42 #endif
  43 #ifdef TARGET_ARCH_zero
  44 # include "register_zero.hpp"
  45 # include "vm_version_zero.hpp"
  46 #endif
  47 #ifdef TARGET_ARCH_arm
  48 # include "register_arm.hpp"
  49 # include "vm_version_arm.hpp"
  50 #endif
  51 #ifdef TARGET_ARCH_ppc
  52 # include "register_ppc.hpp"
  53 # include "vm_version_ppc.hpp"
  54 #endif
  55 #ifdef TARGET_ARCH_aarch64
  56 # include "register_aarch64.hpp"
  57 # include "vm_version_aarch64.hpp"
  58 #endif
  59 
  60 // This file contains platform-independent assembler declarations.
  61 
  62 class MacroAssembler;
  63 class AbstractAssembler;
  64 class Label;
  65 
  66 /**
  67  * Labels represent destinations for control transfer instructions.  Such
  68  * instructions can accept a Label as their target argument.  A Label is
  69  * bound to the current location in the code stream by calling the
  70  * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind'
  71  * method.  A Label may be referenced by an instruction before it's bound
  72  * (i.e., 'forward referenced').  'bind' stores the current code offset
  73  * in the Label object.
  74  *
  75  * If an instruction references a bound Label, the offset field(s) within
  76  * the instruction are immediately filled in based on the Label's code
  77  * offset.  If an instruction references an unbound label, that
  78  * instruction is put on a list of instructions that must be patched
  79  * (i.e., 'resolved') when the Label is bound.
  80  *
  81  * 'bind' will call the platform-specific 'patch_instruction' method to
  82  * fill in the offset field(s) for each unresolved instruction (if there
  83  * are any).  'patch_instruction' lives in one of the
  84  * cpu/<arch>/vm/assembler_<arch>* files.
  85  *
  86  * Instead of using a linked list of unresolved instructions, a Label has
  87  * an array of unresolved instruction code offsets.  _patch_index
  88  * contains the total number of forward references.  If the Label's array
  89  * overflows (i.e., _patch_index grows larger than the array size), a
  90  * GrowableArray is allocated to hold the remaining offsets.  (The cache
  91  * size is 4 for now, which handles over 99.5% of the cases)
  92  *
  93  * Labels may only be used within a single CodeSection.  If you need
  94  * to create references between code sections, use explicit relocations.
  95  */
  96 class Label VALUE_OBJ_CLASS_SPEC {
  97  private:
  98   enum { PatchCacheSize = 4 };
  99 
 100   // _loc encodes both the binding state (via its sign)
 101   // and the binding locator (via its value) of a label.
 102   //
 103   // _loc >= 0   bound label, loc() encodes the target (jump) position
 104   // _loc == -1  unbound label
 105   int _loc;
 106 
 107   // References to instructions that jump to this unresolved label.
 108   // These instructions need to be patched when the label is bound
 109   // using the platform-specific patchInstruction() method.
 110   //
 111   // To avoid having to allocate from the C-heap each time, we provide
 112   // a local cache and use the overflow only if we exceed the local cache
 113   int _patches[PatchCacheSize];
 114   int _patch_index;
 115   GrowableArray<int>* _patch_overflow;
 116 
 117   Label(const Label&) { ShouldNotReachHere(); }
 118 
 119  public:
 120 
 121   /**
 122    * After binding, be sure 'patch_instructions' is called later to link
 123    */
 124   void bind_loc(int loc) {
 125     assert(loc >= 0, "illegal locator");
 126     assert(_loc == -1, "already bound");
 127     _loc = loc;
 128   }
 129   void bind_loc(int pos, int sect) { bind_loc(CodeBuffer::locator(pos, sect)); }
 130 
 131 #ifndef PRODUCT
 132   // Iterates over all unresolved instructions for printing
 133   void print_instructions(MacroAssembler* masm) const;
 134 #endif // PRODUCT
 135 
 136   /**
 137    * Returns the position of the the Label in the code buffer
 138    * The position is a 'locator', which encodes both offset and section.
 139    */
 140   int loc() const {
 141     assert(_loc >= 0, "unbound label");
 142     return _loc;
 143   }
 144   int loc_pos()  const { return CodeBuffer::locator_pos(loc()); }
 145   int loc_sect() const { return CodeBuffer::locator_sect(loc()); }
 146 
 147   bool is_bound() const    { return _loc >=  0; }
 148   bool is_unbound() const  { return _loc == -1 && _patch_index > 0; }
 149   bool is_unused() const   { return _loc == -1 && _patch_index == 0; }
 150 
 151   /**
 152    * Adds a reference to an unresolved displacement instruction to
 153    * this unbound label
 154    *
 155    * @param cb         the code buffer being patched
 156    * @param branch_loc the locator of the branch instruction in the code buffer
 157    */
 158   void add_patch_at(CodeBuffer* cb, int branch_loc);
 159 
 160   /**
 161    * Iterate over the list of patches, resolving the instructions
 162    * Call patch_instruction on each 'branch_loc' value
 163    */
 164   void patch_instructions(MacroAssembler* masm);
 165 
 166   void init() {
 167     _loc = -1;
 168     _patch_index = 0;
 169     _patch_overflow = NULL;
 170   }
 171 
 172   Label() {
 173     init();
 174   }
 175 
 176   ~Label() {
 177     assert(is_bound() || is_unused(), "Label was never bound to a location, but it was used as a jmp target");
 178   }
 179 
 180   void reset() {
 181     init(); //leave _patch_overflow because it points to CodeBuffer.
 182   }
 183 };
 184 
 185 // A union type for code which has to assemble both constant and
 186 // non-constant operands, when the distinction cannot be made
 187 // statically.
 188 class RegisterOrConstant VALUE_OBJ_CLASS_SPEC {
 189  private:
 190   Register _r;
 191   intptr_t _c;
 192 
 193  public:
 194   RegisterOrConstant(): _r(noreg), _c(0) {}
 195   RegisterOrConstant(Register r): _r(r), _c(0) {}
 196   RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {}
 197 
 198   Register as_register() const { assert(is_register(),""); return _r; }
 199   intptr_t as_constant() const { assert(is_constant(),""); return _c; }
 200 
 201   Register register_or_noreg() const { return _r; }
 202   intptr_t constant_or_zero() const  { return _c; }
 203 
 204   bool is_register() const { return _r != noreg; }
 205   bool is_constant() const { return _r == noreg; }
 206 };
 207 
 208 // The Abstract Assembler: Pure assembler doing NO optimizations on the
 209 // instruction level; i.e., what you write is what you get.
 210 // The Assembler is generating code into a CodeBuffer.
 211 class AbstractAssembler : public ResourceObj  {
 212   friend class Label;
 213 
 214  protected:
 215   CodeSection* _code_section;          // section within the code buffer
 216   OopRecorder* _oop_recorder;          // support for relocInfo::oop_type
 217 
 218  public:
 219   // Code emission & accessing
 220   address addr_at(int pos) const { return code_section()->start() + pos; }
 221 
 222  protected:
 223   // This routine is called with a label is used for an address.
 224   // Labels and displacements truck in offsets, but target must return a PC.
 225   address target(Label& L)             { return code_section()->target(L, pc()); }
 226 
 227   bool is8bit(int x) const             { return -0x80 <= x && x < 0x80; }
 228   bool isByte(int x) const             { return 0 <= x && x < 0x100; }
 229   bool isShiftCount(int x) const       { return 0 <= x && x < 32; }
 230 
 231   // Instruction boundaries (required when emitting relocatable values).
 232   class InstructionMark: public StackObj {
 233    private:
 234     AbstractAssembler* _assm;
 235 
 236    public:
 237     InstructionMark(AbstractAssembler* assm) : _assm(assm) {
 238       assert(assm->inst_mark() == NULL, "overlapping instructions");
 239       _assm->set_inst_mark();
 240     }
 241     ~InstructionMark() {
 242       _assm->clear_inst_mark();
 243     }
 244   };
 245   friend class InstructionMark;
 246 #ifdef ASSERT
 247   // Make it return true on platforms which need to verify
 248   // instruction boundaries for some operations.
 249   static bool pd_check_instruction_mark();
 250 
 251   // Add delta to short branch distance to verify that it still fit into imm8.
 252   int _short_branch_delta;
 253 
 254   int  short_branch_delta() const { return _short_branch_delta; }
 255   void set_short_branch_delta()   { _short_branch_delta = 32; }
 256   void clear_short_branch_delta() { _short_branch_delta = 0; }
 257 
 258   class ShortBranchVerifier: public StackObj {
 259    private:
 260     AbstractAssembler* _assm;
 261 
 262    public:
 263     ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) {
 264       assert(assm->short_branch_delta() == 0, "overlapping instructions");
 265       _assm->set_short_branch_delta();
 266     }
 267     ~ShortBranchVerifier() {
 268       _assm->clear_short_branch_delta();
 269     }
 270   };
 271 #else
 272   // Dummy in product.
 273   class ShortBranchVerifier: public StackObj {
 274    public:
 275     ShortBranchVerifier(AbstractAssembler* assm) {}
 276   };
 277 #endif
 278 
 279  public:
 280 
 281   // Creation
 282   AbstractAssembler(CodeBuffer* code);
 283 
 284   // ensure buf contains all code (call this before using/copying the code)
 285   void flush();
 286 
 287   void emit_int8(   int8_t  x) { code_section()->emit_int8(   x); }
 288   void emit_int16(  int16_t x) { code_section()->emit_int16(  x); }
 289   void emit_int32(  int32_t x) { code_section()->emit_int32(  x); }
 290   void emit_int64(  int64_t x) { code_section()->emit_int64(  x); }
 291 
 292   void emit_float(  jfloat  x) { code_section()->emit_float(  x); }
 293   void emit_double( jdouble x) { code_section()->emit_double( x); }
 294   void emit_address(address x) { code_section()->emit_address(x); }
 295 
 296   // min and max values for signed immediate ranges
 297   static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1))    ; }
 298   static int max_simm(int nbits) { return  (intptr_t(1) << (nbits - 1)) - 1; }
 299 
 300   // Define some:
 301   static int min_simm10() { return min_simm(10); }
 302   static int min_simm13() { return min_simm(13); }
 303   static int min_simm16() { return min_simm(16); }
 304 
 305   // Test if x is within signed immediate range for nbits
 306   static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); }
 307 
 308   // Define some:
 309   static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); }
 310   static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); }
 311   static bool is_simm10(intptr_t x) { return is_simm(x, 10); }
 312   static bool is_simm11(intptr_t x) { return is_simm(x, 11); }
 313   static bool is_simm12(intptr_t x) { return is_simm(x, 12); }
 314   static bool is_simm13(intptr_t x) { return is_simm(x, 13); }
 315   static bool is_simm16(intptr_t x) { return is_simm(x, 16); }
 316   static bool is_simm26(intptr_t x) { return is_simm(x, 26); }
 317   static bool is_simm32(intptr_t x) { return is_simm(x, 32); }
 318 
 319   // Accessors
 320   CodeSection*  code_section() const   { return _code_section; }
 321   CodeBuffer*   code()         const   { return code_section()->outer(); }
 322   int           sect()         const   { return code_section()->index(); }
 323   address       pc()           const   { return code_section()->end();   }
 324   int           offset()       const   { return code_section()->size();  }
 325   int           locator()      const   { return CodeBuffer::locator(offset(), sect()); }
 326 
 327   OopRecorder*  oop_recorder() const   { return _oop_recorder; }
 328   void      set_oop_recorder(OopRecorder* r) { _oop_recorder = r; }
 329 
 330   address       inst_mark() const { return code_section()->mark();       }
 331   void      set_inst_mark()       {        code_section()->set_mark();   }
 332   void    clear_inst_mark()       {        code_section()->clear_mark(); }
 333 
 334   // Constants in code
 335   void relocate(RelocationHolder const& rspec, int format = 0) {
 336     assert(!pd_check_instruction_mark()
 337         || inst_mark() == NULL || inst_mark() == code_section()->end(),
 338         "call relocate() between instructions");
 339     code_section()->relocate(code_section()->end(), rspec, format);
 340   }
 341   void relocate(   relocInfo::relocType rtype, int format = 0) {
 342     code_section()->relocate(code_section()->end(), rtype, format);
 343   }
 344 
 345   static int code_fill_byte();         // used to pad out odd-sized code buffers
 346 
 347   // Associate a comment with the current offset.  It will be printed
 348   // along with the disassembly when printing nmethods.  Currently
 349   // only supported in the instruction section of the code buffer.
 350   void block_comment(const char* comment);
 351   // Copy str to a buffer that has the same lifetime as the CodeBuffer
 352   const char* code_string(const char* str);
 353 
 354   // Label functions
 355   void bind(Label& L); // binds an unbound label L to the current code position
 356 
 357   // Move to a different section in the same code buffer.
 358   void set_code_section(CodeSection* cs);
 359 
 360   // Inform assembler when generating stub code and relocation info
 361   address    start_a_stub(int required_space);
 362   void       end_a_stub();
 363   // Ditto for constants.
 364   address    start_a_const(int required_space, int required_align = sizeof(double));
 365   void       end_a_const(CodeSection* cs);  // Pass the codesection to continue in (insts or stubs?).
 366 
 367   // constants support
 368   //
 369   // We must remember the code section (insts or stubs) in c1
 370   // so we can reset to the proper section in end_a_const().
 371   address long_constant(jlong c) {
 372     CodeSection* c1 = _code_section;
 373     address ptr = start_a_const(sizeof(c), sizeof(c));
 374     if (ptr != NULL) {
 375       emit_int64(c);
 376       end_a_const(c1);
 377     }
 378     return ptr;
 379   }
 380   address double_constant(jdouble c) {
 381     CodeSection* c1 = _code_section;
 382     address ptr = start_a_const(sizeof(c), sizeof(c));
 383     if (ptr != NULL) {
 384       emit_double(c);
 385       end_a_const(c1);
 386     }
 387     return ptr;
 388   }
 389   address float_constant(jfloat c) {
 390     CodeSection* c1 = _code_section;
 391     address ptr = start_a_const(sizeof(c), sizeof(c));
 392     if (ptr != NULL) {
 393       emit_float(c);
 394       end_a_const(c1);
 395     }
 396     return ptr;
 397   }
 398   address address_constant(address c) {
 399     CodeSection* c1 = _code_section;
 400     address ptr = start_a_const(sizeof(c), sizeof(c));
 401     if (ptr != NULL) {
 402       emit_address(c);
 403       end_a_const(c1);
 404     }
 405     return ptr;
 406   }
 407   address address_constant(address c, RelocationHolder const& rspec) {
 408     CodeSection* c1 = _code_section;
 409     address ptr = start_a_const(sizeof(c), sizeof(c));
 410     if (ptr != NULL) {
 411       relocate(rspec);
 412       emit_address(c);
 413       end_a_const(c1);
 414     }
 415     return ptr;
 416   }
 417 
 418   // Bootstrapping aid to cope with delayed determination of constants.
 419   // Returns a static address which will eventually contain the constant.
 420   // The value zero (NULL) stands instead of a constant which is still uncomputed.
 421   // Thus, the eventual value of the constant must not be zero.
 422   // This is fine, since this is designed for embedding object field
 423   // offsets in code which must be generated before the object class is loaded.
 424   // Field offsets are never zero, since an object's header (mark word)
 425   // is located at offset zero.
 426   RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0);
 427   RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0);
 428   virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0;
 429   // Last overloading is platform-dependent; look in assembler_<arch>.cpp.
 430   static intptr_t* delayed_value_addr(int(*constant_fn)());
 431   static intptr_t* delayed_value_addr(address(*constant_fn)());
 432   static void update_delayed_values();
 433 
 434   // Bang stack to trigger StackOverflowError at a safe location
 435   // implementation delegates to machine-specific bang_stack_with_offset
 436   void generate_stack_overflow_check( int frame_size_in_bytes );
 437   virtual void bang_stack_with_offset(int offset) = 0;
 438 
 439 
 440   /**
 441    * A platform-dependent method to patch a jump instruction that refers
 442    * to this label.
 443    *
 444    * @param branch the location of the instruction to patch
 445    * @param masm the assembler which generated the branch
 446    */
 447   void pd_patch_instruction(address branch, address target);
 448 
 449 };
 450 
 451 #ifdef TARGET_ARCH_x86
 452 # include "assembler_x86.hpp"
 453 #endif
 454 #ifdef TARGET_ARCH_aarch64
 455 # include "assembler_aarch64.hpp"
 456 #endif
 457 #ifdef TARGET_ARCH_sparc
 458 # include "assembler_sparc.hpp"
 459 #endif
 460 #ifdef TARGET_ARCH_zero
 461 # include "assembler_zero.hpp"
 462 #endif
 463 #ifdef TARGET_ARCH_arm
 464 # include "assembler_arm.hpp"
 465 #endif
 466 #ifdef TARGET_ARCH_ppc
 467 # include "assembler_ppc.hpp"
 468 #endif
 469 
 470 
 471 #endif // SHARE_VM_ASM_ASSEMBLER_HPP