1 /*
   2  * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_C1_C1_DEFS_HPP
  26 #define SHARE_VM_C1_C1_DEFS_HPP
  27 
  28 #include "utilities/globalDefinitions.hpp"
  29 #ifdef TARGET_ARCH_x86
  30 # include "register_x86.hpp"
  31 #endif
  32 #ifdef TARGET_ARCH_aarch64
  33 # include "register_aarch64.hpp"
  34 #endif
  35 #ifdef TARGET_ARCH_sparc
  36 # include "register_sparc.hpp"
  37 #endif
  38 #ifdef TARGET_ARCH_zero
  39 # include "register_zero.hpp"
  40 #endif
  41 #ifdef TARGET_ARCH_arm
  42 # include "register_arm.hpp"
  43 #endif
  44 #ifdef TARGET_ARCH_ppc
  45 # include "register_ppc.hpp"
  46 #endif
  47 
  48 // set frame size and return address offset to these values in blobs
  49 // (if the compiled frame uses ebp as link pointer on IA; otherwise,
  50 // the frame size must be fixed)
  51 enum {
  52   no_frame_size            = -1
  53 };
  54 
  55 
  56 #ifdef TARGET_ARCH_x86
  57 # include "c1_Defs_x86.hpp"
  58 #endif
  59 #ifdef TARGET_ARCH_aarch64
  60 # include "c1_Defs_aarch64.hpp"
  61 #endif
  62 #ifdef TARGET_ARCH_sparc
  63 # include "c1_Defs_sparc.hpp"
  64 #endif
  65 #ifdef TARGET_ARCH_arm
  66 # include "c1_Defs_arm.hpp"
  67 #endif
  68 #ifdef TARGET_ARCH_ppc
  69 # include "c1_Defs_ppc.hpp"
  70 #endif
  71 
  72 
  73 // native word offsets from memory address
  74 enum {
  75   lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
  76   hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
  77 };
  78 
  79 
  80 // the processor may require explicit rounding operations to implement the strictFP mode
  81 enum {
  82   strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
  83 };
  84 
  85 
  86 // for debug info: a float value in a register may be saved in double precision by runtime stubs
  87 enum {
  88   float_saved_as_double = pd_float_saved_as_double
  89 };
  90 
  91 #endif // SHARE_VM_C1_C1_DEFS_HPP