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src/share/vm/c1/c1_LIRAssembler.hpp

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 228   void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);  // info set for null exceptions
 229   void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
 230   void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type);
 231 
 232   void call(        LIR_OpJavaCall* op, relocInfo::relocType rtype);
 233   void ic_call(     LIR_OpJavaCall* op);
 234   void vtable_call( LIR_OpJavaCall* op);
 235 
 236   void osr_entry();
 237 
 238   void build_frame();
 239 
 240   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 241   void unwind_op(LIR_Opr exceptionOop);
 242   void monitor_address(int monitor_ix, LIR_Opr dst);
 243 
 244   void align_backward_branch_target();
 245   void align_call(LIR_Code code);
 246 
 247   void negate(LIR_Opr left, LIR_Opr dest);
 248   void leal(LIR_Opr left, LIR_Opr dest);
 249 
 250   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 251 
 252   void membar();
 253   void membar_acquire();
 254   void membar_release();
 255   void membar_loadload();
 256   void membar_storestore();
 257   void membar_loadstore();
 258   void membar_storeload();
 259   void get_thread(LIR_Opr result);
 260 
 261   void verify_oop_map(CodeEmitInfo* info);
 262 
 263   void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
 264 
 265 #ifdef TARGET_ARCH_x86
 266 # include "c1_LIRAssembler_x86.hpp"
 267 #endif
 268 #ifdef TARGET_ARCH_aarch64


 228   void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);  // info set for null exceptions
 229   void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
 230   void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type);
 231 
 232   void call(        LIR_OpJavaCall* op, relocInfo::relocType rtype);
 233   void ic_call(     LIR_OpJavaCall* op);
 234   void vtable_call( LIR_OpJavaCall* op);
 235 
 236   void osr_entry();
 237 
 238   void build_frame();
 239 
 240   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
 241   void unwind_op(LIR_Opr exceptionOop);
 242   void monitor_address(int monitor_ix, LIR_Opr dst);
 243 
 244   void align_backward_branch_target();
 245   void align_call(LIR_Code code);
 246 
 247   void negate(LIR_Opr left, LIR_Opr dest);
 248   void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
 249 
 250   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
 251 
 252   void membar();
 253   void membar_acquire();
 254   void membar_release();
 255   void membar_loadload();
 256   void membar_storestore();
 257   void membar_loadstore();
 258   void membar_storeload();
 259   void get_thread(LIR_Opr result);
 260 
 261   void verify_oop_map(CodeEmitInfo* info);
 262 
 263   void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
 264 
 265 #ifdef TARGET_ARCH_x86
 266 # include "c1_LIRAssembler_x86.hpp"
 267 #endif
 268 #ifdef TARGET_ARCH_aarch64
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