1 /* 2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "gc_interface/collectedHeap.hpp" 27 #include "opto/machnode.hpp" 28 #include "opto/regalloc.hpp" 29 #if INCLUDE_ALL_GCS 30 #include "gc_implementation/shenandoah/c2/shenandoahSupport.hpp" 31 #endif 32 33 //============================================================================= 34 // Return the value requested 35 // result register lookup, corresponding to int_format 36 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const { 37 return (int)ra_->get_encode(node); 38 } 39 // input register lookup, corresponding to ext_format 40 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const { 41 return (int)(ra_->get_encode(node->in(idx))); 42 } 43 intptr_t MachOper::constant() const { return 0x00; } 44 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; } 45 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; } 46 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; } 47 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; } 48 TypeOopPtr *MachOper::oop() const { return NULL; } 49 int MachOper::ccode() const { return 0x00; } 50 // A zero, default, indicates this value is not needed. 51 // May need to lookup the base register, as done in int_ and ext_format 52 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } 53 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } 54 int MachOper::scale() const { return 0x00; } 55 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; } 56 int MachOper::constant_disp() const { return 0; } 57 int MachOper::base_position() const { return -1; } // no base input 58 int MachOper::index_position() const { return -1; } // no index input 59 // Check for PC-Relative displacement 60 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; } 61 // Return the label 62 Label* MachOper::label() const { ShouldNotReachHere(); return 0; } 63 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; } 64 65 66 //------------------------------negate----------------------------------------- 67 // Negate conditional branches. Error for non-branch operands 68 void MachOper::negate() { 69 ShouldNotCallThis(); 70 } 71 72 //-----------------------------type-------------------------------------------- 73 const Type *MachOper::type() const { 74 return Type::BOTTOM; 75 } 76 77 //------------------------------in_RegMask------------------------------------- 78 const RegMask *MachOper::in_RegMask(int index) const { 79 ShouldNotReachHere(); 80 return NULL; 81 } 82 83 //------------------------------dump_spec-------------------------------------- 84 // Print any per-operand special info 85 #ifndef PRODUCT 86 void MachOper::dump_spec(outputStream *st) const { } 87 #endif 88 89 //------------------------------hash------------------------------------------- 90 // Print any per-operand special info 91 uint MachOper::hash() const { 92 ShouldNotCallThis(); 93 return 5; 94 } 95 96 //------------------------------cmp-------------------------------------------- 97 // Print any per-operand special info 98 uint MachOper::cmp( const MachOper &oper ) const { 99 ShouldNotCallThis(); 100 return opcode() == oper.opcode(); 101 } 102 103 //------------------------------hash------------------------------------------- 104 // Print any per-operand special info 105 uint labelOper::hash() const { 106 return _block_num; 107 } 108 109 //------------------------------cmp-------------------------------------------- 110 // Print any per-operand special info 111 uint labelOper::cmp( const MachOper &oper ) const { 112 return (opcode() == oper.opcode()) && (_label == oper.label()); 113 } 114 115 //------------------------------hash------------------------------------------- 116 // Print any per-operand special info 117 uint methodOper::hash() const { 118 return (uint)_method; 119 } 120 121 //------------------------------cmp-------------------------------------------- 122 // Print any per-operand special info 123 uint methodOper::cmp( const MachOper &oper ) const { 124 return (opcode() == oper.opcode()) && (_method == oper.method()); 125 } 126 127 128 //============================================================================= 129 //------------------------------MachNode--------------------------------------- 130 131 //------------------------------emit------------------------------------------- 132 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { 133 #ifdef ASSERT 134 tty->print("missing MachNode emit function: "); 135 dump(); 136 #endif 137 ShouldNotCallThis(); 138 } 139 140 //---------------------------postalloc_expand---------------------------------- 141 // Expand node after register allocation. 142 void MachNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {} 143 144 //------------------------------size------------------------------------------- 145 // Size of instruction in bytes 146 uint MachNode::size(PhaseRegAlloc *ra_) const { 147 // If a virtual was not defined for this specific instruction, 148 // Call the helper which finds the size by emitting the bits. 149 return MachNode::emit_size(ra_); 150 } 151 152 //------------------------------size------------------------------------------- 153 // Helper function that computes size by emitting code 154 uint MachNode::emit_size(PhaseRegAlloc *ra_) const { 155 // Emit into a trash buffer and count bytes emitted. 156 assert(ra_ == ra_->C->regalloc(), "sanity"); 157 return ra_->C->scratch_emit_size(this); 158 } 159 160 161 162 //------------------------------hash------------------------------------------- 163 uint MachNode::hash() const { 164 uint no = num_opnds(); 165 uint sum = rule(); 166 for( uint i=0; i<no; i++ ) 167 sum += _opnds[i]->hash(); 168 return sum+Node::hash(); 169 } 170 171 //-----------------------------cmp--------------------------------------------- 172 uint MachNode::cmp( const Node &node ) const { 173 MachNode& n = *((Node&)node).as_Mach(); 174 uint no = num_opnds(); 175 if( no != n.num_opnds() ) return 0; 176 if( rule() != n.rule() ) return 0; 177 for( uint i=0; i<no; i++ ) // All operands must match 178 if( !_opnds[i]->cmp( *n._opnds[i] ) ) 179 return 0; // mis-matched operands 180 return 1; // match 181 } 182 183 // Return an equivalent instruction using memory for cisc_operand position 184 MachNode *MachNode::cisc_version(int offset, Compile* C) { 185 ShouldNotCallThis(); 186 return NULL; 187 } 188 189 void MachNode::use_cisc_RegMask() { 190 ShouldNotReachHere(); 191 } 192 193 194 //-----------------------------in_RegMask-------------------------------------- 195 const RegMask &MachNode::in_RegMask( uint idx ) const { 196 uint numopnds = num_opnds(); // Virtual call for number of operands 197 uint skipped = oper_input_base(); // Sum of leaves skipped so far 198 if( idx < skipped ) { 199 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" ); 200 assert( idx == 1, "expected base ptr here" ); 201 // debug info can be anywhere 202 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP]; 203 } 204 uint opcnt = 1; // First operand 205 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand 206 while( idx >= skipped+num_edges ) { 207 skipped += num_edges; 208 opcnt++; // Bump operand count 209 assert( opcnt < numopnds, "Accessing non-existent operand" ); 210 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand 211 } 212 213 const RegMask *rm = cisc_RegMask(); 214 if( rm == NULL || (int)opcnt != cisc_operand() ) { 215 rm = _opnds[opcnt]->in_RegMask(idx-skipped); 216 } 217 return *rm; 218 } 219 220 //-----------------------------memory_inputs-------------------------------- 221 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const { 222 const MachOper* oper = memory_operand(); 223 224 if (oper == (MachOper*)-1) { 225 base = NodeSentinel; 226 index = NodeSentinel; 227 } else { 228 base = NULL; 229 index = NULL; 230 if (oper != NULL) { 231 // It has a unique memory operand. Find its index. 232 int oper_idx = num_opnds(); 233 while (--oper_idx >= 0) { 234 if (_opnds[oper_idx] == oper) break; 235 } 236 int oper_pos = operand_index(oper_idx); 237 int base_pos = oper->base_position(); 238 if (base_pos >= 0) { 239 base = _in[oper_pos+base_pos]; 240 } 241 int index_pos = oper->index_position(); 242 if (index_pos >= 0) { 243 index = _in[oper_pos+index_pos]; 244 } 245 } 246 } 247 248 return oper; 249 } 250 251 //-----------------------------get_base_and_disp---------------------------- 252 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const { 253 254 // Find the memory inputs using our helper function 255 Node* base; 256 Node* index; 257 const MachOper* oper = memory_inputs(base, index); 258 259 if (oper == NULL) { 260 // Base has been set to NULL 261 offset = 0; 262 } else if (oper == (MachOper*)-1) { 263 // Base has been set to NodeSentinel 264 // There is not a unique memory use here. We will fall to AliasIdxBot. 265 offset = Type::OffsetBot; 266 } else { 267 // Base may be NULL, even if offset turns out to be != 0 268 269 intptr_t disp = oper->constant_disp(); 270 int scale = oper->scale(); 271 // Now we have collected every part of the ADLC MEMORY_INTER. 272 // See if it adds up to a base + offset. 273 if (index != NULL) { 274 const Type* t_index = index->bottom_type(); 275 if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass, 276 // EncodeNKlass, LoadConNklass. 277 // Memory references through narrow oops have a 278 // funny base so grab the type from the index: 279 // [R12 + narrow_oop_reg<<3 + offset] 280 assert(base == NULL, "Memory references through narrow oops have no base"); 281 offset = disp; 282 adr_type = t_index->make_ptr()->add_offset(offset); 283 return NULL; 284 } else if (!index->is_Con()) { 285 disp = Type::OffsetBot; 286 } else if (disp != Type::OffsetBot) { 287 const TypeX* ti = t_index->isa_intptr_t(); 288 if (ti == NULL) { 289 disp = Type::OffsetBot; // a random constant?? 290 } else { 291 disp += ti->get_con() << scale; 292 } 293 } 294 } 295 offset = disp; 296 297 // In i486.ad, indOffset32X uses base==RegI and disp==RegP, 298 // this will prevent alias analysis without the following support: 299 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop, 300 // Add the offset determined by the "base", or use Type::OffsetBot. 301 if( adr_type == TYPE_PTR_SENTINAL ) { 302 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X 303 if (t_disp != NULL) { 304 offset = Type::OffsetBot; 305 const Type* t_base = base->bottom_type(); 306 if (t_base->isa_intptr_t()) { 307 const TypeX *t_offset = t_base->is_intptr_t(); 308 if( t_offset->is_con() ) { 309 offset = t_offset->get_con(); 310 } 311 } 312 adr_type = t_disp->add_offset(offset); 313 } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) { 314 // Use ideal type if it is oop ptr. 315 const TypePtr *tp = oper->type()->isa_ptr(); 316 if( tp != NULL) { 317 adr_type = tp; 318 } 319 } 320 } 321 322 } 323 return base; 324 } 325 326 327 //---------------------------------adr_type--------------------------------- 328 const class TypePtr *MachNode::adr_type() const { 329 intptr_t offset = 0; 330 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type 331 const Node *base = get_base_and_disp(offset, adr_type); 332 if( adr_type != TYPE_PTR_SENTINAL ) { 333 return adr_type; // get_base_and_disp has the answer 334 } 335 336 // Direct addressing modes have no base node, simply an indirect 337 // offset, which is always to raw memory. 338 // %%%%% Someday we'd like to allow constant oop offsets which 339 // would let Intel load from static globals in 1 instruction. 340 // Currently Intel requires 2 instructions and a register temp. 341 if (base == NULL) { 342 // NULL base, zero offset means no memory at all (a null pointer!) 343 if (offset == 0) { 344 return NULL; 345 } 346 // NULL base, any offset means any pointer whatever 347 if (offset == Type::OffsetBot) { 348 return TypePtr::BOTTOM; 349 } 350 // %%% make offset be intptr_t 351 assert(!Universe::heap()->is_in_reserved(cast_to_oop(offset)), "must be a raw ptr"); 352 return TypeRawPtr::BOTTOM; 353 } 354 355 // base of -1 with no particular offset means all of memory 356 if (base == NodeSentinel) return TypePtr::BOTTOM; 357 358 const Type* t = base->bottom_type(); 359 if (t->isa_narrowoop() && Universe::narrow_oop_shift() == 0) { 360 // 32-bit unscaled narrow oop can be the base of any address expression 361 t = t->make_ptr(); 362 } 363 if (t->isa_narrowklass() && Universe::narrow_klass_shift() == 0) { 364 // 32-bit unscaled narrow oop can be the base of any address expression 365 t = t->make_ptr(); 366 } 367 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) { 368 // We cannot assert that the offset does not look oop-ish here. 369 // Depending on the heap layout the cardmark base could land 370 // inside some oopish region. It definitely does for Win2K. 371 // The sum of cardmark-base plus shift-by-9-oop lands outside 372 // the oop-ish area but we can't assert for that statically. 373 return TypeRawPtr::BOTTOM; 374 } 375 376 const TypePtr *tp = t->isa_ptr(); 377 378 // be conservative if we do not recognize the type 379 if (tp == NULL) { 380 assert(false, "this path may produce not optimal code"); 381 return TypePtr::BOTTOM; 382 } 383 assert(tp->base() != Type::AnyPtr, "not a bare pointer"); 384 385 return tp->add_offset(offset); 386 } 387 388 389 //-----------------------------operand_index--------------------------------- 390 int MachNode::operand_index( uint operand ) const { 391 if( operand < 1 ) return -1; 392 assert(operand < num_opnds(), "oob"); 393 if( _opnds[operand]->num_edges() == 0 ) return -1; 394 395 uint skipped = oper_input_base(); // Sum of leaves skipped so far 396 for (uint opcnt = 1; opcnt < operand; opcnt++) { 397 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand 398 skipped += num_edges; 399 } 400 return skipped; 401 } 402 403 int MachNode::operand_index(const MachOper *oper) const { 404 uint skipped = oper_input_base(); // Sum of leaves skipped so far 405 uint opcnt; 406 for (opcnt = 1; opcnt < num_opnds(); opcnt++) { 407 if (_opnds[opcnt] == oper) break; 408 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand 409 skipped += num_edges; 410 } 411 if (_opnds[opcnt] != oper) return -1; 412 return skipped; 413 } 414 415 //------------------------------peephole--------------------------------------- 416 // Apply peephole rule(s) to this instruction 417 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) { 418 return NULL; 419 } 420 421 //------------------------------add_case_label--------------------------------- 422 // Adds the label for the case 423 void MachNode::add_case_label( int index_num, Label* blockLabel) { 424 ShouldNotCallThis(); 425 } 426 427 //------------------------------method_set------------------------------------- 428 // Set the absolute address of a method 429 void MachNode::method_set( intptr_t addr ) { 430 ShouldNotCallThis(); 431 } 432 433 //------------------------------rematerialize---------------------------------- 434 bool MachNode::rematerialize() const { 435 // Temps are always rematerializable 436 if (is_MachTemp()) return true; 437 438 uint r = rule(); // Match rule 439 if( r < Matcher::_begin_rematerialize || 440 r >= Matcher::_end_rematerialize ) 441 return false; 442 443 // For 2-address instructions, the input live range is also the output 444 // live range. Remateralizing does not make progress on the that live range. 445 if( two_adr() ) return false; 446 447 // Check for rematerializing float constants, or not 448 if( !Matcher::rematerialize_float_constants ) { 449 int op = ideal_Opcode(); 450 if( op == Op_ConF || op == Op_ConD ) 451 return false; 452 } 453 454 // Defining flags - can't spill these! Must remateralize. 455 if( ideal_reg() == Op_RegFlags ) 456 return true; 457 458 // Stretching lots of inputs - don't do it. 459 if( req() > 2 ) 460 return false; 461 462 // Don't remateralize somebody with bound inputs - it stretches a 463 // fixed register lifetime. 464 uint idx = oper_input_base(); 465 if (req() > idx) { 466 const RegMask &rm = in_RegMask(idx); 467 if (rm.is_bound(ideal_reg())) 468 return false; 469 } 470 471 return true; 472 } 473 474 #ifndef PRODUCT 475 //------------------------------dump_spec-------------------------------------- 476 // Print any per-operand special info 477 void MachNode::dump_spec(outputStream *st) const { 478 uint cnt = num_opnds(); 479 for( uint i=0; i<cnt; i++ ) 480 _opnds[i]->dump_spec(st); 481 const TypePtr *t = adr_type(); 482 if( t ) { 483 Compile* C = Compile::current(); 484 if( C->alias_type(t)->is_volatile() ) 485 st->print(" Volatile!"); 486 } 487 } 488 489 //------------------------------dump_format------------------------------------ 490 // access to virtual 491 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const { 492 format(ra, st); // access to virtual 493 } 494 #endif 495 496 //============================================================================= 497 #ifndef PRODUCT 498 void MachTypeNode::dump_spec(outputStream *st) const { 499 _bottom_type->dump_on(st); 500 } 501 #endif 502 503 504 //============================================================================= 505 int MachConstantNode::constant_offset() { 506 // Bind the offset lazily. 507 if (_constant.offset() == -1) { 508 Compile::ConstantTable& constant_table = Compile::current()->constant_table(); 509 int offset = constant_table.find_offset(_constant); 510 // If called from Compile::scratch_emit_size return the 511 // pre-calculated offset. 512 // NOTE: If the AD file does some table base offset optimizations 513 // later the AD file needs to take care of this fact. 514 if (Compile::current()->in_scratch_emit_size()) { 515 return constant_table.calculate_table_base_offset() + offset; 516 } 517 _constant.set_offset(constant_table.table_base_offset() + offset); 518 } 519 return _constant.offset(); 520 } 521 522 int MachConstantNode::constant_offset_unchecked() const { 523 return _constant.offset(); 524 } 525 526 //============================================================================= 527 #ifndef PRODUCT 528 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { 529 int reg = ra_->get_reg_first(in(1)->in(_vidx)); 530 st->print("%s %s", Name(), Matcher::regName[reg]); 531 } 532 #endif 533 534 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { 535 // only emits entries in the null-pointer exception handler table 536 } 537 void MachNullCheckNode::label_set(Label* label, uint block_num) { 538 // Nothing to emit 539 } 540 void MachNullCheckNode::save_label( Label** label, uint* block_num ) { 541 // Nothing to emit 542 } 543 544 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const { 545 if( idx == 0 ) return RegMask::Empty; 546 else return in(1)->as_Mach()->out_RegMask(); 547 } 548 549 //============================================================================= 550 const Type *MachProjNode::bottom_type() const { 551 if( _ideal_reg == fat_proj ) return Type::BOTTOM; 552 // Try the normal mechanism first 553 const Type *t = in(0)->bottom_type(); 554 if( t->base() == Type::Tuple ) { 555 const TypeTuple *tt = t->is_tuple(); 556 if (_con < tt->cnt()) 557 return tt->field_at(_con); 558 } 559 // Else use generic type from ideal register set 560 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds"); 561 return Type::mreg2type[_ideal_reg]; 562 } 563 564 const TypePtr *MachProjNode::adr_type() const { 565 if (bottom_type() == Type::MEMORY) { 566 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM 567 const TypePtr* adr_type = in(0)->adr_type(); 568 #ifdef ASSERT 569 if (!is_error_reported() && !Node::in_dump()) 570 assert(adr_type != NULL, "source must have adr_type"); 571 #endif 572 return adr_type; 573 } 574 assert(bottom_type()->base() != Type::Memory, "no other memories?"); 575 return NULL; 576 } 577 578 #ifndef PRODUCT 579 void MachProjNode::dump_spec(outputStream *st) const { 580 ProjNode::dump_spec(st); 581 switch (_ideal_reg) { 582 case unmatched_proj: st->print("/unmatched"); break; 583 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break; 584 } 585 } 586 #endif 587 588 //============================================================================= 589 #ifndef PRODUCT 590 void MachIfNode::dump_spec(outputStream *st) const { 591 st->print("P=%f, C=%f",_prob, _fcnt); 592 } 593 #endif 594 595 //============================================================================= 596 uint MachReturnNode::size_of() const { return sizeof(*this); } 597 598 //------------------------------Registers-------------------------------------- 599 const RegMask &MachReturnNode::in_RegMask( uint idx ) const { 600 return _in_rms[idx]; 601 } 602 603 const TypePtr *MachReturnNode::adr_type() const { 604 // most returns and calls are assumed to consume & modify all of memory 605 // the matcher will copy non-wide adr_types from ideal originals 606 return _adr_type; 607 } 608 609 //============================================================================= 610 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; } 611 612 //------------------------------Registers-------------------------------------- 613 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const { 614 // Values in the domain use the users calling convention, embodied in the 615 // _in_rms array of RegMasks. 616 if( idx < TypeFunc::Parms ) return _in_rms[idx]; 617 618 if (SafePointNode::needs_polling_address_input() && 619 idx == TypeFunc::Parms && 620 ideal_Opcode() == Op_SafePoint) { 621 return MachNode::in_RegMask(idx); 622 } 623 624 // Values outside the domain represent debug info 625 assert(in(idx)->ideal_reg() != Op_RegFlags, "flags register is not spillable"); 626 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()]; 627 } 628 629 630 //============================================================================= 631 632 uint MachCallNode::cmp( const Node &n ) const 633 { return _tf == ((MachCallNode&)n)._tf; } 634 const Type *MachCallNode::bottom_type() const { return tf()->range(); } 635 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); } 636 637 #ifndef PRODUCT 638 void MachCallNode::dump_spec(outputStream *st) const { 639 st->print("# "); 640 tf()->dump_on(st); 641 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt); 642 if (jvms() != NULL) jvms()->dump_spec(st); 643 } 644 #endif 645 646 bool MachCallNode::return_value_is_used() const { 647 if (tf()->range()->cnt() == TypeFunc::Parms) { 648 // void return 649 return false; 650 } 651 652 // find the projection corresponding to the return value 653 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) { 654 Node *use = fast_out(i); 655 if (!use->is_Proj()) continue; 656 if (use->as_Proj()->_con == TypeFunc::Parms) { 657 return true; 658 } 659 } 660 return false; 661 } 662 663 // Similar to cousin class CallNode::returns_pointer 664 // Because this is used in deoptimization, we want the type info, not the data 665 // flow info; the interpreter will "use" things that are dead to the optimizer. 666 bool MachCallNode::returns_pointer() const { 667 const TypeTuple *r = tf()->range(); 668 return (r->cnt() > TypeFunc::Parms && 669 r->field_at(TypeFunc::Parms)->isa_ptr()); 670 } 671 672 //------------------------------Registers-------------------------------------- 673 const RegMask &MachCallNode::in_RegMask(uint idx) const { 674 // Values in the domain use the users calling convention, embodied in the 675 // _in_rms array of RegMasks. 676 if (idx < tf()->domain()->cnt()) { 677 return _in_rms[idx]; 678 } 679 if (idx == mach_constant_base_node_input()) { 680 return MachConstantBaseNode::static_out_RegMask(); 681 } 682 // Values outside the domain represent debug info 683 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()]; 684 } 685 686 //============================================================================= 687 uint MachCallJavaNode::size_of() const { return sizeof(*this); } 688 uint MachCallJavaNode::cmp( const Node &n ) const { 689 MachCallJavaNode &call = (MachCallJavaNode&)n; 690 return MachCallNode::cmp(call) && _method->equals(call._method); 691 } 692 #ifndef PRODUCT 693 void MachCallJavaNode::dump_spec(outputStream *st) const { 694 if (_method_handle_invoke) 695 st->print("MethodHandle "); 696 if (_method) { 697 _method->print_short_name(st); 698 st->print(" "); 699 } 700 MachCallNode::dump_spec(st); 701 } 702 #endif 703 704 //------------------------------Registers-------------------------------------- 705 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const { 706 // Values in the domain use the users calling convention, embodied in the 707 // _in_rms array of RegMasks. 708 if (idx < tf()->domain()->cnt()) { 709 return _in_rms[idx]; 710 } 711 if (idx == mach_constant_base_node_input()) { 712 return MachConstantBaseNode::static_out_RegMask(); 713 } 714 // Values outside the domain represent debug info 715 Matcher* m = Compile::current()->matcher(); 716 // If this call is a MethodHandle invoke we have to use a different 717 // debugmask which does not include the register we use to save the 718 // SP over MH invokes. 719 RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask; 720 return *debugmask[in(idx)->ideal_reg()]; 721 } 722 723 //============================================================================= 724 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); } 725 uint MachCallStaticJavaNode::cmp( const Node &n ) const { 726 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n; 727 return MachCallJavaNode::cmp(call) && _name == call._name; 728 } 729 730 //----------------------------uncommon_trap_request---------------------------- 731 // If this is an uncommon trap, return the request code, else zero. 732 int MachCallStaticJavaNode::uncommon_trap_request() const { 733 if (_name != NULL && !strcmp(_name, "uncommon_trap")) { 734 return CallStaticJavaNode::extract_uncommon_trap_request(this); 735 } 736 return 0; 737 } 738 739 #ifndef PRODUCT 740 // Helper for summarizing uncommon_trap arguments. 741 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const { 742 int trap_req = uncommon_trap_request(); 743 if (trap_req != 0) { 744 char buf[100]; 745 st->print("(%s)", 746 Deoptimization::format_trap_request(buf, sizeof(buf), 747 trap_req)); 748 } 749 } 750 751 void MachCallStaticJavaNode::dump_spec(outputStream *st) const { 752 st->print("Static "); 753 if (_name != NULL) { 754 st->print("wrapper for: %s", _name ); 755 dump_trap_args(st); 756 st->print(" "); 757 } 758 MachCallJavaNode::dump_spec(st); 759 } 760 #endif 761 762 //============================================================================= 763 #ifndef PRODUCT 764 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const { 765 st->print("Dynamic "); 766 MachCallJavaNode::dump_spec(st); 767 } 768 #endif 769 //============================================================================= 770 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); } 771 uint MachCallRuntimeNode::cmp( const Node &n ) const { 772 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n; 773 return MachCallNode::cmp(call) && !strcmp(_name,call._name); 774 } 775 #ifndef PRODUCT 776 void MachCallRuntimeNode::dump_spec(outputStream *st) const { 777 st->print("%s ",_name); 778 MachCallNode::dump_spec(st); 779 } 780 #endif 781 //============================================================================= 782 // A shared JVMState for all HaltNodes. Indicates the start of debug info 783 // is at TypeFunc::Parms. Only required for SOE register spill handling - 784 // to indicate where the stack-slot-only debug info inputs begin. 785 // There is no other JVM state needed here. 786 JVMState jvms_for_throw(0); 787 JVMState *MachHaltNode::jvms() const { 788 return &jvms_for_throw; 789 } 790 791 uint MachMemBarNode::size_of() const { return sizeof(*this); } 792 793 const TypePtr *MachMemBarNode::adr_type() const { 794 return _adr_type; 795 } 796 797 //============================================================================= 798 #ifndef PRODUCT 799 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { 800 st->print("B%d", _block_num); 801 } 802 #endif // PRODUCT 803 804 //============================================================================= 805 #ifndef PRODUCT 806 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const { 807 st->print(INTPTR_FORMAT, _method); 808 } 809 #endif // PRODUCT