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src/share/vm/opto/matcher.cpp

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*** 42,58 **** --- 42,63 ---- # include AD_MD_HPP #elif defined TARGET_ARCH_MODEL_x86_32 # include "adfiles/ad_x86_32.hpp" #elif defined TARGET_ARCH_MODEL_x86_64 # include "adfiles/ad_x86_64.hpp" + #elif defined TARGET_ARCH_MODEL_aarch64 + # include "adfiles/ad_aarch64.hpp" #elif defined TARGET_ARCH_MODEL_sparc # include "adfiles/ad_sparc.hpp" #elif defined TARGET_ARCH_MODEL_zero # include "adfiles/ad_zero.hpp" #elif defined TARGET_ARCH_MODEL_ppc_64 # include "adfiles/ad_ppc_64.hpp" #endif + #if INCLUDE_ALL_GCS + #include "gc_implementation/shenandoah/c2/shenandoahSupport.hpp" + #endif OptoReg::Name OptoReg::c_frame_pointer; const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; RegMask Matcher::mreg2regmask[_last_Mach_Reg];
*** 1020,1029 **** --- 1025,1037 ---- // Calls match special. They match alone with no children. // Their children, the incoming arguments, match normally. m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); if (C->failing()) return NULL; if (m == NULL) { Matcher::soft_match_failure(); return NULL; } + if (n->is_MemBar() && UseShenandoahGC) { + m->as_MachMemBar()->set_adr_type(n->adr_type()); + } } else { // Nothing the matcher cares about if (n->is_Proj() && n->in(0) != NULL && n->in(0)->is_Multi()) { // Projections? // Convert to machine-dependent projection m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); #ifdef ASSERT
*** 1064,1073 **** --- 1072,1090 ---- if (m == NULL) break; // set -1 to call add_prec() instead of set_req() during Step1 mstack.push(m, Visit, n, -1); } + // Handle precedence edges for interior nodes + for (i = n->len()-1; (uint)i >= n->req(); i--) { + Node *m = n->in(i); + if (m == NULL || C->node_arena()->contains(m)) continue; + n->rm_prec(i); + // set -1 to call add_prec() instead of set_req() during Step1 + mstack.push(m, Visit, n, -1); + } + // For constant debug info, I'd rather have unmatched constants. int cnt = n->req(); JVMState* jvms = n->jvms(); int debug_cnt = jvms ? jvms->debug_start() : cnt;
*** 1754,1763 **** --- 1771,1788 ---- } return ex; } + void Matcher::handle_precedence_edges(Node* n, MachNode *mach) { + for (uint i = n->req(); i < n->len(); i++) { + if (n->in(i) != NULL) { + mach->add_prec(n->in(i)); + } + } + } + void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { // 'op' is what I am expecting to receive int op = _leftOp[rule]; // Operand type to catch childs result // This is what my child will give me.
*** 1788,1797 **** --- 1813,1824 ---- return; } uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { + handle_precedence_edges(s->_leaf, mach); + if( s->_leaf->is_Load() ) { Node *mem2 = s->_leaf->in(MemNode::Memory); assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;) mem = mem2;
*** 1870,1879 **** --- 1897,1909 ---- if( s->_leaf->is_Load() ) { assert( mem == (Node*)1, "multiple Memories being matched at once?" ); mem = s->_leaf->in(MemNode::Memory); debug_only(_mem_node = s->_leaf;) } + + handle_precedence_edges(s->_leaf, mach); + if( s->_leaf->in(0) && s->_leaf->req() > 1) { if( !mach->in(0) ) mach->set_req(0,s->_leaf->in(0)); else { assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" );
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