1165 #include "opto/convertnode.hpp"
1166 #include "runtime/objectMonitor.hpp"
1167
1168 extern RegMask _ANY_REG32_mask;
1169 extern RegMask _ANY_REG_mask;
1170 extern RegMask _PTR_REG_mask;
1171 extern RegMask _NO_SPECIAL_REG32_mask;
1172 extern RegMask _NO_SPECIAL_REG_mask;
1173 extern RegMask _NO_SPECIAL_PTR_REG_mask;
1174 extern RegMask _NO_SPECIAL_NO_RFP_PTR_REG_mask;
1175
1176 class CallStubImpl {
1177
1178 //--------------------------------------------------------------
1179 //---< Used for optimization in Compile::shorten_branches >---
1180 //--------------------------------------------------------------
1181
1182 public:
1183 // Size of call trampoline stub.
1184 static uint size_call_trampoline() {
1185 return 0; // no call trampolines on this platform
1186 }
1187
1188 // number of relocations needed by a call trampoline stub
1189 static uint reloc_call_trampoline() {
1190 return 0; // no call trampolines on this platform
1191 }
1192 };
1193
1194 class HandlerImpl {
1195
1196 public:
1197
1198 static int emit_deopt_handler(C2_MacroAssembler* masm);
1199
1200 static uint size_deopt_handler() {
1201 // count one branch instruction and one far call instruction sequence
1202 return NativeInstruction::instruction_size + MacroAssembler::far_codestub_branch_size();
1203 }
1204 };
1205
3386 uint64_t con = (uint64_t)$src$$constant;
3387 if (con == 0) {
3388 __ mov(dst_reg, zr);
3389 } else {
3390 __ mov(dst_reg, con);
3391 }
3392 %}
3393
3394 enc_class aarch64_enc_mov_p(iRegP dst, immP src) %{
3395 Register dst_reg = as_Register($dst$$reg);
3396 address con = (address)$src$$constant;
3397 if (con == nullptr || con == (address)1) {
3398 ShouldNotReachHere();
3399 } else {
3400 relocInfo::relocType rtype = $src->constant_reloc();
3401 if (rtype == relocInfo::oop_type) {
3402 __ movoop(dst_reg, (jobject)con);
3403 } else if (rtype == relocInfo::metadata_type) {
3404 __ mov_metadata(dst_reg, (Metadata*)con);
3405 } else {
3406 assert(rtype == relocInfo::none, "unexpected reloc type");
3407 if (! __ is_valid_AArch64_address(con) ||
3408 con < (address)(uintptr_t)os::vm_page_size()) {
3409 __ mov(dst_reg, con);
3410 } else {
3411 uint64_t offset;
3412 __ adrp(dst_reg, con, offset);
3413 __ add(dst_reg, dst_reg, offset);
3414 }
3415 }
3416 }
3417 %}
3418
3419 enc_class aarch64_enc_mov_p0(iRegP dst, immP0 src) %{
3420 Register dst_reg = as_Register($dst$$reg);
3421 __ mov(dst_reg, zr);
3422 %}
3423
3424 enc_class aarch64_enc_mov_p1(iRegP dst, immP_1 src) %{
3425 Register dst_reg = as_Register($dst$$reg);
3426 __ mov(dst_reg, (uint64_t)1);
4518 predicate(n->get_ptr() == 0);
4519 match(ConP);
4520
4521 op_cost(0);
4522 format %{ %}
4523 interface(CONST_INTER);
4524 %}
4525
4526 // Pointer Immediate One
4527 // this is used in object initialization (initial object header)
4528 operand immP_1()
4529 %{
4530 predicate(n->get_ptr() == 1);
4531 match(ConP);
4532
4533 op_cost(0);
4534 format %{ %}
4535 interface(CONST_INTER);
4536 %}
4537
4538 // Float and Double operands
4539 // Double Immediate
4540 operand immD()
4541 %{
4542 match(ConD);
4543 op_cost(0);
4544 format %{ %}
4545 interface(CONST_INTER);
4546 %}
4547
4548 // Double Immediate: +0.0d
4549 operand immD0()
4550 %{
4551 predicate(jlong_cast(n->getd()) == 0);
4552 match(ConD);
4553
4554 op_cost(0);
4555 format %{ %}
4556 interface(CONST_INTER);
4557 %}
6881
6882 ins_encode(aarch64_enc_mov_p0(dst, con));
6883
6884 ins_pipe(ialu_imm);
6885 %}
6886
6887 // Load Pointer Constant One
6888
6889 instruct loadConP1(iRegPNoSp dst, immP_1 con)
6890 %{
6891 match(Set dst con);
6892
6893 ins_cost(INSN_COST);
6894 format %{ "mov $dst, $con\t# nullptr ptr" %}
6895
6896 ins_encode(aarch64_enc_mov_p1(dst, con));
6897
6898 ins_pipe(ialu_imm);
6899 %}
6900
6901 // Load Narrow Pointer Constant
6902
6903 instruct loadConN(iRegNNoSp dst, immN con)
6904 %{
6905 match(Set dst con);
6906
6907 ins_cost(INSN_COST * 4);
6908 format %{ "mov $dst, $con\t# compressed ptr" %}
6909
6910 ins_encode(aarch64_enc_mov_n(dst, con));
6911
6912 ins_pipe(ialu_imm);
6913 %}
6914
6915 // Load Narrow Null Pointer Constant
6916
6917 instruct loadConN0(iRegNNoSp dst, immN0 con)
6918 %{
6919 match(Set dst con);
6920
|
1165 #include "opto/convertnode.hpp"
1166 #include "runtime/objectMonitor.hpp"
1167
1168 extern RegMask _ANY_REG32_mask;
1169 extern RegMask _ANY_REG_mask;
1170 extern RegMask _PTR_REG_mask;
1171 extern RegMask _NO_SPECIAL_REG32_mask;
1172 extern RegMask _NO_SPECIAL_REG_mask;
1173 extern RegMask _NO_SPECIAL_PTR_REG_mask;
1174 extern RegMask _NO_SPECIAL_NO_RFP_PTR_REG_mask;
1175
1176 class CallStubImpl {
1177
1178 //--------------------------------------------------------------
1179 //---< Used for optimization in Compile::shorten_branches >---
1180 //--------------------------------------------------------------
1181
1182 public:
1183 // Size of call trampoline stub.
1184 static uint size_call_trampoline() {
1185 return MacroAssembler::max_trampoline_stub_size(); // no call trampolines on this platform
1186 }
1187
1188 // number of relocations needed by a call trampoline stub
1189 static uint reloc_call_trampoline() {
1190 return 0; // no call trampolines on this platform
1191 }
1192 };
1193
1194 class HandlerImpl {
1195
1196 public:
1197
1198 static int emit_deopt_handler(C2_MacroAssembler* masm);
1199
1200 static uint size_deopt_handler() {
1201 // count one branch instruction and one far call instruction sequence
1202 return NativeInstruction::instruction_size + MacroAssembler::far_codestub_branch_size();
1203 }
1204 };
1205
3386 uint64_t con = (uint64_t)$src$$constant;
3387 if (con == 0) {
3388 __ mov(dst_reg, zr);
3389 } else {
3390 __ mov(dst_reg, con);
3391 }
3392 %}
3393
3394 enc_class aarch64_enc_mov_p(iRegP dst, immP src) %{
3395 Register dst_reg = as_Register($dst$$reg);
3396 address con = (address)$src$$constant;
3397 if (con == nullptr || con == (address)1) {
3398 ShouldNotReachHere();
3399 } else {
3400 relocInfo::relocType rtype = $src->constant_reloc();
3401 if (rtype == relocInfo::oop_type) {
3402 __ movoop(dst_reg, (jobject)con);
3403 } else if (rtype == relocInfo::metadata_type) {
3404 __ mov_metadata(dst_reg, (Metadata*)con);
3405 } else {
3406 assert(rtype == relocInfo::none || rtype == relocInfo::external_word_type, "unexpected reloc type");
3407 if (! __ is_valid_AArch64_address(con) ||
3408 con < (address)(uintptr_t)os::vm_page_size()) {
3409 __ mov(dst_reg, con);
3410 } else {
3411 uint64_t offset;
3412 __ adrp(dst_reg, con, offset);
3413 __ add(dst_reg, dst_reg, offset);
3414 }
3415 }
3416 }
3417 %}
3418
3419 enc_class aarch64_enc_mov_p0(iRegP dst, immP0 src) %{
3420 Register dst_reg = as_Register($dst$$reg);
3421 __ mov(dst_reg, zr);
3422 %}
3423
3424 enc_class aarch64_enc_mov_p1(iRegP dst, immP_1 src) %{
3425 Register dst_reg = as_Register($dst$$reg);
3426 __ mov(dst_reg, (uint64_t)1);
4518 predicate(n->get_ptr() == 0);
4519 match(ConP);
4520
4521 op_cost(0);
4522 format %{ %}
4523 interface(CONST_INTER);
4524 %}
4525
4526 // Pointer Immediate One
4527 // this is used in object initialization (initial object header)
4528 operand immP_1()
4529 %{
4530 predicate(n->get_ptr() == 1);
4531 match(ConP);
4532
4533 op_cost(0);
4534 format %{ %}
4535 interface(CONST_INTER);
4536 %}
4537
4538 // AOT Runtime Constants Address
4539 operand immAOTRuntimeConstantsAddress()
4540 %{
4541 // Check if the address is in the range of AOT Runtime Constants
4542 predicate(AOTRuntimeConstants::contains((address)(n->get_ptr())));
4543 match(ConP);
4544
4545 op_cost(0);
4546 format %{ %}
4547 interface(CONST_INTER);
4548 %}
4549
4550 // Float and Double operands
4551 // Double Immediate
4552 operand immD()
4553 %{
4554 match(ConD);
4555 op_cost(0);
4556 format %{ %}
4557 interface(CONST_INTER);
4558 %}
4559
4560 // Double Immediate: +0.0d
4561 operand immD0()
4562 %{
4563 predicate(jlong_cast(n->getd()) == 0);
4564 match(ConD);
4565
4566 op_cost(0);
4567 format %{ %}
4568 interface(CONST_INTER);
4569 %}
6893
6894 ins_encode(aarch64_enc_mov_p0(dst, con));
6895
6896 ins_pipe(ialu_imm);
6897 %}
6898
6899 // Load Pointer Constant One
6900
6901 instruct loadConP1(iRegPNoSp dst, immP_1 con)
6902 %{
6903 match(Set dst con);
6904
6905 ins_cost(INSN_COST);
6906 format %{ "mov $dst, $con\t# nullptr ptr" %}
6907
6908 ins_encode(aarch64_enc_mov_p1(dst, con));
6909
6910 ins_pipe(ialu_imm);
6911 %}
6912
6913 instruct loadAOTRCAddress(iRegPNoSp dst, immAOTRuntimeConstantsAddress con)
6914 %{
6915 match(Set dst con);
6916
6917 ins_cost(INSN_COST);
6918 format %{ "adr $dst, $con\t# AOT Runtime Constants Address" %}
6919
6920 ins_encode %{
6921 __ load_aotrc_address($dst$$Register, (address)$con$$constant);
6922 %}
6923
6924 ins_pipe(ialu_imm);
6925 %}
6926
6927 // Load Narrow Pointer Constant
6928
6929 instruct loadConN(iRegNNoSp dst, immN con)
6930 %{
6931 match(Set dst con);
6932
6933 ins_cost(INSN_COST * 4);
6934 format %{ "mov $dst, $con\t# compressed ptr" %}
6935
6936 ins_encode(aarch64_enc_mov_n(dst, con));
6937
6938 ins_pipe(ialu_imm);
6939 %}
6940
6941 // Load Narrow Null Pointer Constant
6942
6943 instruct loadConN0(iRegNNoSp dst, immN0 con)
6944 %{
6945 match(Set dst con);
6946
|