1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/macroAssembler.inline.hpp"
26 #if INCLUDE_CDS
27 #include "code/SCCache.hpp"
28 #endif
29 #include "gc/g1/g1BarrierSet.hpp"
30 #include "gc/g1/g1BarrierSetAssembler.hpp"
31 #include "gc/g1/g1BarrierSetRuntime.hpp"
32 #include "gc/g1/g1CardTable.hpp"
33 #include "gc/g1/g1HeapRegion.hpp"
34 #include "gc/g1/g1ThreadLocalData.hpp"
35 #include "gc/shared/collectedHeap.hpp"
36 #include "interpreter/interp_masm.hpp"
37 #include "runtime/javaThread.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #ifdef COMPILER1
40 #include "c1/c1_LIRAssembler.hpp"
41 #include "c1/c1_MacroAssembler.hpp"
42 #include "gc/g1/c1/g1BarrierSetC1.hpp"
43 #endif // COMPILER1
44 #ifdef COMPILER2
45 #include "gc/g1/c2/g1BarrierSetC2.hpp"
46 #endif // COMPILER2
47
48 #define __ masm->
49
50 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
51 Register addr, Register count, RegSet saved_regs) {
52 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
53 if (!dest_uninitialized) {
54 Label done;
55 Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
56
57 // Is marking active?
58 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
59 __ ldrw(rscratch1, in_progress);
60 } else {
61 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
62 __ ldrb(rscratch1, in_progress);
63 }
64 __ cbzw(rscratch1, done);
65
66 __ push(saved_regs, sp);
67 if (count == c_rarg0) {
68 if (addr == c_rarg1) {
69 // exactly backwards!!
70 __ mov(rscratch1, c_rarg0);
71 __ mov(c_rarg0, c_rarg1);
72 __ mov(c_rarg1, rscratch1);
73 } else {
74 __ mov(c_rarg1, count);
75 __ mov(c_rarg0, addr);
76 }
77 } else {
78 __ mov(c_rarg0, addr);
79 __ mov(c_rarg1, count);
80 }
81 if (UseCompressedOops) {
82 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
83 } else {
84 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
85 }
86 __ pop(saved_regs, sp);
87
88 __ bind(done);
89 }
90 }
91
92 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
93 Register start, Register count, Register scratch, RegSet saved_regs) {
94 __ push(saved_regs, sp);
95 assert_different_registers(start, count, scratch);
96 assert_different_registers(c_rarg0, count);
97 __ mov(c_rarg0, start);
98 __ mov(c_rarg1, count);
99 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
100 __ pop(saved_regs, sp);
101 }
102
103 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
104 const Register thread, const Register value, const Register temp1, const Register temp2) {
105 // Can we store a value in the given thread's buffer?
106 // (The index field is typed as size_t.)
107 __ ldr(temp1, Address(thread, in_bytes(index_offset))); // temp1 := *(index address)
108 __ cbz(temp1, runtime); // jump to runtime if index == 0 (full buffer)
109 // The buffer is not full, store value into it.
110 __ sub(temp1, temp1, wordSize); // temp1 := next index
111 __ str(temp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
112 __ ldr(temp2, Address(thread, in_bytes(buffer_offset))); // temp2 := buffer address
113 __ str(value, Address(temp2, temp1)); // *(buffer address + next index) := value
114 }
115
116 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
117 const Register thread,
118 const Register tmp1) {
119 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
120 // Is marking active?
121 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
122 __ ldrw(tmp1, in_progress);
123 } else {
124 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
125 __ ldrb(tmp1, in_progress);
126 }
127 }
128
129 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
130 const Register obj,
131 const Register pre_val,
132 const Register thread,
133 const Register tmp1,
134 const Register tmp2,
135 Label& done,
136 Label& runtime) {
137 // Do we need to load the previous value?
138 if (obj != noreg) {
139 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
140 }
141 // Is the previous value null?
142 __ cbz(pre_val, done);
143 generate_queue_test_and_insertion(masm,
144 G1ThreadLocalData::satb_mark_queue_index_offset(),
145 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
146 runtime,
147 thread, pre_val, tmp1, tmp2);
148 __ b(done);
149 }
150
151 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
152 Register obj,
153 Register pre_val,
154 Register thread,
155 Register tmp1,
156 Register tmp2,
157 bool tosca_live,
158 bool expand_call) {
159 // If expand_call is true then we expand the call_VM_leaf macro
160 // directly to skip generating the check by
161 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
162
163 assert(thread == rthread, "must be");
164
165 Label done;
166 Label runtime;
167
168 assert_different_registers(obj, pre_val, tmp1, tmp2);
169 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
170
171 generate_pre_barrier_fast_path(masm, thread, tmp1);
172 // If marking is not active (*(mark queue active address) == 0), jump to done
173 __ cbzw(tmp1, done);
174 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
175
176 __ bind(runtime);
177
178 __ push_call_clobbered_registers();
179
180 // Calling the runtime using the regular call_VM_leaf mechanism generates
181 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
182 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
183 //
184 // If we care generating the pre-barrier without a frame (e.g. in the
185 // intrinsified Reference.get() routine) then rfp might be pointing to
186 // the caller frame and so this check will most likely fail at runtime.
187 //
188 // Expanding the call directly bypasses the generation of the check.
189 // So when we do not have have a full interpreter frame on the stack
190 // expand_call should be passed true.
191
192 if (expand_call) {
193 assert(pre_val != c_rarg1, "smashed arg");
194 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
195 } else {
196 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
197 }
198
199 __ pop_call_clobbered_registers();
200
201 __ bind(done);
202
203 }
204
205 static void generate_post_barrier_fast_path(MacroAssembler* masm,
206 const Register store_addr,
207 const Register new_val,
208 const Register tmp1,
209 const Register tmp2,
210 Label& done,
211 bool new_val_may_be_null) {
212 // Does store cross heap regions?
213 #if INCLUDE_CDS
214 // AOT code needs to load the barrier grain shift from the aot
215 // runtime constants area in the code cache otherwise we can compile
216 // it as an immediate operand
217 if (SCCache::is_on_for_write()) {
218 address grain_shift_address = (address)AOTRuntimeConstants::grain_shift_address();
219 __ eor(tmp1, store_addr, new_val);
220 __ lea(tmp2, ExternalAddress(grain_shift_address));
221 __ ldrb(tmp2, tmp2);
222 __ lsrv(tmp1, tmp1, tmp2);
223 __ cbz(tmp1, done);
224 } else
225 #endif
226 {
227 __ eor(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
228 __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
229 __ cbz(tmp1, done);
230 }
231
232 // Crosses regions, storing null?
233 if (new_val_may_be_null) {
234 __ cbz(new_val, done);
235 }
236 // Storing region crossing non-null, is card young?
237
238 #if INCLUDE_CDS
239 // AOT code needs to load the barrier card shift from the aot
240 // runtime constants area in the code cache otherwise we can compile
241 // it as an immediate operand
242 if (SCCache::is_on_for_write()) {
243 address card_shift_address = (address)AOTRuntimeConstants::card_shift_address();
244 __ lea(tmp2, ExternalAddress(card_shift_address));
245 __ ldrb(tmp2, tmp2);
246 __ lsrv(tmp1, store_addr, tmp2); // tmp1 := card address relative to card table base
247 } else
248 #endif
249 {
250 __ lsr(tmp1, store_addr, CardTable::card_shift()); // tmp1 := card address relative to card table base
251 }
252
253 __ load_byte_map_base(tmp2); // tmp2 := card table base address
254 __ add(tmp1, tmp1, tmp2); // tmp1 := card address
255 __ ldrb(tmp2, Address(tmp1)); // tmp2 := card
256 __ cmpw(tmp2, (int)G1CardTable::g1_young_card_val()); // tmp2 := card == young_card_val?
257 }
258
259 static void generate_post_barrier_slow_path(MacroAssembler* masm,
260 const Register thread,
261 const Register tmp1,
262 const Register tmp2,
263 Label& done,
264 Label& runtime) {
265 __ membar(Assembler::StoreLoad); // StoreLoad membar
266 __ ldrb(tmp2, Address(tmp1)); // tmp2 := card
267 __ cbzw(tmp2, done);
268 // Storing a region crossing, non-null oop, card is clean.
269 // Dirty card and log.
270 STATIC_ASSERT(CardTable::dirty_card_val() == 0);
271 __ strb(zr, Address(tmp1)); // *(card address) := dirty_card_val
272 generate_queue_test_and_insertion(masm,
273 G1ThreadLocalData::dirty_card_queue_index_offset(),
274 G1ThreadLocalData::dirty_card_queue_buffer_offset(),
275 runtime,
276 thread, tmp1, tmp2, rscratch1);
277 __ b(done);
278 }
279
280 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
281 Register store_addr,
282 Register new_val,
283 Register thread,
284 Register tmp1,
285 Register tmp2) {
286 assert(thread == rthread, "must be");
287 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
288 rscratch1);
289 assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
290 && tmp2 != noreg, "expecting a register");
291
292 Label done;
293 Label runtime;
294
295 generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, done, true /* new_val_may_be_null */);
296 // If card is young, jump to done
297 __ br(Assembler::EQ, done);
298 generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, done, runtime);
299
300 __ bind(runtime);
301 // save the live input values
302 RegSet saved = RegSet::of(store_addr);
303 __ push(saved, sp);
304 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp1, thread);
305 __ pop(saved, sp);
306
307 __ bind(done);
308 }
309
310 #if defined(COMPILER2)
311
312 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
313 SaveLiveRegisters save_registers(masm, stub);
314 if (c_rarg0 != arg) {
315 __ mov(c_rarg0, arg);
316 }
317 __ mov(c_rarg1, rthread);
318 __ lea(rscratch1, RuntimeAddress(runtime_path));
319 __ blr(rscratch1);
320 }
321
322 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
323 Register obj,
324 Register pre_val,
325 Register thread,
326 Register tmp1,
327 Register tmp2,
328 G1PreBarrierStubC2* stub) {
329 assert(thread == rthread, "must be");
330 assert_different_registers(obj, pre_val, tmp1, tmp2);
331 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
332
333 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
334
335 generate_pre_barrier_fast_path(masm, thread, tmp1);
336 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
337 __ cbnzw(tmp1, *stub->entry());
338
339 __ bind(*stub->continuation());
340 }
341
342 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
343 G1PreBarrierStubC2* stub) const {
344 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
345 Label runtime;
346 Register obj = stub->obj();
347 Register pre_val = stub->pre_val();
348 Register thread = stub->thread();
349 Register tmp1 = stub->tmp1();
350 Register tmp2 = stub->tmp2();
351
352 __ bind(*stub->entry());
353 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
354
355 __ bind(runtime);
356 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
357 __ b(*stub->continuation());
358 }
359
360 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
361 Register store_addr,
362 Register new_val,
363 Register thread,
364 Register tmp1,
365 Register tmp2,
366 G1PostBarrierStubC2* stub) {
367 assert(thread == rthread, "must be");
368 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
369 rscratch1);
370 assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
371 && tmp2 != noreg, "expecting a register");
372
373 stub->initialize_registers(thread, tmp1, tmp2);
374
375 bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
376 generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, *stub->continuation(), new_val_may_be_null);
377 // If card is not young, jump to stub (slow path)
378 __ br(Assembler::NE, *stub->entry());
379
380 __ bind(*stub->continuation());
381 }
382
383 void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
384 G1PostBarrierStubC2* stub) const {
385 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
386 Label runtime;
387 Register thread = stub->thread();
388 Register tmp1 = stub->tmp1(); // tmp1 holds the card address.
389 Register tmp2 = stub->tmp2();
390 assert(stub->tmp3() == noreg, "not needed in this platform");
391
392 __ bind(*stub->entry());
393 generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, *stub->continuation(), runtime);
394
395 __ bind(runtime);
396 generate_c2_barrier_runtime_call(masm, stub, tmp1, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry));
397 __ b(*stub->continuation());
398 }
399
400 #endif // COMPILER2
401
402 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
403 Register dst, Address src, Register tmp1, Register tmp2) {
404 bool on_oop = is_reference_type(type);
405 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
406 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
407 bool on_reference = on_weak || on_phantom;
408 ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
409 if (on_oop && on_reference) {
410 // LR is live. It must be saved around calls.
411 __ enter(/*strip_ret_addr*/true); // barrier may call runtime
412 // Generate the G1 pre-barrier code to log the value of
413 // the referent field in an SATB buffer.
414 g1_write_barrier_pre(masm /* masm */,
415 noreg /* obj */,
416 dst /* pre_val */,
417 rthread /* thread */,
418 tmp1 /* tmp1 */,
419 tmp2 /* tmp2 */,
420 true /* tosca_live */,
421 true /* expand_call */);
422 __ leave();
423 }
424 }
425
426 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
427 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
428 // flatten object address if needed
429 if (dst.index() == noreg && dst.offset() == 0) {
430 if (dst.base() != tmp3) {
431 __ mov(tmp3, dst.base());
432 }
433 } else {
434 __ lea(tmp3, dst);
435 }
436
437 g1_write_barrier_pre(masm,
438 tmp3 /* obj */,
439 tmp2 /* pre_val */,
440 rthread /* thread */,
441 tmp1 /* tmp1 */,
442 rscratch2 /* tmp2 */,
443 val != noreg /* tosca_live */,
444 false /* expand_call */);
445
446 if (val == noreg) {
447 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
448 } else {
449 // G1 barrier needs uncompressed oop for region cross check.
450 Register new_val = val;
451 if (UseCompressedOops) {
452 new_val = rscratch2;
453 __ mov(new_val, val);
454 }
455 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
456 g1_write_barrier_post(masm,
457 tmp3 /* store_adr */,
458 new_val /* new_val */,
459 rthread /* thread */,
460 tmp1 /* tmp1 */,
461 tmp2 /* tmp2 */);
462 }
463
464 }
465
466 #ifdef COMPILER1
467
468 #undef __
469 #define __ ce->masm()->
470
471 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
472 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
473 // At this point we know that marking is in progress.
474 // If do_load() is true then we have to emit the
475 // load of the previous value; otherwise it has already
476 // been loaded into _pre_val.
477
478 __ bind(*stub->entry());
479
480 assert(stub->pre_val()->is_register(), "Precondition.");
481
482 Register pre_val_reg = stub->pre_val()->as_register();
483
484 if (stub->do_load()) {
485 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
486 }
487 __ cbz(pre_val_reg, *stub->continuation());
488 ce->store_parameter(stub->pre_val()->as_register(), 0);
489 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
490 __ b(*stub->continuation());
491 }
492
493 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
494 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
495 __ bind(*stub->entry());
496 assert(stub->addr()->is_register(), "Precondition.");
497 assert(stub->new_val()->is_register(), "Precondition.");
498 Register new_val_reg = stub->new_val()->as_register();
499 __ cbz(new_val_reg, *stub->continuation());
500 ce->store_parameter(stub->addr()->as_pointer_register(), 0);
501 __ far_call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
502 __ b(*stub->continuation());
503 }
504
505 #undef __
506
507 #define __ sasm->
508
509 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
510 __ prologue("g1_pre_barrier", false);
511
512 // arg0 : previous value of memory
513
514 BarrierSet* bs = BarrierSet::barrier_set();
515
516 const Register pre_val = r0;
517 const Register thread = rthread;
518 const Register tmp = rscratch1;
519
520 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
521 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
522 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
523
524 Label done;
525 Label runtime;
526
527 // Is marking still active?
528 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
529 __ ldrw(tmp, in_progress);
530 } else {
531 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
532 __ ldrb(tmp, in_progress);
533 }
534 __ cbzw(tmp, done);
535
536 // Can we store original value in the thread's buffer?
537 __ ldr(tmp, queue_index);
538 __ cbz(tmp, runtime);
539
540 __ sub(tmp, tmp, wordSize);
541 __ str(tmp, queue_index);
542 __ ldr(rscratch2, buffer);
543 __ add(tmp, tmp, rscratch2);
544 __ load_parameter(0, rscratch2);
545 __ str(rscratch2, Address(tmp, 0));
546 __ b(done);
547
548 __ bind(runtime);
549 __ push_call_clobbered_registers();
550 __ load_parameter(0, pre_val);
551 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
552 __ pop_call_clobbered_registers();
553 __ bind(done);
554
555 __ epilogue();
556 }
557
558 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
559 __ prologue("g1_post_barrier", false);
560
561 // arg0: store_address
562 Address store_addr(rfp, 2*BytesPerWord);
563
564 BarrierSet* bs = BarrierSet::barrier_set();
565 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
566 CardTable* ct = ctbs->card_table();
567
568 Label done;
569 Label runtime;
570
571 // At this point we know new_value is non-null and the new_value crosses regions.
572 // Must check to see if card is already dirty
573
574 const Register thread = rthread;
575
576 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
577 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
578
579 const Register card_offset = rscratch2;
580 // LR is free here, so we can use it to hold the byte_map_base.
581 const Register byte_map_base = lr;
582
583 assert_different_registers(card_offset, byte_map_base, rscratch1);
584
585 __ load_parameter(0, card_offset);
586 __ lsr(card_offset, card_offset, CardTable::card_shift());
587 __ load_byte_map_base(byte_map_base);
588 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
589 __ cmpw(rscratch1, (int)G1CardTable::g1_young_card_val());
590 __ br(Assembler::EQ, done);
591
592 assert((int)CardTable::dirty_card_val() == 0, "must be 0");
593
594 __ membar(Assembler::StoreLoad);
595 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
596 __ cbzw(rscratch1, done);
597
598 // storing region crossing non-null, card is clean.
599 // dirty card and log.
600 __ strb(zr, Address(byte_map_base, card_offset));
601
602 // Convert card offset into an address in card_addr
603 Register card_addr = card_offset;
604 __ add(card_addr, byte_map_base, card_addr);
605
606 __ ldr(rscratch1, queue_index);
607 __ cbz(rscratch1, runtime);
608 __ sub(rscratch1, rscratch1, wordSize);
609 __ str(rscratch1, queue_index);
610
611 // Reuse LR to hold buffer_addr
612 const Register buffer_addr = lr;
613
614 __ ldr(buffer_addr, buffer);
615 __ str(card_addr, Address(buffer_addr, rscratch1));
616 __ b(done);
617
618 __ bind(runtime);
619 __ push_call_clobbered_registers();
620 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
621 __ pop_call_clobbered_registers();
622 __ bind(done);
623 __ epilogue();
624 }
625
626 #undef __
627
628 #endif // COMPILER1