227 }
228
229 __ pop_call_clobbered_registers();
230
231 __ bind(done);
232
233 }
234
235 static void generate_post_barrier(MacroAssembler* masm,
236 const Register store_addr,
237 const Register new_val,
238 const Register thread,
239 const Register tmp1,
240 const Register tmp2,
241 Label& done,
242 bool new_val_may_be_null) {
243 assert(thread == rthread, "must be");
244 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
245
246 // Does store cross heap regions?
247 #if INCLUDE_CDS
248 // AOT code needs to load the barrier grain shift from the aot
249 // runtime constants area in the code cache otherwise we can compile
250 // it as an immediate operand
251 if (AOTCodeCache::is_on_for_dump()) {
252 address grain_shift_address = (address)AOTRuntimeConstants::grain_shift_address();
253 __ eor(tmp1, store_addr, new_val);
254 __ lea(tmp2, ExternalAddress(grain_shift_address));
255 __ ldrb(tmp2, tmp2);
256 __ lsrv(tmp1, tmp1, tmp2);
257 __ cbz(tmp1, done);
258 } else
259 #endif
260 {
261 __ eor(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
262 __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
263 __ cbz(tmp1, done);
264 }
265
266 // Crosses regions, storing null?
267 if (new_val_may_be_null) {
284
285 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
286 Register store_addr,
287 Register new_val,
288 Register thread,
289 Register tmp1,
290 Register tmp2) {
291 Label done;
292 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
293 __ bind(done);
294 }
295
296 #if defined(COMPILER2)
297
298 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
299 SaveLiveRegisters save_registers(masm, stub);
300 if (c_rarg0 != arg) {
301 __ mov(c_rarg0, arg);
302 }
303 __ mov(c_rarg1, rthread);
304 __ mov(rscratch1, runtime_path);
305 __ blr(rscratch1);
306 }
307
308 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
309 Register obj,
310 Register pre_val,
311 Register thread,
312 Register tmp1,
313 Register tmp2,
314 G1PreBarrierStubC2* stub) {
315 assert(thread == rthread, "must be");
316 assert_different_registers(obj, pre_val, tmp1, tmp2);
317 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
318
319 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
320
321 generate_pre_barrier_fast_path(masm, thread, tmp1);
322 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
323 __ cbnzw(tmp1, *stub->entry());
324
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227 }
228
229 __ pop_call_clobbered_registers();
230
231 __ bind(done);
232
233 }
234
235 static void generate_post_barrier(MacroAssembler* masm,
236 const Register store_addr,
237 const Register new_val,
238 const Register thread,
239 const Register tmp1,
240 const Register tmp2,
241 Label& done,
242 bool new_val_may_be_null) {
243 assert(thread == rthread, "must be");
244 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
245
246 // Does store cross heap regions?
247 #if INCLUDE_CDS
248 // AOT code needs to load the barrier grain shift from the aot
249 // runtime constants area in the code cache otherwise we can compile
250 // it as an immediate operand
251 if (AOTCodeCache::is_on_for_dump()) {
252 address grain_shift_address = (address)AOTRuntimeConstants::grain_shift_address();
253 __ eor(tmp1, store_addr, new_val);
254 __ lea(tmp2, ExternalAddress(grain_shift_address));
255 __ ldrb(tmp2, tmp2);
256 __ lsrv(tmp1, tmp1, tmp2);
257 __ cbz(tmp1, done);
258 } else
259 #endif
260 {
261 __ eor(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
262 __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
263 __ cbz(tmp1, done);
264 }
265
266 // Crosses regions, storing null?
267 if (new_val_may_be_null) {
284
285 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
286 Register store_addr,
287 Register new_val,
288 Register thread,
289 Register tmp1,
290 Register tmp2) {
291 Label done;
292 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
293 __ bind(done);
294 }
295
296 #if defined(COMPILER2)
297
298 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
299 SaveLiveRegisters save_registers(masm, stub);
300 if (c_rarg0 != arg) {
301 __ mov(c_rarg0, arg);
302 }
303 __ mov(c_rarg1, rthread);
304 __ lea(rscratch1, RuntimeAddress(runtime_path));
305 __ blr(rscratch1);
306 }
307
308 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
309 Register obj,
310 Register pre_val,
311 Register thread,
312 Register tmp1,
313 Register tmp2,
314 G1PreBarrierStubC2* stub) {
315 assert(thread == rthread, "must be");
316 assert_different_registers(obj, pre_val, tmp1, tmp2);
317 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
318
319 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
320
321 generate_pre_barrier_fast_path(masm, thread, tmp1);
322 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
323 __ cbnzw(tmp1, *stub->entry());
324
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