src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp

@@ -242,11 +242,11 @@
                                    bool new_val_may_be_null) {
    assert(thread == rthread, "must be");
    assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
  
    // Does store cross heap regions?
-  #if INCLUDE_CDS
+ #if INCLUDE_CDS
    // AOT code needs to load the barrier grain shift from the aot
    // runtime constants area in the code cache otherwise we can compile
    // it as an immediate operand
    if (AOTCodeCache::is_on_for_dump()) {
      address grain_shift_address = (address)AOTRuntimeConstants::grain_shift_address();

@@ -299,11 +299,11 @@
    SaveLiveRegisters save_registers(masm, stub);
    if (c_rarg0 != arg) {
      __ mov(c_rarg0, arg);
    }
    __ mov(c_rarg1, rthread);
-   __ mov(rscratch1, runtime_path);
+   __ lea(rscratch1, RuntimeAddress(runtime_path));
    __ blr(rscratch1);
  }
  
  void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
                                                      Register obj,