1 /*
 2  * Copyright (c) 1997, 2023, Oracle and/or its affiliates. All rights reserved.
 3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "code/icBuffer.hpp"
30 #include "gc/shared/collectedHeap.inline.hpp"
31 #include "interpreter/bytecodes.hpp"
32 #include "memory/resourceArea.hpp"
33 #include "nativeInst_aarch64.hpp"
34 #include "oops/oop.inline.hpp"
35 
36 int InlineCacheBuffer::ic_stub_code_size() {
37   return (MacroAssembler::far_branches() ? 6 : 4) * NativeInstruction::instruction_size;
38 }
39 
40 #define __ masm->
41 
42 void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
43   ResourceMark rm;
44   CodeBuffer      code(code_begin, ic_stub_code_size());
45   MacroAssembler* masm            = new MacroAssembler(&code);
46   // note: even though the code contains an embedded value, we do not need reloc info
47   // because
48   // (1) the value is old (i.e., doesn't matter for scavenges)
49   // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
50   // assert(cached_value == nullptr || cached_oop->is_perm(), "must be perm oop");
51 
52   address start = __ pc();
53   Label l;
54   __ ldr(rscratch2, l);
55   int jump_code_size = __ far_jump(ExternalAddress(entry_point));
56   // IC stub code size is not expected to vary depending on target address.
57   // We use NOPs to make the [ldr + far_jump + nops + int64] stub size equal to ic_stub_code_size.
58   for (int size = NativeInstruction::instruction_size + jump_code_size + 8;
59            size < ic_stub_code_size(); size += NativeInstruction::instruction_size) {
60     __ nop();
61   }
62   __ bind(l);
63   assert((uintptr_t)__ pc() % wordSize == 0, "");
64   __ emit_int64((int64_t)cached_value);
65   // Only need to invalidate the 1st two instructions - not the whole ic stub
66   ICache::invalidate_range(code_begin, InlineCacheBuffer::ic_stub_code_size());
67   assert(__ pc() - start == ic_stub_code_size(), "must be");
68 }
69 
70 address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
71   NativeMovConstReg* move = nativeMovConstReg_at(code_begin);   // creation also verifies the object
72   NativeJump* jump = nativeJump_at(code_begin + 4);
73   return jump->jump_destination();
74 }
75 
76 
77 void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
78   // The word containing the cached value is at the end of this IC buffer
79   uintptr_t *p = (uintptr_t *)(code_begin + ic_stub_code_size() - wordSize);
80   void* o = (void*)*p;
81   return o;
82 }