11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "metaprogramming/enableIf.hpp"
32 #include "oops/compressedOops.hpp"
33 #include "oops/compressedKlass.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/powerOfTwo.hpp"
36
37 class OopMap;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46
47 public:
48 using Assembler::mov;
49 using Assembler::movi;
50
1295 // always updated, even if we're not using the trampoline.
1296
1297 // Emit a direct call if the entry address will always be in range,
1298 // otherwise a trampoline call.
1299 // Supported entry.rspec():
1300 // - relocInfo::runtime_call_type
1301 // - relocInfo::opt_virtual_call_type
1302 // - relocInfo::static_call_type
1303 // - relocInfo::virtual_call_type
1304 //
1305 // Return: the call PC or null if CodeCache is full.
1306 // Clobbers: rscratch1
1307 address trampoline_call(Address entry);
1308
1309 static bool far_branches() {
1310 return ReservedCodeCacheSize > branch_range;
1311 }
1312
1313 // Check if branches to the non nmethod section require a far jump
1314 static bool codestub_branch_needs_far_jump() {
1315 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1316 }
1317
1318 // Emit a direct call/jump if the entry address will always be in range,
1319 // otherwise a far call/jump.
1320 // The address must be inside the code cache.
1321 // Supported entry.rspec():
1322 // - relocInfo::external_word_type
1323 // - relocInfo::runtime_call_type
1324 // - relocInfo::none
1325 // In the case of a far call/jump, the entry address is put in the tmp register.
1326 // The tmp register is invalidated.
1327 //
1328 // Far_jump returns the amount of the emitted code.
1329 void far_call(Address entry, Register tmp = rscratch1);
1330 int far_jump(Address entry, Register tmp = rscratch1);
1331
1332 static int far_codestub_branch_size() {
1333 if (codestub_branch_needs_far_jump()) {
1334 return 3 * 4; // adrp, add, br
1442 add(rscratch1, rscratch1, rscratch2,
1443 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1444 br(rscratch1);
1445 }
1446
1447 // Form an address from base + offset in Rd. Rd may or may not
1448 // actually be used: you must use the Address that is returned. It
1449 // is up to you to ensure that the shift provided matches the size
1450 // of your data.
1451 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1452
1453 // Return true iff an address is within the 48-bit AArch64 address
1454 // space.
1455 bool is_valid_AArch64_address(address a) {
1456 return ((uint64_t)a >> 48) == 0;
1457 }
1458
1459 // Load the base of the cardtable byte map into reg.
1460 void load_byte_map_base(Register reg);
1461
1462 // Prolog generator routines to support switch between x86 code and
1463 // generated ARM code
1464
1465 // routine to generate an x86 prolog for a stub function which
1466 // bootstraps into the generated ARM code which directly follows the
1467 // stub
1468 //
1469
1470 public:
1471
1472 void ldr_constant(Register dest, const Address &const_addr) {
1473 if (NearCpool) {
1474 ldr(dest, const_addr);
1475 } else {
1476 uint64_t offset;
1477 adrp(dest, InternalAddress(const_addr.target()), offset);
1478 ldr(dest, Address(dest, offset));
1479 }
1480 }
1481
|
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "code/SCCache.hpp"
32 #include "metaprogramming/enableIf.hpp"
33 #include "oops/compressedOops.hpp"
34 #include "oops/compressedKlass.hpp"
35 #include "runtime/vm_version.hpp"
36 #include "utilities/powerOfTwo.hpp"
37
38 class OopMap;
39
40 // MacroAssembler extends Assembler by frequently used macros.
41 //
42 // Instructions for which a 'better' code sequence exists depending
43 // on arguments should also go in here.
44
45 class MacroAssembler: public Assembler {
46 friend class LIR_Assembler;
47
48 public:
49 using Assembler::mov;
50 using Assembler::movi;
51
1296 // always updated, even if we're not using the trampoline.
1297
1298 // Emit a direct call if the entry address will always be in range,
1299 // otherwise a trampoline call.
1300 // Supported entry.rspec():
1301 // - relocInfo::runtime_call_type
1302 // - relocInfo::opt_virtual_call_type
1303 // - relocInfo::static_call_type
1304 // - relocInfo::virtual_call_type
1305 //
1306 // Return: the call PC or null if CodeCache is full.
1307 // Clobbers: rscratch1
1308 address trampoline_call(Address entry);
1309
1310 static bool far_branches() {
1311 return ReservedCodeCacheSize > branch_range;
1312 }
1313
1314 // Check if branches to the non nmethod section require a far jump
1315 static bool codestub_branch_needs_far_jump() {
1316 if (SCCache::is_on_for_write()) {
1317 // To calculate far_codestub_branch_size correctly.
1318 return true;
1319 }
1320 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1321 }
1322
1323 // Emit a direct call/jump if the entry address will always be in range,
1324 // otherwise a far call/jump.
1325 // The address must be inside the code cache.
1326 // Supported entry.rspec():
1327 // - relocInfo::external_word_type
1328 // - relocInfo::runtime_call_type
1329 // - relocInfo::none
1330 // In the case of a far call/jump, the entry address is put in the tmp register.
1331 // The tmp register is invalidated.
1332 //
1333 // Far_jump returns the amount of the emitted code.
1334 void far_call(Address entry, Register tmp = rscratch1);
1335 int far_jump(Address entry, Register tmp = rscratch1);
1336
1337 static int far_codestub_branch_size() {
1338 if (codestub_branch_needs_far_jump()) {
1339 return 3 * 4; // adrp, add, br
1447 add(rscratch1, rscratch1, rscratch2,
1448 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1449 br(rscratch1);
1450 }
1451
1452 // Form an address from base + offset in Rd. Rd may or may not
1453 // actually be used: you must use the Address that is returned. It
1454 // is up to you to ensure that the shift provided matches the size
1455 // of your data.
1456 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1457
1458 // Return true iff an address is within the 48-bit AArch64 address
1459 // space.
1460 bool is_valid_AArch64_address(address a) {
1461 return ((uint64_t)a >> 48) == 0;
1462 }
1463
1464 // Load the base of the cardtable byte map into reg.
1465 void load_byte_map_base(Register reg);
1466
1467 // Load a constant address in the AOT Runtime Constants area
1468 void load_aotrc_address(Register reg, address a);
1469
1470 // Prolog generator routines to support switch between x86 code and
1471 // generated ARM code
1472
1473 // routine to generate an x86 prolog for a stub function which
1474 // bootstraps into the generated ARM code which directly follows the
1475 // stub
1476 //
1477
1478 public:
1479
1480 void ldr_constant(Register dest, const Address &const_addr) {
1481 if (NearCpool) {
1482 ldr(dest, const_addr);
1483 } else {
1484 uint64_t offset;
1485 adrp(dest, InternalAddress(const_addr.target()), offset);
1486 ldr(dest, Address(dest, offset));
1487 }
1488 }
1489
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