11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "metaprogramming/enableIf.hpp"
32 #include "oops/compressedOops.hpp"
33 #include "oops/compressedKlass.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/powerOfTwo.hpp"
36
37 class OopMap;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46
47 public:
48 using Assembler::mov;
49 using Assembler::movi;
50
1298 // always updated, even if we're not using the trampoline.
1299
1300 // Emit a direct call if the entry address will always be in range,
1301 // otherwise a trampoline call.
1302 // Supported entry.rspec():
1303 // - relocInfo::runtime_call_type
1304 // - relocInfo::opt_virtual_call_type
1305 // - relocInfo::static_call_type
1306 // - relocInfo::virtual_call_type
1307 //
1308 // Return: the call PC or null if CodeCache is full.
1309 // Clobbers: rscratch1
1310 address trampoline_call(Address entry);
1311
1312 static bool far_branches() {
1313 return ReservedCodeCacheSize > branch_range;
1314 }
1315
1316 // Check if branches to the non nmethod section require a far jump
1317 static bool codestub_branch_needs_far_jump() {
1318 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1319 }
1320
1321 // Emit a direct call/jump if the entry address will always be in range,
1322 // otherwise a far call/jump.
1323 // The address must be inside the code cache.
1324 // Supported entry.rspec():
1325 // - relocInfo::external_word_type
1326 // - relocInfo::runtime_call_type
1327 // - relocInfo::none
1328 // In the case of a far call/jump, the entry address is put in the tmp register.
1329 // The tmp register is invalidated.
1330 //
1331 // Far_jump returns the amount of the emitted code.
1332 void far_call(Address entry, Register tmp = rscratch1);
1333 int far_jump(Address entry, Register tmp = rscratch1);
1334
1335 static int far_codestub_branch_size() {
1336 if (codestub_branch_needs_far_jump()) {
1337 return 3 * 4; // adrp, add, br
1445 add(rscratch1, rscratch1, rscratch2,
1446 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1447 br(rscratch1);
1448 }
1449
1450 // Form an address from base + offset in Rd. Rd may or may not
1451 // actually be used: you must use the Address that is returned. It
1452 // is up to you to ensure that the shift provided matches the size
1453 // of your data.
1454 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1455
1456 // Return true iff an address is within the 48-bit AArch64 address
1457 // space.
1458 bool is_valid_AArch64_address(address a) {
1459 return ((uint64_t)a >> 48) == 0;
1460 }
1461
1462 // Load the base of the cardtable byte map into reg.
1463 void load_byte_map_base(Register reg);
1464
1465 // Prolog generator routines to support switch between x86 code and
1466 // generated ARM code
1467
1468 // routine to generate an x86 prolog for a stub function which
1469 // bootstraps into the generated ARM code which directly follows the
1470 // stub
1471 //
1472
1473 public:
1474
1475 void ldr_constant(Register dest, const Address &const_addr) {
1476 if (NearCpool) {
1477 ldr(dest, const_addr);
1478 } else {
1479 uint64_t offset;
1480 adrp(dest, InternalAddress(const_addr.target()), offset);
1481 ldr(dest, Address(dest, offset));
1482 }
1483 }
1484
|
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "code/SCCache.hpp"
32 #include "metaprogramming/enableIf.hpp"
33 #include "oops/compressedOops.hpp"
34 #include "oops/compressedKlass.hpp"
35 #include "runtime/vm_version.hpp"
36 #include "utilities/powerOfTwo.hpp"
37
38 class OopMap;
39
40 // MacroAssembler extends Assembler by frequently used macros.
41 //
42 // Instructions for which a 'better' code sequence exists depending
43 // on arguments should also go in here.
44
45 class MacroAssembler: public Assembler {
46 friend class LIR_Assembler;
47
48 public:
49 using Assembler::mov;
50 using Assembler::movi;
51
1299 // always updated, even if we're not using the trampoline.
1300
1301 // Emit a direct call if the entry address will always be in range,
1302 // otherwise a trampoline call.
1303 // Supported entry.rspec():
1304 // - relocInfo::runtime_call_type
1305 // - relocInfo::opt_virtual_call_type
1306 // - relocInfo::static_call_type
1307 // - relocInfo::virtual_call_type
1308 //
1309 // Return: the call PC or null if CodeCache is full.
1310 // Clobbers: rscratch1
1311 address trampoline_call(Address entry);
1312
1313 static bool far_branches() {
1314 return ReservedCodeCacheSize > branch_range;
1315 }
1316
1317 // Check if branches to the non nmethod section require a far jump
1318 static bool codestub_branch_needs_far_jump() {
1319 if (SCCache::is_on_for_write()) {
1320 // To calculate far_codestub_branch_size correctly.
1321 return true;
1322 }
1323 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1324 }
1325
1326 // Emit a direct call/jump if the entry address will always be in range,
1327 // otherwise a far call/jump.
1328 // The address must be inside the code cache.
1329 // Supported entry.rspec():
1330 // - relocInfo::external_word_type
1331 // - relocInfo::runtime_call_type
1332 // - relocInfo::none
1333 // In the case of a far call/jump, the entry address is put in the tmp register.
1334 // The tmp register is invalidated.
1335 //
1336 // Far_jump returns the amount of the emitted code.
1337 void far_call(Address entry, Register tmp = rscratch1);
1338 int far_jump(Address entry, Register tmp = rscratch1);
1339
1340 static int far_codestub_branch_size() {
1341 if (codestub_branch_needs_far_jump()) {
1342 return 3 * 4; // adrp, add, br
1450 add(rscratch1, rscratch1, rscratch2,
1451 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1452 br(rscratch1);
1453 }
1454
1455 // Form an address from base + offset in Rd. Rd may or may not
1456 // actually be used: you must use the Address that is returned. It
1457 // is up to you to ensure that the shift provided matches the size
1458 // of your data.
1459 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1460
1461 // Return true iff an address is within the 48-bit AArch64 address
1462 // space.
1463 bool is_valid_AArch64_address(address a) {
1464 return ((uint64_t)a >> 48) == 0;
1465 }
1466
1467 // Load the base of the cardtable byte map into reg.
1468 void load_byte_map_base(Register reg);
1469
1470 // Load a constant address in the AOT Runtime Constants area
1471 void load_aotrc_address(Register reg, address a);
1472
1473 // Prolog generator routines to support switch between x86 code and
1474 // generated ARM code
1475
1476 // routine to generate an x86 prolog for a stub function which
1477 // bootstraps into the generated ARM code which directly follows the
1478 // stub
1479 //
1480
1481 public:
1482
1483 void ldr_constant(Register dest, const Address &const_addr) {
1484 if (NearCpool) {
1485 ldr(dest, const_addr);
1486 } else {
1487 uint64_t offset;
1488 adrp(dest, InternalAddress(const_addr.target()), offset);
1489 ldr(dest, Address(dest, offset));
1490 }
1491 }
1492
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