11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "metaprogramming/enableIf.hpp"
32 #include "oops/compressedOops.hpp"
33 #include "oops/compressedKlass.hpp"
34 #include "runtime/vm_version.hpp"
35 #include "utilities/powerOfTwo.hpp"
36
37 class OopMap;
38
39 // MacroAssembler extends Assembler by frequently used macros.
40 //
41 // Instructions for which a 'better' code sequence exists depending
42 // on arguments should also go in here.
43
44 class MacroAssembler: public Assembler {
45 friend class LIR_Assembler;
46
47 public:
48 using Assembler::mov;
49 using Assembler::movi;
50
1284 // always updated, even if we're not using the trampoline.
1285
1286 // Emit a direct call if the entry address will always be in range,
1287 // otherwise a trampoline call.
1288 // Supported entry.rspec():
1289 // - relocInfo::runtime_call_type
1290 // - relocInfo::opt_virtual_call_type
1291 // - relocInfo::static_call_type
1292 // - relocInfo::virtual_call_type
1293 //
1294 // Return: the call PC or null if CodeCache is full.
1295 // Clobbers: rscratch1
1296 address trampoline_call(Address entry);
1297
1298 static bool far_branches() {
1299 return ReservedCodeCacheSize > branch_range;
1300 }
1301
1302 // Check if branches to the non nmethod section require a far jump
1303 static bool codestub_branch_needs_far_jump() {
1304 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1305 }
1306
1307 // Emit a direct call/jump if the entry address will always be in range,
1308 // otherwise a far call/jump.
1309 // The address must be inside the code cache.
1310 // Supported entry.rspec():
1311 // - relocInfo::external_word_type
1312 // - relocInfo::runtime_call_type
1313 // - relocInfo::none
1314 // In the case of a far call/jump, the entry address is put in the tmp register.
1315 // The tmp register is invalidated.
1316 //
1317 // Far_jump returns the amount of the emitted code.
1318 void far_call(Address entry, Register tmp = rscratch1);
1319 int far_jump(Address entry, Register tmp = rscratch1);
1320
1321 static int far_codestub_branch_size() {
1322 if (codestub_branch_needs_far_jump()) {
1323 return 3 * 4; // adrp, add, br
1431 add(rscratch1, rscratch1, rscratch2,
1432 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1433 br(rscratch1);
1434 }
1435
1436 // Form an address from base + offset in Rd. Rd may or may not
1437 // actually be used: you must use the Address that is returned. It
1438 // is up to you to ensure that the shift provided matches the size
1439 // of your data.
1440 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1441
1442 // Return true iff an address is within the 48-bit AArch64 address
1443 // space.
1444 bool is_valid_AArch64_address(address a) {
1445 return ((uint64_t)a >> 48) == 0;
1446 }
1447
1448 // Load the base of the cardtable byte map into reg.
1449 void load_byte_map_base(Register reg);
1450
1451 // Prolog generator routines to support switch between x86 code and
1452 // generated ARM code
1453
1454 // routine to generate an x86 prolog for a stub function which
1455 // bootstraps into the generated ARM code which directly follows the
1456 // stub
1457 //
1458
1459 public:
1460
1461 void ldr_constant(Register dest, const Address &const_addr) {
1462 if (NearCpool) {
1463 ldr(dest, const_addr);
1464 } else {
1465 uint64_t offset;
1466 adrp(dest, InternalAddress(const_addr.target()), offset);
1467 ldr(dest, Address(dest, offset));
1468 }
1469 }
1470
|
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "code/vmreg.hpp"
31 #include "code/SCCache.hpp"
32 #include "metaprogramming/enableIf.hpp"
33 #include "oops/compressedOops.hpp"
34 #include "oops/compressedKlass.hpp"
35 #include "runtime/vm_version.hpp"
36 #include "utilities/powerOfTwo.hpp"
37
38 class OopMap;
39
40 // MacroAssembler extends Assembler by frequently used macros.
41 //
42 // Instructions for which a 'better' code sequence exists depending
43 // on arguments should also go in here.
44
45 class MacroAssembler: public Assembler {
46 friend class LIR_Assembler;
47
48 public:
49 using Assembler::mov;
50 using Assembler::movi;
51
1285 // always updated, even if we're not using the trampoline.
1286
1287 // Emit a direct call if the entry address will always be in range,
1288 // otherwise a trampoline call.
1289 // Supported entry.rspec():
1290 // - relocInfo::runtime_call_type
1291 // - relocInfo::opt_virtual_call_type
1292 // - relocInfo::static_call_type
1293 // - relocInfo::virtual_call_type
1294 //
1295 // Return: the call PC or null if CodeCache is full.
1296 // Clobbers: rscratch1
1297 address trampoline_call(Address entry);
1298
1299 static bool far_branches() {
1300 return ReservedCodeCacheSize > branch_range;
1301 }
1302
1303 // Check if branches to the non nmethod section require a far jump
1304 static bool codestub_branch_needs_far_jump() {
1305 if (SCCache::is_on_for_write()) {
1306 // To calculate far_codestub_branch_size correctly.
1307 return true;
1308 }
1309 return CodeCache::max_distance_to_non_nmethod() > branch_range;
1310 }
1311
1312 // Emit a direct call/jump if the entry address will always be in range,
1313 // otherwise a far call/jump.
1314 // The address must be inside the code cache.
1315 // Supported entry.rspec():
1316 // - relocInfo::external_word_type
1317 // - relocInfo::runtime_call_type
1318 // - relocInfo::none
1319 // In the case of a far call/jump, the entry address is put in the tmp register.
1320 // The tmp register is invalidated.
1321 //
1322 // Far_jump returns the amount of the emitted code.
1323 void far_call(Address entry, Register tmp = rscratch1);
1324 int far_jump(Address entry, Register tmp = rscratch1);
1325
1326 static int far_codestub_branch_size() {
1327 if (codestub_branch_needs_far_jump()) {
1328 return 3 * 4; // adrp, add, br
1436 add(rscratch1, rscratch1, rscratch2,
1437 ext::sxtw, exact_log2(stride * Assembler::instruction_size));
1438 br(rscratch1);
1439 }
1440
1441 // Form an address from base + offset in Rd. Rd may or may not
1442 // actually be used: you must use the Address that is returned. It
1443 // is up to you to ensure that the shift provided matches the size
1444 // of your data.
1445 Address form_address(Register Rd, Register base, int64_t byte_offset, int shift);
1446
1447 // Return true iff an address is within the 48-bit AArch64 address
1448 // space.
1449 bool is_valid_AArch64_address(address a) {
1450 return ((uint64_t)a >> 48) == 0;
1451 }
1452
1453 // Load the base of the cardtable byte map into reg.
1454 void load_byte_map_base(Register reg);
1455
1456 // Load a constant address in the AOT Runtime Constants area
1457 void load_aotrc_address(Register reg, address a);
1458
1459 // Prolog generator routines to support switch between x86 code and
1460 // generated ARM code
1461
1462 // routine to generate an x86 prolog for a stub function which
1463 // bootstraps into the generated ARM code which directly follows the
1464 // stub
1465 //
1466
1467 public:
1468
1469 void ldr_constant(Register dest, const Address &const_addr) {
1470 if (NearCpool) {
1471 ldr(dest, const_addr);
1472 } else {
1473 uint64_t offset;
1474 adrp(dest, InternalAddress(const_addr.target()), offset);
1475 ldr(dest, Address(dest, offset));
1476 }
1477 }
1478
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