src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

@@ -26,10 +26,11 @@
  #ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  #define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
  
  #include "asm/assembler.inline.hpp"
  #include "code/vmreg.hpp"
+ #include "code/SCCache.hpp"
  #include "metaprogramming/enableIf.hpp"
  #include "oops/compressedOops.hpp"
  #include "oops/compressedKlass.hpp"
  #include "runtime/vm_version.hpp"
  #include "utilities/powerOfTwo.hpp"

@@ -1256,10 +1257,14 @@
      return ReservedCodeCacheSize > branch_range;
    }
  
    // Check if branches to the non nmethod section require a far jump
    static bool codestub_branch_needs_far_jump() {
+     if (SCCache::is_on_for_write()) {
+       // To calculate far_codestub_branch_size correctly.
+       return true;
+     }
      return CodeCache::max_distance_to_non_nmethod() > branch_range;
    }
  
    // Emit a direct call/jump if the entry address will always be in range,
    // otherwise a far call/jump.

@@ -1403,10 +1408,13 @@
    }
  
    // Load the base of the cardtable byte map into reg.
    void load_byte_map_base(Register reg);
  
+   // Load a constant address in the AOT Runtime Constants area
+   void load_aotrc_address(Register reg, address a);
+ 
    // Prolog generator routines to support switch between x86 code and
    // generated ARM code
  
    // routine to generate an x86 prolog for a stub function which
    // bootstraps into the generated ARM code which directly follows the