1 /*
  2  * Copyright (c) 2018, 2023, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "asm/macroAssembler.inline.hpp"
 27 #if INCLUDE_CDS
 28 #include "code/SCCache.hpp"
 29 #endif
 30 #include "gc/g1/g1BarrierSet.hpp"
 31 #include "gc/g1/g1BarrierSetAssembler.hpp"
 32 #include "gc/g1/g1BarrierSetRuntime.hpp"
 33 #include "gc/g1/g1CardTable.hpp"
 34 #include "gc/g1/g1HeapRegion.hpp"
 35 #include "gc/g1/g1ThreadLocalData.hpp"
 36 #include "interpreter/interp_masm.hpp"
 37 #include "runtime/sharedRuntime.hpp"
 38 #include "utilities/debug.hpp"
 39 #include "utilities/macros.hpp"
 40 #ifdef COMPILER1
 41 #include "c1/c1_LIRAssembler.hpp"
 42 #include "c1/c1_MacroAssembler.hpp"
 43 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 44 #endif
 45 
 46 #define __ masm->
 47 
 48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 49                                                             Register addr, Register count) {
 50   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 51 
 52   if (!dest_uninitialized) {
 53     Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 54 #ifndef _LP64
 55     __ push(thread);
 56     __ get_thread(thread);
 57 #endif
 58 
 59     Label filtered;
 60     Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 61     // Is marking active?
 62     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 63       __ cmpl(in_progress, 0);
 64     } else {
 65       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 66       __ cmpb(in_progress, 0);
 67     }
 68 
 69     NOT_LP64(__ pop(thread);)
 70 
 71     __ jcc(Assembler::equal, filtered);
 72 
 73     __ push_call_clobbered_registers(false /* save_fpu */);
 74 #ifdef _LP64
 75     if (count == c_rarg0) {
 76       if (addr == c_rarg1) {
 77         // exactly backwards!!
 78         __ xchgptr(c_rarg1, c_rarg0);
 79       } else {
 80         __ movptr(c_rarg1, count);
 81         __ movptr(c_rarg0, addr);
 82       }
 83     } else {
 84       __ movptr(c_rarg0, addr);
 85       __ movptr(c_rarg1, count);
 86     }
 87     if (UseCompressedOops) {
 88       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 89     } else {
 90       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 91     }
 92 #else
 93     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry),
 94                     addr, count);
 95 #endif
 96     __ pop_call_clobbered_registers(false /* save_fpu */);
 97 
 98     __ bind(filtered);
 99   }
100 }
101 
102 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
103                                                              Register addr, Register count, Register tmp) {
104   __ push_call_clobbered_registers(false /* save_fpu */);
105 #ifdef _LP64
106   if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
107     assert_different_registers(c_rarg1, addr);
108     __ mov(c_rarg1, count);
109     __ mov(c_rarg0, addr);
110   } else {
111     assert_different_registers(c_rarg0, count);
112     __ mov(c_rarg0, addr);
113     __ mov(c_rarg1, count);
114   }
115   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
116 #else
117   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry),
118                   addr, count);
119 #endif
120   __ pop_call_clobbered_registers(false /* save_fpu */);
121 }
122 
123 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
124                                     Register dst, Address src, Register tmp1, Register tmp_thread) {
125   bool on_oop = is_reference_type(type);
126   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
127   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
128   bool on_reference = on_weak || on_phantom;
129   ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
130   if (on_oop && on_reference) {
131     Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
132 
133 #ifndef _LP64
134     // Work around the x86_32 bug that only manifests with Loom for some reason.
135     // MacroAssembler::resolve_weak_handle calls this barrier with tmp_thread == noreg.
136     if (thread == noreg) {
137       if (dst != rcx && tmp1 != rcx) {
138         thread = rcx;
139       } else if (dst != rdx && tmp1 != rdx) {
140         thread = rdx;
141       } else if (dst != rdi && tmp1 != rdi) {
142         thread = rdi;
143       }
144     }
145     assert_different_registers(dst, tmp1, thread);
146     __ push(thread);
147     __ get_thread(thread);
148 #endif
149 
150     // Generate the G1 pre-barrier code to log the value of
151     // the referent field in an SATB buffer.
152     g1_write_barrier_pre(masm /* masm */,
153                          noreg /* obj */,
154                          dst /* pre_val */,
155                          thread /* thread */,
156                          tmp1 /* tmp */,
157                          true /* tosca_live */,
158                          true /* expand_call */);
159 
160 #ifndef _LP64
161     __ pop(thread);
162 #endif
163   }
164 }
165 
166 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
167                                                  Register obj,
168                                                  Register pre_val,
169                                                  Register thread,
170                                                  Register tmp,
171                                                  bool tosca_live,
172                                                  bool expand_call) {
173   // If expand_call is true then we expand the call_VM_leaf macro
174   // directly to skip generating the check by
175   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
176 
177 #ifdef _LP64
178   assert(thread == r15_thread, "must be");
179 #endif // _LP64
180 
181   Label done;
182   Label runtime;
183 
184   assert(pre_val != noreg, "check this code");
185 
186   if (obj != noreg) {
187     assert_different_registers(obj, pre_val, tmp);
188     assert(pre_val != rax, "check this code");
189   }
190 
191   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
192   Address index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
193   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
194 
195   // Is marking active?
196   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
197     __ cmpl(in_progress, 0);
198   } else {
199     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
200     __ cmpb(in_progress, 0);
201   }
202   __ jcc(Assembler::equal, done);
203 
204   // Do we need to load the previous value?
205   if (obj != noreg) {
206     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
207   }
208 
209   // Is the previous value null?
210   __ cmpptr(pre_val, NULL_WORD);
211   __ jcc(Assembler::equal, done);
212 
213   // Can we store original value in the thread's buffer?
214   // Is index == 0?
215   // (The index field is typed as size_t.)
216 
217   __ movptr(tmp, index);                   // tmp := *index_adr
218   __ cmpptr(tmp, 0);                       // tmp == 0?
219   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
220 
221   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
222   __ movptr(index, tmp);                   // *index_adr := tmp
223   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
224 
225   // Record the previous value
226   __ movptr(Address(tmp, 0), pre_val);
227   __ jmp(done);
228 
229   __ bind(runtime);
230 
231   // Determine and save the live input values
232   __ push_call_clobbered_registers();
233 
234   // Calling the runtime using the regular call_VM_leaf mechanism generates
235   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
236   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == nullptr.
237   //
238   // If we care generating the pre-barrier without a frame (e.g. in the
239   // intrinsified Reference.get() routine) then ebp might be pointing to
240   // the caller frame and so this check will most likely fail at runtime.
241   //
242   // Expanding the call directly bypasses the generation of the check.
243   // So when we do not have have a full interpreter frame on the stack
244   // expand_call should be passed true.
245 
246   if (expand_call) {
247     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
248 #ifdef _LP64
249     if (c_rarg1 != thread) {
250       __ mov(c_rarg1, thread);
251     }
252     if (c_rarg0 != pre_val) {
253       __ mov(c_rarg0, pre_val);
254     }
255 #else
256     __ push(thread);
257     __ push(pre_val);
258 #endif
259     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2);
260   } else {
261     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
262   }
263 
264   __ pop_call_clobbered_registers();
265 
266   __ bind(done);
267 }
268 
269 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
270                                                   Register store_addr,
271                                                   Register new_val,
272                                                   Register thread,
273                                                   Register tmp,
274                                                   Register tmp2) {
275 #ifdef _LP64
276   assert(thread == r15_thread, "must be");
277 #endif // _LP64
278 
279   Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
280   Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
281 
282   CardTableBarrierSet* ct =
283     barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
284 
285   Label done;
286   Label runtime;
287 
288   // Does store cross heap regions?
289 
290 #if INCLUDE_CDS
291   // AOT code needs to load the barrier grain shift from the aot
292   // runtime constants area in the code cache otherwise we can compile
293   // it as an immediate operand
294 
295   if (SCCache::is_on_for_write()) {
296     address grain_shift_addr = AOTRuntimeConstants::grain_shift_address();
297     __ movptr(tmp, store_addr);
298     __ xorptr(tmp, new_val);
299     __ push(rscratch1);
300     __ push(rcx);
301     __ lea(rscratch1, ExternalAddress(grain_shift_addr));
302     __ movptr(rcx, Address(rscratch1, 0));
303     __ shrptr(tmp);
304     __ pop(rcx);
305     __ pop(rscratch1);
306     __ jcc(Assembler::equal, done);
307   } else
308 #endif // INCLUDE_CDS
309   {
310     __ movptr(tmp, store_addr);
311     __ xorptr(tmp, new_val);
312     __ shrptr(tmp, G1HeapRegion::LogOfHRGrainBytes);
313     __ jcc(Assembler::equal, done);
314   }
315   // crosses regions, storing null?
316 
317   __ cmpptr(new_val, NULL_WORD);
318   __ jcc(Assembler::equal, done);
319 
320   // storing region crossing non-null, is card already dirty?
321 
322   const Register card_addr = tmp;
323 
324   __ movptr(card_addr, store_addr);
325 #if INCLUDE_CDS
326   // AOT code needs to load the barrier card shift from the aot
327   // runtime constants area in the code cache otherwise we can compile
328   // it as an immediate operand
329   if (SCCache::is_on_for_write()) {
330     address card_shift_addr = AOTRuntimeConstants::card_shift_address();
331     __ push(rscratch1);
332     __ push(rcx);
333     __ lea(rscratch1, ExternalAddress(card_shift_addr));
334     __ movptr(rcx, Address(rscratch1, 0));
335     __ shrptr(card_addr);
336     __ pop(rcx);
337     __ pop(rscratch1);
338   } else
339 #endif // INCLUDE_CDS
340   {
341     __ shrptr(card_addr, CardTable::card_shift());
342   }
343 
344   const Register cardtable = tmp2;
345 
346   // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
347   // a valid address and therefore is not properly handled by the relocation code.
348   if (SCCache::is_on_for_write()) {
349     // SCA needs relocation info for this address
350     __ lea(cardtable, ExternalAddress((address)ct->card_table()->byte_map_base()));
351   } else {
352     __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
353   }
354   __ addptr(card_addr, cardtable);
355 
356   __ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val());
357   __ jcc(Assembler::equal, done);
358 
359   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
360   __ cmpb(Address(card_addr, 0), G1CardTable::dirty_card_val());
361   __ jcc(Assembler::equal, done);
362 
363 
364   // storing a region crossing, non-null oop, card is clean.
365   // dirty card and log.
366 
367   __ movb(Address(card_addr, 0), G1CardTable::dirty_card_val());
368 
369   // The code below assumes that buffer index is pointer sized.
370   STATIC_ASSERT(in_bytes(G1DirtyCardQueue::byte_width_of_index()) == sizeof(intptr_t));
371 
372   __ movptr(tmp2, queue_index);
373   __ testptr(tmp2, tmp2);
374   __ jcc(Assembler::zero, runtime);
375   __ subptr(tmp2, wordSize);
376   __ movptr(queue_index, tmp2);
377   __ addptr(tmp2, buffer);
378   __ movptr(Address(tmp2, 0), card_addr);
379   __ jmp(done);
380 
381   __ bind(runtime);
382   // save the live input values
383   RegSet saved = RegSet::of(store_addr NOT_LP64(COMMA thread));
384   __ push_set(saved);
385   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
386   __ pop_set(saved);
387 
388   __ bind(done);
389 }
390 
391 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
392                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
393   bool in_heap = (decorators & IN_HEAP) != 0;
394   bool as_normal = (decorators & AS_NORMAL) != 0;
395 
396   bool needs_pre_barrier = as_normal;
397   bool needs_post_barrier = val != noreg && in_heap;
398 
399   Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
400   // flatten object address if needed
401   // We do it regardless of precise because we need the registers
402   if (dst.index() == noreg && dst.disp() == 0) {
403     if (dst.base() != tmp1) {
404       __ movptr(tmp1, dst.base());
405     }
406   } else {
407     __ lea(tmp1, dst);
408   }
409 
410 #ifndef _LP64
411   InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
412 #endif
413 
414   NOT_LP64(__ get_thread(rcx));
415   NOT_LP64(imasm->save_bcp());
416 
417   if (needs_pre_barrier) {
418     g1_write_barrier_pre(masm /*masm*/,
419                          tmp1 /* obj */,
420                          tmp2 /* pre_val */,
421                          rthread /* thread */,
422                          tmp3  /* tmp */,
423                          val != noreg /* tosca_live */,
424                          false /* expand_call */);
425   }
426   if (val == noreg) {
427     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
428   } else {
429     Register new_val = val;
430     if (needs_post_barrier) {
431       // G1 barrier needs uncompressed oop for region cross check.
432       if (UseCompressedOops) {
433         new_val = tmp2;
434         __ movptr(new_val, val);
435       }
436     }
437     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
438     if (needs_post_barrier) {
439       g1_write_barrier_post(masm /*masm*/,
440                             tmp1 /* store_adr */,
441                             new_val /* new_val */,
442                             rthread /* thread */,
443                             tmp3 /* tmp */,
444                             tmp2 /* tmp2 */);
445     }
446   }
447   NOT_LP64(imasm->restore_bcp());
448 }
449 
450 #ifdef COMPILER1
451 
452 #undef __
453 #define __ ce->masm()->
454 
455 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
456   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
457   // At this point we know that marking is in progress.
458   // If do_load() is true then we have to emit the
459   // load of the previous value; otherwise it has already
460   // been loaded into _pre_val.
461 
462   __ bind(*stub->entry());
463   assert(stub->pre_val()->is_register(), "Precondition.");
464 
465   Register pre_val_reg = stub->pre_val()->as_register();
466 
467   if (stub->do_load()) {
468     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
469   }
470 
471   __ cmpptr(pre_val_reg, NULL_WORD);
472   __ jcc(Assembler::equal, *stub->continuation());
473   ce->store_parameter(stub->pre_val()->as_register(), 0);
474   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
475   __ jmp(*stub->continuation());
476 
477 }
478 
479 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
480   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
481   __ bind(*stub->entry());
482   assert(stub->addr()->is_register(), "Precondition.");
483   assert(stub->new_val()->is_register(), "Precondition.");
484   Register new_val_reg = stub->new_val()->as_register();
485   __ cmpptr(new_val_reg, NULL_WORD);
486   __ jcc(Assembler::equal, *stub->continuation());
487   ce->store_parameter(stub->addr()->as_pointer_register(), 0);
488   __ call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
489   __ jmp(*stub->continuation());
490 }
491 
492 #undef __
493 
494 #define __ sasm->
495 
496 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
497   // Generated code assumes that buffer index is pointer sized.
498   STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t));
499 
500   __ prologue("g1_pre_barrier", false);
501   // arg0 : previous value of memory
502 
503   __ push(rax);
504   __ push(rdx);
505 
506   const Register pre_val = rax;
507   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
508   const Register tmp = rdx;
509 
510   NOT_LP64(__ get_thread(thread);)
511 
512   Address queue_active(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
513   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
514   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
515 
516   Label done;
517   Label runtime;
518 
519   // Is marking still active?
520   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
521     __ cmpl(queue_active, 0);
522   } else {
523     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
524     __ cmpb(queue_active, 0);
525   }
526   __ jcc(Assembler::equal, done);
527 
528   // Can we store original value in the thread's buffer?
529 
530   __ movptr(tmp, queue_index);
531   __ testptr(tmp, tmp);
532   __ jcc(Assembler::zero, runtime);
533   __ subptr(tmp, wordSize);
534   __ movptr(queue_index, tmp);
535   __ addptr(tmp, buffer);
536 
537   // prev_val (rax)
538   __ load_parameter(0, pre_val);
539   __ movptr(Address(tmp, 0), pre_val);
540   __ jmp(done);
541 
542   __ bind(runtime);
543 
544   __ push_call_clobbered_registers();
545 
546   // load the pre-value
547   __ load_parameter(0, rcx);
548   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), rcx, thread);
549 
550   __ pop_call_clobbered_registers();
551 
552   __ bind(done);
553 
554   __ pop(rdx);
555   __ pop(rax);
556 
557   __ epilogue();
558 }
559 
560 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
561   __ prologue("g1_post_barrier", false);
562 
563   CardTableBarrierSet* ct =
564     barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
565 
566   Label done;
567   Label enqueued;
568   Label runtime;
569 
570   // At this point we know new_value is non-null and the new_value crosses regions.
571   // Must check to see if card is already dirty
572 
573   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
574 
575   Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
576   Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
577 
578   __ push(rax);
579   __ push(rcx);
580 
581   const Register cardtable = rax;
582   const Register card_addr = rcx;
583 
584   __ load_parameter(0, card_addr);
585   __ shrptr(card_addr, CardTable::card_shift());
586   // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
587   // a valid address and therefore is not properly handled by the relocation code.
588   if (SCCache::is_on()) {
589     // SCA needs relocation info for this address
590     __ lea(cardtable, ExternalAddress((address)ct->card_table()->byte_map_base()));
591   } else {
592     __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
593   }
594   __ addptr(card_addr, cardtable);
595 
596   NOT_LP64(__ get_thread(thread);)
597 
598   __ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val());
599   __ jcc(Assembler::equal, done);
600 
601   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
602   __ cmpb(Address(card_addr, 0), CardTable::dirty_card_val());
603   __ jcc(Assembler::equal, done);
604 
605   // storing region crossing non-null, card is clean.
606   // dirty card and log.
607 
608   __ movb(Address(card_addr, 0), CardTable::dirty_card_val());
609 
610   const Register tmp = rdx;
611   __ push(rdx);
612 
613   __ movptr(tmp, queue_index);
614   __ testptr(tmp, tmp);
615   __ jcc(Assembler::zero, runtime);
616   __ subptr(tmp, wordSize);
617   __ movptr(queue_index, tmp);
618   __ addptr(tmp, buffer);
619   __ movptr(Address(tmp, 0), card_addr);
620   __ jmp(enqueued);
621 
622   __ bind(runtime);
623   __ push_call_clobbered_registers();
624 
625   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
626 
627   __ pop_call_clobbered_registers();
628 
629   __ bind(enqueued);
630   __ pop(rdx);
631 
632   __ bind(done);
633   __ pop(rcx);
634   __ pop(rax);
635 
636   __ epilogue();
637 }
638 
639 #undef __
640 
641 #endif // COMPILER1