2225 
2226   void cache_wb(Address line);
2227   void cache_wbsync(bool is_pre);
2228 
2229 #ifdef COMPILER2_OR_JVMCI
2230   void generate_fill_avx3(BasicType type, Register to, Register value,
2231                           Register count, Register rtmp, XMMRegister xtmp);
2232 #endif // COMPILER2_OR_JVMCI
2233 #endif // _LP64
2234 
2235   void vallones(XMMRegister dst, int vector_len);
2236 
2237   void check_stack_alignment(Register sp, const char* msg, unsigned bias = 0, Register tmp = noreg);
2238 
2239   void lightweight_lock(Register basic_lock, Register obj, Register reg_rax, Register thread, Register tmp, Label& slow);
2240   void lightweight_unlock(Register obj, Register reg_rax, Register thread, Register tmp, Label& slow);
2241 
2242 #ifdef _LP64
2243   void save_legacy_gprs();
2244   void restore_legacy_gprs();

2245   void setcc(Assembler::Condition comparison, Register dst);
2246 #endif
2247 };
2248 
2249 #endif // CPU_X86_MACROASSEMBLER_X86_HPP

2225 
2226   void cache_wb(Address line);
2227   void cache_wbsync(bool is_pre);
2228 
2229 #ifdef COMPILER2_OR_JVMCI
2230   void generate_fill_avx3(BasicType type, Register to, Register value,
2231                           Register count, Register rtmp, XMMRegister xtmp);
2232 #endif // COMPILER2_OR_JVMCI
2233 #endif // _LP64
2234 
2235   void vallones(XMMRegister dst, int vector_len);
2236 
2237   void check_stack_alignment(Register sp, const char* msg, unsigned bias = 0, Register tmp = noreg);
2238 
2239   void lightweight_lock(Register basic_lock, Register obj, Register reg_rax, Register thread, Register tmp, Label& slow);
2240   void lightweight_unlock(Register obj, Register reg_rax, Register thread, Register tmp, Label& slow);
2241 
2242 #ifdef _LP64
2243   void save_legacy_gprs();
2244   void restore_legacy_gprs();
2245   void load_aotrc_address(Register reg, address a);
2246   void setcc(Assembler::Condition comparison, Register dst);
2247 #endif
2248 };
2249 
2250 #endif // CPU_X86_MACROASSEMBLER_X86_HPP