1 /*
2 * Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/macroAssembler.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "code/compiledIC.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/nativeInst.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "gc/shared/gcLocker.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "interpreter/interpreter.hpp"
36 #include "logging/log.hpp"
37 #include "memory/resourceArea.hpp"
38 #include "oops/klass.inline.hpp"
39 #include "prims/methodHandles.hpp"
40 #include "runtime/jniHandles.hpp"
41 #include "runtime/safepointMechanism.hpp"
42 #include "runtime/sharedRuntime.hpp"
43 #include "runtime/signature.hpp"
44 #include "runtime/stubRoutines.hpp"
45 #include "runtime/timerTrace.hpp"
46 #include "runtime/vframeArray.hpp"
47 #include "runtime/vm_version.hpp"
48 #include "utilities/align.hpp"
49 #include "vmreg_x86.inline.hpp"
50 #ifdef COMPILER1
51 #include "c1/c1_Runtime1.hpp"
52 #endif
53 #ifdef COMPILER2
54 #include "opto/runtime.hpp"
55 #endif
56
57 #define __ masm->
58
59 #ifdef PRODUCT
60 #define BLOCK_COMMENT(str) /* nothing */
61 #else
62 #define BLOCK_COMMENT(str) __ block_comment(str)
63 #endif // PRODUCT
64
65 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
66
67 class RegisterSaver {
68 // Capture info about frame layout
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
70 enum layout {
71 fpu_state_off = 0,
72 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
73 st0_off, st0H_off,
74 st1_off, st1H_off,
75 st2_off, st2H_off,
76 st3_off, st3H_off,
77 st4_off, st4H_off,
78 st5_off, st5H_off,
79 st6_off, st6H_off,
80 st7_off, st7H_off,
81 xmm_off,
82 DEF_XMM_OFFS(0),
83 DEF_XMM_OFFS(1),
84 DEF_XMM_OFFS(2),
85 DEF_XMM_OFFS(3),
86 DEF_XMM_OFFS(4),
87 DEF_XMM_OFFS(5),
88 DEF_XMM_OFFS(6),
89 DEF_XMM_OFFS(7),
90 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
91 rdi_off,
92 rsi_off,
93 ignore_off, // extra copy of rbp,
94 rsp_off,
95 rbx_off,
96 rdx_off,
97 rcx_off,
98 rax_off,
99 // The frame sender code expects that rbp will be in the "natural" place and
100 // will override any oopMap setting for it. We must therefore force the layout
101 // so that it agrees with the frame sender code.
102 rbp_off,
103 return_off, // slot for return address
104 reg_save_size };
105 enum { FPU_regs_live = flags_off - fpu_state_end };
106
107 public:
108
109 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
110 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
111 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
112
113 static int rax_offset() { return rax_off; }
114 static int rbx_offset() { return rbx_off; }
115
116 // Offsets into the register save area
117 // Used by deoptimization when it is managing result register
118 // values on its own
119
120 static int raxOffset(void) { return rax_off; }
121 static int rdxOffset(void) { return rdx_off; }
122 static int rbxOffset(void) { return rbx_off; }
123 static int xmm0Offset(void) { return xmm0_off; }
124 // This really returns a slot in the fp save area, which one is not important
125 static int fpResultOffset(void) { return st0_off; }
126
127 // During deoptimization only the result register need to be restored
128 // all the other values have already been extracted.
129
130 static void restore_result_registers(MacroAssembler* masm);
131
132 };
133
134 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
135 int* total_frame_words, bool verify_fpu, bool save_vectors) {
136 int num_xmm_regs = XMMRegister::number_of_registers;
137 int ymm_bytes = num_xmm_regs * 16;
138 int zmm_bytes = num_xmm_regs * 32;
139 #ifdef COMPILER2
140 int opmask_state_bytes = KRegister::number_of_registers * 8;
141 if (save_vectors) {
142 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
143 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
144 // Save upper half of YMM registers
145 int vect_bytes = ymm_bytes;
146 if (UseAVX > 2) {
147 // Save upper half of ZMM registers as well
148 vect_bytes += zmm_bytes;
149 additional_frame_words += opmask_state_bytes / wordSize;
150 }
151 additional_frame_words += vect_bytes / wordSize;
152 }
153 #else
154 assert(!save_vectors, "vectors are generated only by C2");
155 #endif
156 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
157 int frame_words = frame_size_in_bytes / wordSize;
158 *total_frame_words = frame_words;
159
160 assert(FPUStateSizeInWords == 27, "update stack layout");
161
162 // save registers, fpu state, and flags
163 // We assume caller has already has return address slot on the stack
164 // We push epb twice in this sequence because we want the real rbp,
165 // to be under the return like a normal enter and we want to use pusha
166 // We push by hand instead of using push.
167 __ enter();
168 __ pusha();
169 __ pushf();
170 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
171 __ push_FPU_state(); // Save FPU state & init
172
173 if (verify_fpu) {
174 // Some stubs may have non standard FPU control word settings so
175 // only check and reset the value when it required to be the
176 // standard value. The safepoint blob in particular can be used
177 // in methods which are using the 24 bit control word for
178 // optimized float math.
179
180 #ifdef ASSERT
181 // Make sure the control word has the expected value
182 Label ok;
183 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
184 __ jccb(Assembler::equal, ok);
185 __ stop("corrupted control word detected");
186 __ bind(ok);
187 #endif
188
189 // Reset the control word to guard against exceptions being unmasked
190 // since fstp_d can cause FPU stack underflow exceptions. Write it
191 // into the on stack copy and then reload that to make sure that the
192 // current and future values are correct.
193 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
194 }
195
196 __ frstor(Address(rsp, 0));
197 if (!verify_fpu) {
198 // Set the control word so that exceptions are masked for the
199 // following code.
200 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
201 }
202
203 int off = st0_off;
204 int delta = st1_off - off;
205
206 // Save the FPU registers in de-opt-able form
207 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
208 __ fstp_d(Address(rsp, off*wordSize));
209 off += delta;
210 }
211
212 off = xmm0_off;
213 delta = xmm1_off - off;
214 if(UseSSE == 1) {
215 // Save the XMM state
216 for (int n = 0; n < num_xmm_regs; n++) {
217 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
218 off += delta;
219 }
220 } else if(UseSSE >= 2) {
221 // Save whole 128bit (16 bytes) XMM registers
222 for (int n = 0; n < num_xmm_regs; n++) {
223 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
224 off += delta;
225 }
226 }
227
228 #ifdef COMPILER2
229 if (save_vectors) {
230 __ subptr(rsp, ymm_bytes);
231 // Save upper half of YMM registers
232 for (int n = 0; n < num_xmm_regs; n++) {
233 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
234 }
235 if (UseAVX > 2) {
236 __ subptr(rsp, zmm_bytes);
237 // Save upper half of ZMM registers
238 for (int n = 0; n < num_xmm_regs; n++) {
239 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
240 }
241 __ subptr(rsp, opmask_state_bytes);
242 // Save opmask registers
243 for (int n = 0; n < KRegister::number_of_registers; n++) {
244 __ kmov(Address(rsp, n*8), as_KRegister(n));
245 }
246 }
247 }
248 #else
249 assert(!save_vectors, "vectors are generated only by C2");
250 #endif
251
252 __ vzeroupper();
253
254 // Set an oopmap for the call site. This oopmap will map all
255 // oop-registers and debug-info registers as callee-saved. This
256 // will allow deoptimization at this safepoint to find all possible
257 // debug-info recordings, as well as let GC find all oops.
258
259 OopMapSet *oop_maps = new OopMapSet();
260 OopMap* map = new OopMap( frame_words, 0 );
261
262 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
263 #define NEXTREG(x) (x)->as_VMReg()->next()
264
265 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
266 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
267 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
268 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
269 // rbp, location is known implicitly, no oopMap
270 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
271 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
272
273 // %%% This is really a waste but we'll keep things as they were for now for the upper component
274 off = st0_off;
275 delta = st1_off - off;
276 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
277 FloatRegister freg_name = as_FloatRegister(n);
278 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
279 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
280 off += delta;
281 }
282 off = xmm0_off;
283 delta = xmm1_off - off;
284 for (int n = 0; n < num_xmm_regs; n++) {
285 XMMRegister xmm_name = as_XMMRegister(n);
286 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
287 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
288 off += delta;
289 }
290 #undef NEXTREG
291 #undef STACK_OFFSET
292
293 return map;
294 }
295
296 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
297 int opmask_state_bytes = 0;
298 int additional_frame_bytes = 0;
299 int num_xmm_regs = XMMRegister::number_of_registers;
300 int ymm_bytes = num_xmm_regs * 16;
301 int zmm_bytes = num_xmm_regs * 32;
302 // Recover XMM & FPU state
303 #ifdef COMPILER2
304 if (restore_vectors) {
305 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
306 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
307 // Save upper half of YMM registers
308 additional_frame_bytes = ymm_bytes;
309 if (UseAVX > 2) {
310 // Save upper half of ZMM registers as well
311 additional_frame_bytes += zmm_bytes;
312 opmask_state_bytes = KRegister::number_of_registers * 8;
313 additional_frame_bytes += opmask_state_bytes;
314 }
315 }
316 #else
317 assert(!restore_vectors, "vectors are generated only by C2");
318 #endif
319
320 int off = xmm0_off;
321 int delta = xmm1_off - off;
322
323 __ vzeroupper();
324
325 if (UseSSE == 1) {
326 // Restore XMM registers
327 assert(additional_frame_bytes == 0, "");
328 for (int n = 0; n < num_xmm_regs; n++) {
329 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
330 off += delta;
331 }
332 } else if (UseSSE >= 2) {
333 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
334 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
335 for (int n = 0; n < num_xmm_regs; n++) {
336 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
337 off += delta;
338 }
339 }
340
341 if (restore_vectors) {
342 off = additional_frame_bytes - ymm_bytes;
343 // Restore upper half of YMM registers.
344 for (int n = 0; n < num_xmm_regs; n++) {
345 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
346 }
347 if (UseAVX > 2) {
348 // Restore upper half of ZMM registers.
349 off = opmask_state_bytes;
350 for (int n = 0; n < num_xmm_regs; n++) {
351 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
352 }
353 for (int n = 0; n < KRegister::number_of_registers; n++) {
354 __ kmov(as_KRegister(n), Address(rsp, n*8));
355 }
356 }
357 __ addptr(rsp, additional_frame_bytes);
358 }
359
360 __ pop_FPU_state();
361 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
362
363 __ popf();
364 __ popa();
365 // Get the rbp, described implicitly by the frame sender code (no oopMap)
366 __ pop(rbp);
367 }
368
369 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
370
371 // Just restore result register. Only used by deoptimization. By
372 // now any callee save register that needs to be restore to a c2
373 // caller of the deoptee has been extracted into the vframeArray
374 // and will be stuffed into the c2i adapter we create for later
375 // restoration so only result registers need to be restored here.
376 //
377
378 __ frstor(Address(rsp, 0)); // Restore fpu state
379
380 // Recover XMM & FPU state
381 if( UseSSE == 1 ) {
382 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
383 } else if( UseSSE >= 2 ) {
384 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
385 }
386 __ movptr(rax, Address(rsp, rax_off*wordSize));
387 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
388 // Pop all of the register save are off the stack except the return address
389 __ addptr(rsp, return_off * wordSize);
390 }
391
392 // Is vector's size (in bytes) bigger than a size saved by default?
393 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
394 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
395 bool SharedRuntime::is_wide_vector(int size) {
396 return size > 16;
397 }
398
399 // The java_calling_convention describes stack locations as ideal slots on
400 // a frame with no abi restrictions. Since we must observe abi restrictions
401 // (like the placement of the register window) the slots must be biased by
402 // the following value.
403 static int reg2offset_in(VMReg r) {
404 // Account for saved rbp, and return address
405 // This should really be in_preserve_stack_slots
406 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
407 }
408
409 static int reg2offset_out(VMReg r) {
410 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
411 }
412
413 // ---------------------------------------------------------------------------
414 // Read the array of BasicTypes from a signature, and compute where the
415 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
416 // quantities. Values less than SharedInfo::stack0 are registers, those above
417 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
418 // as framesizes are fixed.
419 // VMRegImpl::stack0 refers to the first slot 0(sp).
420 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
421 // Register up to Register::number_of_registers are the 32-bit
422 // integer registers.
423
424 // Pass first two oop/int args in registers ECX and EDX.
425 // Pass first two float/double args in registers XMM0 and XMM1.
426 // Doubles have precedence, so if you pass a mix of floats and doubles
427 // the doubles will grab the registers before the floats will.
428
429 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
430 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
431 // units regardless of build. Of course for i486 there is no 64 bit build
432
433
434 // ---------------------------------------------------------------------------
435 // The compiled Java calling convention.
436 // Pass first two oop/int args in registers ECX and EDX.
437 // Pass first two float/double args in registers XMM0 and XMM1.
438 // Doubles have precedence, so if you pass a mix of floats and doubles
439 // the doubles will grab the registers before the floats will.
440 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
441 VMRegPair *regs,
442 int total_args_passed) {
443 uint stack = 0; // Starting stack position for args on stack
444
445
446 // Pass first two oop/int args in registers ECX and EDX.
447 uint reg_arg0 = 9999;
448 uint reg_arg1 = 9999;
449
450 // Pass first two float/double args in registers XMM0 and XMM1.
451 // Doubles have precedence, so if you pass a mix of floats and doubles
452 // the doubles will grab the registers before the floats will.
453 // CNC - TURNED OFF FOR non-SSE.
454 // On Intel we have to round all doubles (and most floats) at
455 // call sites by storing to the stack in any case.
456 // UseSSE=0 ==> Don't Use ==> 9999+0
457 // UseSSE=1 ==> Floats only ==> 9999+1
458 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
459 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
460 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
461 uint freg_arg0 = 9999+fargs;
462 uint freg_arg1 = 9999+fargs;
463
464 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
465 int i;
466 for( i = 0; i < total_args_passed; i++) {
467 if( sig_bt[i] == T_DOUBLE ) {
468 // first 2 doubles go in registers
469 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
470 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
471 else // Else double is passed low on the stack to be aligned.
472 stack += 2;
473 } else if( sig_bt[i] == T_LONG ) {
474 stack += 2;
475 }
476 }
477 int dstack = 0; // Separate counter for placing doubles
478
479 // Now pick where all else goes.
480 for( i = 0; i < total_args_passed; i++) {
481 // From the type and the argument number (count) compute the location
482 switch( sig_bt[i] ) {
483 case T_SHORT:
484 case T_CHAR:
485 case T_BYTE:
486 case T_BOOLEAN:
487 case T_INT:
488 case T_ARRAY:
489 case T_OBJECT:
490 case T_ADDRESS:
491 if( reg_arg0 == 9999 ) {
492 reg_arg0 = i;
493 regs[i].set1(rcx->as_VMReg());
494 } else if( reg_arg1 == 9999 ) {
495 reg_arg1 = i;
496 regs[i].set1(rdx->as_VMReg());
497 } else {
498 regs[i].set1(VMRegImpl::stack2reg(stack++));
499 }
500 break;
501 case T_FLOAT:
502 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
503 freg_arg0 = i;
504 regs[i].set1(xmm0->as_VMReg());
505 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
506 freg_arg1 = i;
507 regs[i].set1(xmm1->as_VMReg());
508 } else {
509 regs[i].set1(VMRegImpl::stack2reg(stack++));
510 }
511 break;
512 case T_LONG:
513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
514 regs[i].set2(VMRegImpl::stack2reg(dstack));
515 dstack += 2;
516 break;
517 case T_DOUBLE:
518 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
519 if( freg_arg0 == (uint)i ) {
520 regs[i].set2(xmm0->as_VMReg());
521 } else if( freg_arg1 == (uint)i ) {
522 regs[i].set2(xmm1->as_VMReg());
523 } else {
524 regs[i].set2(VMRegImpl::stack2reg(dstack));
525 dstack += 2;
526 }
527 break;
528 case T_VOID: regs[i].set_bad(); break;
529 break;
530 default:
531 ShouldNotReachHere();
532 break;
533 }
534 }
535
536 return stack;
537 }
538
539 // Patch the callers callsite with entry to compiled code if it exists.
540 static void patch_callers_callsite(MacroAssembler *masm) {
541 Label L;
542 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
543 __ jcc(Assembler::equal, L);
544 // Schedule the branch target address early.
545 // Call into the VM to patch the caller, then jump to compiled callee
546 // rax, isn't live so capture return address while we easily can
547 __ movptr(rax, Address(rsp, 0));
548 __ pusha();
549 __ pushf();
550
551 if (UseSSE == 1) {
552 __ subptr(rsp, 2*wordSize);
553 __ movflt(Address(rsp, 0), xmm0);
554 __ movflt(Address(rsp, wordSize), xmm1);
555 }
556 if (UseSSE >= 2) {
557 __ subptr(rsp, 4*wordSize);
558 __ movdbl(Address(rsp, 0), xmm0);
559 __ movdbl(Address(rsp, 2*wordSize), xmm1);
560 }
561 #ifdef COMPILER2
562 // C2 may leave the stack dirty if not in SSE2+ mode
563 if (UseSSE >= 2) {
564 __ verify_FPU(0, "c2i transition should have clean FPU stack");
565 } else {
566 __ empty_FPU_stack();
567 }
568 #endif /* COMPILER2 */
569
570 // VM needs caller's callsite
571 __ push(rax);
572 // VM needs target method
573 __ push(rbx);
574 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
575 __ addptr(rsp, 2*wordSize);
576
577 if (UseSSE == 1) {
578 __ movflt(xmm0, Address(rsp, 0));
579 __ movflt(xmm1, Address(rsp, wordSize));
580 __ addptr(rsp, 2*wordSize);
581 }
582 if (UseSSE >= 2) {
583 __ movdbl(xmm0, Address(rsp, 0));
584 __ movdbl(xmm1, Address(rsp, 2*wordSize));
585 __ addptr(rsp, 4*wordSize);
586 }
587
588 __ popf();
589 __ popa();
590 __ bind(L);
591 }
592
593
594 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
595 int next_off = st_off - Interpreter::stackElementSize;
596 __ movdbl(Address(rsp, next_off), r);
597 }
598
599 static void gen_c2i_adapter(MacroAssembler *masm,
600 int total_args_passed,
601 int comp_args_on_stack,
602 const BasicType *sig_bt,
603 const VMRegPair *regs,
604 Label& skip_fixup) {
605 // Before we get into the guts of the C2I adapter, see if we should be here
606 // at all. We've come from compiled code and are attempting to jump to the
607 // interpreter, which means the caller made a static call to get here
608 // (vcalls always get a compiled target if there is one). Check for a
609 // compiled target. If there is one, we need to patch the caller's call.
610 patch_callers_callsite(masm);
611
612 __ bind(skip_fixup);
613
614 #ifdef COMPILER2
615 // C2 may leave the stack dirty if not in SSE2+ mode
616 if (UseSSE >= 2) {
617 __ verify_FPU(0, "c2i transition should have clean FPU stack");
618 } else {
619 __ empty_FPU_stack();
620 }
621 #endif /* COMPILER2 */
622
623 // Since all args are passed on the stack, total_args_passed * interpreter_
624 // stack_element_size is the
625 // space we need.
626 int extraspace = total_args_passed * Interpreter::stackElementSize;
627
628 // Get return address
629 __ pop(rax);
630
631 // set senderSP value
632 __ movptr(rsi, rsp);
633
634 __ subptr(rsp, extraspace);
635
636 // Now write the args into the outgoing interpreter space
637 for (int i = 0; i < total_args_passed; i++) {
638 if (sig_bt[i] == T_VOID) {
639 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
640 continue;
641 }
642
643 // st_off points to lowest address on stack.
644 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
645 int next_off = st_off - Interpreter::stackElementSize;
646
647 // Say 4 args:
648 // i st_off
649 // 0 12 T_LONG
650 // 1 8 T_VOID
651 // 2 4 T_OBJECT
652 // 3 0 T_BOOL
653 VMReg r_1 = regs[i].first();
654 VMReg r_2 = regs[i].second();
655 if (!r_1->is_valid()) {
656 assert(!r_2->is_valid(), "");
657 continue;
658 }
659
660 if (r_1->is_stack()) {
661 // memory to memory use fpu stack top
662 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
663
664 if (!r_2->is_valid()) {
665 __ movl(rdi, Address(rsp, ld_off));
666 __ movptr(Address(rsp, st_off), rdi);
667 } else {
668
669 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
670 // st_off == MSW, st_off-wordSize == LSW
671
672 __ movptr(rdi, Address(rsp, ld_off));
673 __ movptr(Address(rsp, next_off), rdi);
674 __ movptr(rdi, Address(rsp, ld_off + wordSize));
675 __ movptr(Address(rsp, st_off), rdi);
676 }
677 } else if (r_1->is_Register()) {
678 Register r = r_1->as_Register();
679 if (!r_2->is_valid()) {
680 __ movl(Address(rsp, st_off), r);
681 } else {
682 // long/double in gpr
683 ShouldNotReachHere();
684 }
685 } else {
686 assert(r_1->is_XMMRegister(), "");
687 if (!r_2->is_valid()) {
688 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
689 } else {
690 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
691 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
692 }
693 }
694 }
695
696 // Schedule the branch target address early.
697 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
698 // And repush original return address
699 __ push(rax);
700 __ jmp(rcx);
701 }
702
703
704 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
705 int next_val_off = ld_off - Interpreter::stackElementSize;
706 __ movdbl(r, Address(saved_sp, next_val_off));
707 }
708
709 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
710 address code_start, address code_end,
711 Label& L_ok) {
712 Label L_fail;
713 __ lea(temp_reg, AddressLiteral(code_start, relocInfo::none));
714 __ cmpptr(pc_reg, temp_reg);
715 __ jcc(Assembler::belowEqual, L_fail);
716 __ lea(temp_reg, AddressLiteral(code_end, relocInfo::none));
717 __ cmpptr(pc_reg, temp_reg);
718 __ jcc(Assembler::below, L_ok);
719 __ bind(L_fail);
720 }
721
722 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
723 int total_args_passed,
724 int comp_args_on_stack,
725 const BasicType *sig_bt,
726 const VMRegPair *regs) {
727 // Note: rsi contains the senderSP on entry. We must preserve it since
728 // we may do a i2c -> c2i transition if we lose a race where compiled
729 // code goes non-entrant while we get args ready.
730
731 // Adapters can be frameless because they do not require the caller
732 // to perform additional cleanup work, such as correcting the stack pointer.
733 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
734 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
735 // even if a callee has modified the stack pointer.
736 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
737 // routinely repairs its caller's stack pointer (from sender_sp, which is set
738 // up via the senderSP register).
739 // In other words, if *either* the caller or callee is interpreted, we can
740 // get the stack pointer repaired after a call.
741 // This is why c2i and i2c adapters cannot be indefinitely composed.
742 // In particular, if a c2i adapter were to somehow call an i2c adapter,
743 // both caller and callee would be compiled methods, and neither would
744 // clean up the stack pointer changes performed by the two adapters.
745 // If this happens, control eventually transfers back to the compiled
746 // caller, but with an uncorrected stack, causing delayed havoc.
747
748 // Pick up the return address
749 __ movptr(rax, Address(rsp, 0));
750
751 if (VerifyAdapterCalls &&
752 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
753 // So, let's test for cascading c2i/i2c adapters right now.
754 // assert(Interpreter::contains($return_addr) ||
755 // StubRoutines::contains($return_addr),
756 // "i2c adapter must return to an interpreter frame");
757 __ block_comment("verify_i2c { ");
758 Label L_ok;
759 if (Interpreter::code() != nullptr) {
760 range_check(masm, rax, rdi,
761 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
762 L_ok);
763 }
764 if (StubRoutines::initial_stubs_code() != nullptr) {
765 range_check(masm, rax, rdi,
766 StubRoutines::initial_stubs_code()->code_begin(),
767 StubRoutines::initial_stubs_code()->code_end(),
768 L_ok);
769 }
770 if (StubRoutines::final_stubs_code() != nullptr) {
771 range_check(masm, rax, rdi,
772 StubRoutines::final_stubs_code()->code_begin(),
773 StubRoutines::final_stubs_code()->code_end(),
774 L_ok);
775 }
776 const char* msg = "i2c adapter must return to an interpreter frame";
777 __ block_comment(msg);
778 __ stop(msg);
779 __ bind(L_ok);
780 __ block_comment("} verify_i2ce ");
781 }
782
783 // Must preserve original SP for loading incoming arguments because
784 // we need to align the outgoing SP for compiled code.
785 __ movptr(rdi, rsp);
786
787 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
788 // in registers, we will occasionally have no stack args.
789 int comp_words_on_stack = 0;
790 if (comp_args_on_stack) {
791 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
792 // registers are below. By subtracting stack0, we either get a negative
793 // number (all values in registers) or the maximum stack slot accessed.
794 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
795 // Convert 4-byte stack slots to words.
796 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
797 // Round up to miminum stack alignment, in wordSize
798 comp_words_on_stack = align_up(comp_words_on_stack, 2);
799 __ subptr(rsp, comp_words_on_stack * wordSize);
800 }
801
802 // Align the outgoing SP
803 __ andptr(rsp, -(StackAlignmentInBytes));
804
805 // push the return address on the stack (note that pushing, rather
806 // than storing it, yields the correct frame alignment for the callee)
807 __ push(rax);
808
809 // Put saved SP in another register
810 const Register saved_sp = rax;
811 __ movptr(saved_sp, rdi);
812
813
814 // Will jump to the compiled code just as if compiled code was doing it.
815 // Pre-load the register-jump target early, to schedule it better.
816 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
817
818 // Now generate the shuffle code. Pick up all register args and move the
819 // rest through the floating point stack top.
820 for (int i = 0; i < total_args_passed; i++) {
821 if (sig_bt[i] == T_VOID) {
822 // Longs and doubles are passed in native word order, but misaligned
823 // in the 32-bit build.
824 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
825 continue;
826 }
827
828 // Pick up 0, 1 or 2 words from SP+offset.
829
830 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
831 "scrambled load targets?");
832 // Load in argument order going down.
833 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
834 // Point to interpreter value (vs. tag)
835 int next_off = ld_off - Interpreter::stackElementSize;
836 //
837 //
838 //
839 VMReg r_1 = regs[i].first();
840 VMReg r_2 = regs[i].second();
841 if (!r_1->is_valid()) {
842 assert(!r_2->is_valid(), "");
843 continue;
844 }
845 if (r_1->is_stack()) {
846 // Convert stack slot to an SP offset (+ wordSize to account for return address )
847 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
848
849 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
850 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
851 // we be generated.
852 if (!r_2->is_valid()) {
853 // __ fld_s(Address(saved_sp, ld_off));
854 // __ fstp_s(Address(rsp, st_off));
855 __ movl(rsi, Address(saved_sp, ld_off));
856 __ movptr(Address(rsp, st_off), rsi);
857 } else {
858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
859 // are accessed as negative so LSW is at LOW address
860
861 // ld_off is MSW so get LSW
862 // st_off is LSW (i.e. reg.first())
863 // __ fld_d(Address(saved_sp, next_off));
864 // __ fstp_d(Address(rsp, st_off));
865 //
866 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
867 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
868 // So we must adjust where to pick up the data to match the interpreter.
869 //
870 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
871 // are accessed as negative so LSW is at LOW address
872
873 // ld_off is MSW so get LSW
874 __ movptr(rsi, Address(saved_sp, next_off));
875 __ movptr(Address(rsp, st_off), rsi);
876 __ movptr(rsi, Address(saved_sp, ld_off));
877 __ movptr(Address(rsp, st_off + wordSize), rsi);
878 }
879 } else if (r_1->is_Register()) { // Register argument
880 Register r = r_1->as_Register();
881 assert(r != rax, "must be different");
882 if (r_2->is_valid()) {
883 //
884 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
885 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
886 // So we must adjust where to pick up the data to match the interpreter.
887
888 // this can be a misaligned move
889 __ movptr(r, Address(saved_sp, next_off));
890 assert(r_2->as_Register() != rax, "need another temporary register");
891 // Remember r_1 is low address (and LSB on x86)
892 // So r_2 gets loaded from high address regardless of the platform
893 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
894 } else {
895 __ movl(r, Address(saved_sp, ld_off));
896 }
897 } else {
898 assert(r_1->is_XMMRegister(), "");
899 if (!r_2->is_valid()) {
900 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
901 } else {
902 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
903 }
904 }
905 }
906
907 // 6243940 We might end up in handle_wrong_method if
908 // the callee is deoptimized as we race thru here. If that
909 // happens we don't want to take a safepoint because the
910 // caller frame will look interpreted and arguments are now
911 // "compiled" so it is much better to make this transition
912 // invisible to the stack walking code. Unfortunately if
913 // we try and find the callee by normal means a safepoint
914 // is possible. So we stash the desired callee in the thread
915 // and the vm will find there should this case occur.
916
917 __ get_thread(rax);
918 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
919
920 // move Method* to rax, in case we end up in an c2i adapter.
921 // the c2i adapters expect Method* in rax, (c2) because c2's
922 // resolve stubs return the result (the method) in rax,.
923 // I'd love to fix this.
924 __ mov(rax, rbx);
925
926 __ jmp(rdi);
927 }
928
929 // ---------------------------------------------------------------
930 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
931 int total_args_passed,
932 int comp_args_on_stack,
933 const BasicType *sig_bt,
934 const VMRegPair *regs,
935 AdapterFingerPrint* fingerprint) {
936 address i2c_entry = __ pc();
937
938 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
939
940 // -------------------------------------------------------------------------
941 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
942 // to the interpreter. The args start out packed in the compiled layout. They
943 // need to be unpacked into the interpreter layout. This will almost always
944 // require some stack space. We grow the current (compiled) stack, then repack
945 // the args. We finally end in a jump to the generic interpreter entry point.
946 // On exit from the interpreter, the interpreter will restore our SP (lest the
947 // compiled code, which relies solely on SP and not EBP, get sick).
948
949 address c2i_unverified_entry = __ pc();
950 Label skip_fixup;
951
952 Register data = rax;
953 Register receiver = rcx;
954 Register temp = rbx;
955
956 {
957 __ ic_check(1 /* end_alignment */);
958 __ movptr(rbx, Address(data, CompiledICData::speculated_method_offset()));
959 // Method might have been compiled since the call site was patched to
960 // interpreted if that is the case treat it as a miss so we can get
961 // the call site corrected.
962 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
963 __ jcc(Assembler::equal, skip_fixup);
964 }
965
966 address c2i_entry = __ pc();
967
968 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
969 bs->c2i_entry_barrier(masm);
970
971 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
972
973 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
974 }
975
976 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
977 VMRegPair *regs,
978 int total_args_passed) {
979
980 // We return the amount of VMRegImpl stack slots we need to reserve for all
981 // the arguments NOT counting out_preserve_stack_slots.
982
983 uint stack = 0; // All arguments on stack
984
985 for( int i = 0; i < total_args_passed; i++) {
986 // From the type and the argument number (count) compute the location
987 switch( sig_bt[i] ) {
988 case T_BOOLEAN:
989 case T_CHAR:
990 case T_FLOAT:
991 case T_BYTE:
992 case T_SHORT:
993 case T_INT:
994 case T_OBJECT:
995 case T_ARRAY:
996 case T_ADDRESS:
997 case T_METADATA:
998 regs[i].set1(VMRegImpl::stack2reg(stack++));
999 break;
1000 case T_LONG:
1001 case T_DOUBLE: // The stack numbering is reversed from Java
1002 // Since C arguments do not get reversed, the ordering for
1003 // doubles on the stack must be opposite the Java convention
1004 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1005 regs[i].set2(VMRegImpl::stack2reg(stack));
1006 stack += 2;
1007 break;
1008 case T_VOID: regs[i].set_bad(); break;
1009 default:
1010 ShouldNotReachHere();
1011 break;
1012 }
1013 }
1014 return stack;
1015 }
1016
1017 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1018 uint num_bits,
1019 uint total_args_passed) {
1020 Unimplemented();
1021 return 0;
1022 }
1023
1024 // A simple move of integer like type
1025 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1026 if (src.first()->is_stack()) {
1027 if (dst.first()->is_stack()) {
1028 // stack to stack
1029 // __ ld(FP, reg2offset(src.first()), L5);
1030 // __ st(L5, SP, reg2offset(dst.first()));
1031 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1032 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1033 } else {
1034 // stack to reg
1035 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1036 }
1037 } else if (dst.first()->is_stack()) {
1038 // reg to stack
1039 // no need to sign extend on 64bit
1040 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1041 } else {
1042 if (dst.first() != src.first()) {
1043 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1044 }
1045 }
1046 }
1047
1048 // An oop arg. Must pass a handle not the oop itself
1049 static void object_move(MacroAssembler* masm,
1050 OopMap* map,
1051 int oop_handle_offset,
1052 int framesize_in_slots,
1053 VMRegPair src,
1054 VMRegPair dst,
1055 bool is_receiver,
1056 int* receiver_offset) {
1057
1058 // Because of the calling conventions we know that src can be a
1059 // register or a stack location. dst can only be a stack location.
1060
1061 assert(dst.first()->is_stack(), "must be stack");
1062 // must pass a handle. First figure out the location we use as a handle
1063
1064 if (src.first()->is_stack()) {
1065 // Oop is already on the stack as an argument
1066 Register rHandle = rax;
1067 Label nil;
1068 __ xorptr(rHandle, rHandle);
1069 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD);
1070 __ jcc(Assembler::equal, nil);
1071 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1072 __ bind(nil);
1073 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1074
1075 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1076 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1077 if (is_receiver) {
1078 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1079 }
1080 } else {
1081 // Oop is in a register we must store it to the space we reserve
1082 // on the stack for oop_handles
1083 const Register rOop = src.first()->as_Register();
1084 const Register rHandle = rax;
1085 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1086 int offset = oop_slot*VMRegImpl::stack_slot_size;
1087 Label skip;
1088 __ movptr(Address(rsp, offset), rOop);
1089 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1090 __ xorptr(rHandle, rHandle);
1091 __ cmpptr(rOop, NULL_WORD);
1092 __ jcc(Assembler::equal, skip);
1093 __ lea(rHandle, Address(rsp, offset));
1094 __ bind(skip);
1095 // Store the handle parameter
1096 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1097 if (is_receiver) {
1098 *receiver_offset = offset;
1099 }
1100 }
1101 }
1102
1103 // A float arg may have to do float reg int reg conversion
1104 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1105 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1106
1107 // Because of the calling convention we know that src is either a stack location
1108 // or an xmm register. dst can only be a stack location.
1109
1110 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1111
1112 if (src.first()->is_stack()) {
1113 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1114 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1115 } else {
1116 // reg to stack
1117 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1118 }
1119 }
1120
1121 // A long move
1122 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1123
1124 // The only legal possibility for a long_move VMRegPair is:
1125 // 1: two stack slots (possibly unaligned)
1126 // as neither the java or C calling convention will use registers
1127 // for longs.
1128
1129 if (src.first()->is_stack() && dst.first()->is_stack()) {
1130 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1131 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1132 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1133 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1134 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1135 } else {
1136 ShouldNotReachHere();
1137 }
1138 }
1139
1140 // A double move
1141 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1142
1143 // The only legal possibilities for a double_move VMRegPair are:
1144 // The painful thing here is that like long_move a VMRegPair might be
1145
1146 // Because of the calling convention we know that src is either
1147 // 1: a single physical register (xmm registers only)
1148 // 2: two stack slots (possibly unaligned)
1149 // dst can only be a pair of stack slots.
1150
1151 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1152
1153 if (src.first()->is_stack()) {
1154 // source is all stack
1155 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1156 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1157 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1158 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1159 } else {
1160 // reg to stack
1161 // No worries about stack alignment
1162 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1163 }
1164 }
1165
1166
1167 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1168 // We always ignore the frame_slots arg and just use the space just below frame pointer
1169 // which by this time is free to use
1170 switch (ret_type) {
1171 case T_FLOAT:
1172 __ fstp_s(Address(rbp, -wordSize));
1173 break;
1174 case T_DOUBLE:
1175 __ fstp_d(Address(rbp, -2*wordSize));
1176 break;
1177 case T_VOID: break;
1178 case T_LONG:
1179 __ movptr(Address(rbp, -wordSize), rax);
1180 __ movptr(Address(rbp, -2*wordSize), rdx);
1181 break;
1182 default: {
1183 __ movptr(Address(rbp, -wordSize), rax);
1184 }
1185 }
1186 }
1187
1188 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1189 // We always ignore the frame_slots arg and just use the space just below frame pointer
1190 // which by this time is free to use
1191 switch (ret_type) {
1192 case T_FLOAT:
1193 __ fld_s(Address(rbp, -wordSize));
1194 break;
1195 case T_DOUBLE:
1196 __ fld_d(Address(rbp, -2*wordSize));
1197 break;
1198 case T_LONG:
1199 __ movptr(rax, Address(rbp, -wordSize));
1200 __ movptr(rdx, Address(rbp, -2*wordSize));
1201 break;
1202 case T_VOID: break;
1203 default: {
1204 __ movptr(rax, Address(rbp, -wordSize));
1205 }
1206 }
1207 }
1208
1209 static void verify_oop_args(MacroAssembler* masm,
1210 const methodHandle& method,
1211 const BasicType* sig_bt,
1212 const VMRegPair* regs) {
1213 Register temp_reg = rbx; // not part of any compiled calling seq
1214 if (VerifyOops) {
1215 for (int i = 0; i < method->size_of_parameters(); i++) {
1216 if (is_reference_type(sig_bt[i])) {
1217 VMReg r = regs[i].first();
1218 assert(r->is_valid(), "bad oop arg");
1219 if (r->is_stack()) {
1220 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1221 __ verify_oop(temp_reg);
1222 } else {
1223 __ verify_oop(r->as_Register());
1224 }
1225 }
1226 }
1227 }
1228 }
1229
1230 static void gen_special_dispatch(MacroAssembler* masm,
1231 const methodHandle& method,
1232 const BasicType* sig_bt,
1233 const VMRegPair* regs) {
1234 verify_oop_args(masm, method, sig_bt, regs);
1235 vmIntrinsics::ID iid = method->intrinsic_id();
1236
1237 // Now write the args into the outgoing interpreter space
1238 bool has_receiver = false;
1239 Register receiver_reg = noreg;
1240 int member_arg_pos = -1;
1241 Register member_reg = noreg;
1242 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1243 if (ref_kind != 0) {
1244 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1245 member_reg = rbx; // known to be free at this point
1246 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1247 } else if (iid == vmIntrinsics::_invokeBasic) {
1248 has_receiver = true;
1249 } else {
1250 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1251 }
1252
1253 if (member_reg != noreg) {
1254 // Load the member_arg into register, if necessary.
1255 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1256 VMReg r = regs[member_arg_pos].first();
1257 if (r->is_stack()) {
1258 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1259 } else {
1260 // no data motion is needed
1261 member_reg = r->as_Register();
1262 }
1263 }
1264
1265 if (has_receiver) {
1266 // Make sure the receiver is loaded into a register.
1267 assert(method->size_of_parameters() > 0, "oob");
1268 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1269 VMReg r = regs[0].first();
1270 assert(r->is_valid(), "bad receiver arg");
1271 if (r->is_stack()) {
1272 // Porting note: This assumes that compiled calling conventions always
1273 // pass the receiver oop in a register. If this is not true on some
1274 // platform, pick a temp and load the receiver from stack.
1275 fatal("receiver always in a register");
1276 receiver_reg = rcx; // known to be free at this point
1277 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1278 } else {
1279 // no data motion is needed
1280 receiver_reg = r->as_Register();
1281 }
1282 }
1283
1284 // Figure out which address we are really jumping to:
1285 MethodHandles::generate_method_handle_dispatch(masm, iid,
1286 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1287 }
1288
1289 // ---------------------------------------------------------------------------
1290 // Generate a native wrapper for a given method. The method takes arguments
1291 // in the Java compiled code convention, marshals them to the native
1292 // convention (handlizes oops, etc), transitions to native, makes the call,
1293 // returns to java state (possibly blocking), unhandlizes any result and
1294 // returns.
1295 //
1296 // Critical native functions are a shorthand for the use of
1297 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1298 // functions. The wrapper is expected to unpack the arguments before
1299 // passing them to the callee. Critical native functions leave the state _in_Java,
1300 // since they cannot stop for GC.
1301 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1302 // block and the check for pending exceptions it's impossible for them
1303 // to be thrown.
1304 //
1305 //
1306 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1307 const methodHandle& method,
1308 int compile_id,
1309 BasicType* in_sig_bt,
1310 VMRegPair* in_regs,
1311 BasicType ret_type) {
1312 if (method->is_method_handle_intrinsic()) {
1313 vmIntrinsics::ID iid = method->intrinsic_id();
1314 intptr_t start = (intptr_t)__ pc();
1315 int vep_offset = ((intptr_t)__ pc()) - start;
1316 gen_special_dispatch(masm,
1317 method,
1318 in_sig_bt,
1319 in_regs);
1320 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1321 __ flush();
1322 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1323 return nmethod::new_native_nmethod(method,
1324 compile_id,
1325 masm->code(),
1326 vep_offset,
1327 frame_complete,
1328 stack_slots / VMRegImpl::slots_per_word,
1329 in_ByteSize(-1),
1330 in_ByteSize(-1),
1331 (OopMapSet*)nullptr);
1332 }
1333 address native_func = method->native_function();
1334 assert(native_func != nullptr, "must have function");
1335
1336 // An OopMap for lock (and class if static)
1337 OopMapSet *oop_maps = new OopMapSet();
1338
1339 // We have received a description of where all the java arg are located
1340 // on entry to the wrapper. We need to convert these args to where
1341 // the jni function will expect them. To figure out where they go
1342 // we convert the java signature to a C signature by inserting
1343 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1344
1345 const int total_in_args = method->size_of_parameters();
1346 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1347
1348 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1349 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1350
1351 int argc = 0;
1352 out_sig_bt[argc++] = T_ADDRESS;
1353 if (method->is_static()) {
1354 out_sig_bt[argc++] = T_OBJECT;
1355 }
1356
1357 for (int i = 0; i < total_in_args ; i++ ) {
1358 out_sig_bt[argc++] = in_sig_bt[i];
1359 }
1360
1361 // Now figure out where the args must be stored and how much stack space
1362 // they require.
1363 int out_arg_slots;
1364 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1365
1366 // Compute framesize for the wrapper. We need to handlize all oops in
1367 // registers a max of 2 on x86.
1368
1369 // Calculate the total number of stack slots we will need.
1370
1371 // First count the abi requirement plus all of the outgoing args
1372 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1373
1374 // Now the space for the inbound oop handle area
1375 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1376
1377 int oop_handle_offset = stack_slots;
1378 stack_slots += total_save_slots;
1379
1380 // Now any space we need for handlizing a klass if static method
1381
1382 int klass_slot_offset = 0;
1383 int klass_offset = -1;
1384 int lock_slot_offset = 0;
1385 bool is_static = false;
1386
1387 if (method->is_static()) {
1388 klass_slot_offset = stack_slots;
1389 stack_slots += VMRegImpl::slots_per_word;
1390 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1391 is_static = true;
1392 }
1393
1394 // Plus a lock if needed
1395
1396 if (method->is_synchronized()) {
1397 lock_slot_offset = stack_slots;
1398 stack_slots += VMRegImpl::slots_per_word;
1399 }
1400
1401 // Now a place (+2) to save return values or temp during shuffling
1402 // + 2 for return address (which we own) and saved rbp,
1403 stack_slots += 4;
1404
1405 // Ok The space we have allocated will look like:
1406 //
1407 //
1408 // FP-> | |
1409 // |---------------------|
1410 // | 2 slots for moves |
1411 // |---------------------|
1412 // | lock box (if sync) |
1413 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1414 // | klass (if static) |
1415 // |---------------------| <- klass_slot_offset
1416 // | oopHandle area |
1417 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1418 // | outbound memory |
1419 // | based arguments |
1420 // | |
1421 // |---------------------|
1422 // | |
1423 // SP-> | out_preserved_slots |
1424 //
1425 //
1426 // ****************************************************************************
1427 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1428 // arguments off of the stack after the jni call. Before the call we can use
1429 // instructions that are SP relative. After the jni call we switch to FP
1430 // relative instructions instead of re-adjusting the stack on windows.
1431 // ****************************************************************************
1432
1433
1434 // Now compute actual number of stack words we need rounding to make
1435 // stack properly aligned.
1436 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1437
1438 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1439
1440 intptr_t start = (intptr_t)__ pc();
1441
1442 // First thing make an ic check to see if we should even be here
1443
1444 // We are free to use all registers as temps without saving them and
1445 // restoring them except rbp. rbp is the only callee save register
1446 // as far as the interpreter and the compiler(s) are concerned.
1447
1448
1449 const Register receiver = rcx;
1450 Label exception_pending;
1451
1452 __ verify_oop(receiver);
1453 // verified entry must be aligned for code patching.
1454 __ ic_check(8 /* end_alignment */);
1455
1456 int vep_offset = ((intptr_t)__ pc()) - start;
1457
1458 #ifdef COMPILER1
1459 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1460 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1461 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1462 }
1463 #endif // COMPILER1
1464
1465 // The instruction at the verified entry point must be 5 bytes or longer
1466 // because it can be patched on the fly by make_non_entrant. The stack bang
1467 // instruction fits that requirement.
1468
1469 // Generate stack overflow check
1470 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1471
1472 // Generate a new frame for the wrapper.
1473 __ enter();
1474 // -2 because return address is already present and so is saved rbp
1475 __ subptr(rsp, stack_size - 2*wordSize);
1476
1477
1478 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1479 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */);
1480
1481 // Frame is now completed as far as size and linkage.
1482 int frame_complete = ((intptr_t)__ pc()) - start;
1483
1484 // Calculate the difference between rsp and rbp,. We need to know it
1485 // after the native call because on windows Java Natives will pop
1486 // the arguments and it is painful to do rsp relative addressing
1487 // in a platform independent way. So after the call we switch to
1488 // rbp, relative addressing.
1489
1490 int fp_adjustment = stack_size - 2*wordSize;
1491
1492 #ifdef COMPILER2
1493 // C2 may leave the stack dirty if not in SSE2+ mode
1494 if (UseSSE >= 2) {
1495 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1496 } else {
1497 __ empty_FPU_stack();
1498 }
1499 #endif /* COMPILER2 */
1500
1501 // Compute the rbp, offset for any slots used after the jni call
1502
1503 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1504
1505 // We use rdi as a thread pointer because it is callee save and
1506 // if we load it once it is usable thru the entire wrapper
1507 const Register thread = rdi;
1508
1509 // We use rsi as the oop handle for the receiver/klass
1510 // It is callee save so it survives the call to native
1511
1512 const Register oop_handle_reg = rsi;
1513
1514 __ get_thread(thread);
1515
1516 //
1517 // We immediately shuffle the arguments so that any vm call we have to
1518 // make from here on out (sync slow path, jvmti, etc.) we will have
1519 // captured the oops from our caller and have a valid oopMap for
1520 // them.
1521
1522 // -----------------
1523 // The Grand Shuffle
1524 //
1525 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1526 // and, if static, the class mirror instead of a receiver. This pretty much
1527 // guarantees that register layout will not match (and x86 doesn't use reg
1528 // parms though amd does). Since the native abi doesn't use register args
1529 // and the java conventions does we don't have to worry about collisions.
1530 // All of our moved are reg->stack or stack->stack.
1531 // We ignore the extra arguments during the shuffle and handle them at the
1532 // last moment. The shuffle is described by the two calling convention
1533 // vectors we have in our possession. We simply walk the java vector to
1534 // get the source locations and the c vector to get the destinations.
1535
1536 int c_arg = method->is_static() ? 2 : 1;
1537
1538 // Record rsp-based slot for receiver on stack for non-static methods
1539 int receiver_offset = -1;
1540
1541 // This is a trick. We double the stack slots so we can claim
1542 // the oops in the caller's frame. Since we are sure to have
1543 // more args than the caller doubling is enough to make
1544 // sure we can capture all the incoming oop args from the
1545 // caller.
1546 //
1547 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1548
1549 // Mark location of rbp,
1550 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1551
1552 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1553 // Are free to temporaries if we have to do stack to steck moves.
1554 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1555
1556 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1557 switch (in_sig_bt[i]) {
1558 case T_ARRAY:
1559 case T_OBJECT:
1560 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1561 ((i == 0) && (!is_static)),
1562 &receiver_offset);
1563 break;
1564 case T_VOID:
1565 break;
1566
1567 case T_FLOAT:
1568 float_move(masm, in_regs[i], out_regs[c_arg]);
1569 break;
1570
1571 case T_DOUBLE:
1572 assert( i + 1 < total_in_args &&
1573 in_sig_bt[i + 1] == T_VOID &&
1574 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1575 double_move(masm, in_regs[i], out_regs[c_arg]);
1576 break;
1577
1578 case T_LONG :
1579 long_move(masm, in_regs[i], out_regs[c_arg]);
1580 break;
1581
1582 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1583
1584 default:
1585 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1586 }
1587 }
1588
1589 // Pre-load a static method's oop into rsi. Used both by locking code and
1590 // the normal JNI call code.
1591 if (method->is_static()) {
1592
1593 // load opp into a register
1594 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1595
1596 // Now handlize the static class mirror it's known not-null.
1597 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1598 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1599
1600 // Now get the handle
1601 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1602 // store the klass handle as second argument
1603 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1604 }
1605
1606 // Change state to native (we save the return address in the thread, since it might not
1607 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1608 // points into the right code segment. It does not have to be the correct return pc.
1609 // We use the same pc/oopMap repeatedly when we call out
1610
1611 intptr_t the_pc = (intptr_t) __ pc();
1612 oop_maps->add_gc_map(the_pc - start, map);
1613
1614 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg);
1615
1616
1617 // We have all of the arguments setup at this point. We must not touch any register
1618 // argument registers at this point (what if we save/restore them there are no oop?
1619
1620 if (DTraceMethodProbes) {
1621 __ mov_metadata(rax, method());
1622 __ call_VM_leaf(
1623 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1624 thread, rax);
1625 }
1626
1627 // RedefineClasses() tracing support for obsolete method entry
1628 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1629 __ mov_metadata(rax, method());
1630 __ call_VM_leaf(
1631 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1632 thread, rax);
1633 }
1634
1635 // These are register definitions we need for locking/unlocking
1636 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1637 const Register obj_reg = rcx; // Will contain the oop
1638 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1639
1640 Label slow_path_lock;
1641 Label lock_done;
1642
1643 // Lock a synchronized method
1644 if (method->is_synchronized()) {
1645 Label count_mon;
1646
1647 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1648
1649 // Get the handle (the 2nd argument)
1650 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1651
1652 // Get address of the box
1653
1654 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1655
1656 // Load the oop from the handle
1657 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1658
1659 if (LockingMode == LM_MONITOR) {
1660 __ jmp(slow_path_lock);
1661 } else if (LockingMode == LM_LEGACY) {
1662 // Load immediate 1 into swap_reg %rax,
1663 __ movptr(swap_reg, 1);
1664
1665 // Load (object->mark() | 1) into swap_reg %rax,
1666 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1667
1668 // Save (object->mark() | 1) into BasicLock's displaced header
1669 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1670
1671 // src -> dest iff dest == rax, else rax, <- dest
1672 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1673 __ lock();
1674 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1675 __ jcc(Assembler::equal, count_mon);
1676
1677 // Test if the oopMark is an obvious stack pointer, i.e.,
1678 // 1) (mark & 3) == 0, and
1679 // 2) rsp <= mark < mark + os::pagesize()
1680 // These 3 tests can be done by evaluating the following
1681 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1682 // assuming both stack pointer and pagesize have their
1683 // least significant 2 bits clear.
1684 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1685
1686 __ subptr(swap_reg, rsp);
1687 __ andptr(swap_reg, 3 - (int)os::vm_page_size());
1688
1689 // Save the test result, for recursive case, the result is zero
1690 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1691 __ jcc(Assembler::notEqual, slow_path_lock);
1692 } else {
1693 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1694 // Lacking registers and thread on x86_32. Always take slow path.
1695 __ jmp(slow_path_lock);
1696 }
1697 __ bind(count_mon);
1698 __ inc_held_monitor_count();
1699
1700 // Slow path will re-enter here
1701 __ bind(lock_done);
1702 }
1703
1704
1705 // Finally just about ready to make the JNI call
1706
1707 // get JNIEnv* which is first argument to native
1708 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1709 __ movptr(Address(rsp, 0), rdx);
1710
1711 // Now set thread in native
1712 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1713
1714 __ call(RuntimeAddress(native_func));
1715
1716 // Verify or restore cpu control state after JNI call
1717 __ restore_cpu_control_state_after_jni(noreg);
1718
1719 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1720 // arguments off of the stack. We could just re-adjust the stack pointer here
1721 // and continue to do SP relative addressing but we instead switch to FP
1722 // relative addressing.
1723
1724 // Unpack native results.
1725 switch (ret_type) {
1726 case T_BOOLEAN: __ c2bool(rax); break;
1727 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1728 case T_BYTE : __ sign_extend_byte (rax); break;
1729 case T_SHORT : __ sign_extend_short(rax); break;
1730 case T_INT : /* nothing to do */ break;
1731 case T_DOUBLE :
1732 case T_FLOAT :
1733 // Result is in st0 we'll save as needed
1734 break;
1735 case T_ARRAY: // Really a handle
1736 case T_OBJECT: // Really a handle
1737 break; // can't de-handlize until after safepoint check
1738 case T_VOID: break;
1739 case T_LONG: break;
1740 default : ShouldNotReachHere();
1741 }
1742
1743 // Switch thread to "native transition" state before reading the synchronization state.
1744 // This additional state is necessary because reading and testing the synchronization
1745 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1746 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1747 // VM thread changes sync state to synchronizing and suspends threads for GC.
1748 // Thread A is resumed to finish this native method, but doesn't block here since it
1749 // didn't see any synchronization is progress, and escapes.
1750 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1751
1752 // Force this write out before the read below
1753 if (!UseSystemMemoryBarrier) {
1754 __ membar(Assembler::Membar_mask_bits(
1755 Assembler::LoadLoad | Assembler::LoadStore |
1756 Assembler::StoreLoad | Assembler::StoreStore));
1757 }
1758
1759 if (AlwaysRestoreFPU) {
1760 // Make sure the control word is correct.
1761 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1762 }
1763
1764 // check for safepoint operation in progress and/or pending suspend requests
1765 { Label Continue, slow_path;
1766
1767 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1768
1769 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1770 __ jcc(Assembler::equal, Continue);
1771 __ bind(slow_path);
1772
1773 // Don't use call_VM as it will see a possible pending exception and forward it
1774 // and never return here preventing us from clearing _last_native_pc down below.
1775 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1776 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1777 // by hand.
1778 //
1779 __ vzeroupper();
1780
1781 save_native_result(masm, ret_type, stack_slots);
1782 __ push(thread);
1783 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1784 JavaThread::check_special_condition_for_native_trans)));
1785 __ increment(rsp, wordSize);
1786 // Restore any method result value
1787 restore_native_result(masm, ret_type, stack_slots);
1788 __ bind(Continue);
1789 }
1790
1791 // change thread state
1792 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1793
1794 Label reguard;
1795 Label reguard_done;
1796 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1797 __ jcc(Assembler::equal, reguard);
1798
1799 // slow path reguard re-enters here
1800 __ bind(reguard_done);
1801
1802 // Handle possible exception (will unlock if necessary)
1803
1804 // native result if any is live
1805
1806 // Unlock
1807 Label slow_path_unlock;
1808 Label unlock_done;
1809 if (method->is_synchronized()) {
1810
1811 Label fast_done;
1812
1813 // Get locked oop from the handle we passed to jni
1814 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1815
1816 if (LockingMode == LM_LEGACY) {
1817 Label not_recur;
1818 // Simple recursive lock?
1819 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD);
1820 __ jcc(Assembler::notEqual, not_recur);
1821 __ dec_held_monitor_count();
1822 __ jmpb(fast_done);
1823 __ bind(not_recur);
1824 }
1825
1826 // Must save rax, if it is live now because cmpxchg must use it
1827 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1828 save_native_result(masm, ret_type, stack_slots);
1829 }
1830
1831 if (LockingMode == LM_MONITOR) {
1832 __ jmp(slow_path_unlock);
1833 } else if (LockingMode == LM_LEGACY) {
1834 // get old displaced header
1835 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1836
1837 // get address of the stack lock
1838 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1839
1840 // Atomic swap old header if oop still contains the stack lock
1841 // src -> dest iff dest == rax, else rax, <- dest
1842 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1843 __ lock();
1844 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1845 __ jcc(Assembler::notEqual, slow_path_unlock);
1846 __ dec_held_monitor_count();
1847 } else {
1848 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1849 __ lightweight_unlock(obj_reg, swap_reg, thread, lock_reg, slow_path_unlock);
1850 __ dec_held_monitor_count();
1851 }
1852
1853 // slow path re-enters here
1854 __ bind(unlock_done);
1855 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1856 restore_native_result(masm, ret_type, stack_slots);
1857 }
1858
1859 __ bind(fast_done);
1860 }
1861
1862 if (DTraceMethodProbes) {
1863 // Tell dtrace about this method exit
1864 save_native_result(masm, ret_type, stack_slots);
1865 __ mov_metadata(rax, method());
1866 __ call_VM_leaf(
1867 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1868 thread, rax);
1869 restore_native_result(masm, ret_type, stack_slots);
1870 }
1871
1872 // We can finally stop using that last_Java_frame we setup ages ago
1873
1874 __ reset_last_Java_frame(thread, false);
1875
1876 // Unbox oop result, e.g. JNIHandles::resolve value.
1877 if (is_reference_type(ret_type)) {
1878 __ resolve_jobject(rax /* value */,
1879 thread /* thread */,
1880 rcx /* tmp */);
1881 }
1882
1883 if (CheckJNICalls) {
1884 // clear_pending_jni_exception_check
1885 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
1886 }
1887
1888 // reset handle block
1889 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1890 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD);
1891
1892 // Any exception pending?
1893 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1894 __ jcc(Assembler::notEqual, exception_pending);
1895
1896 // no exception, we're almost done
1897
1898 // check that only result value is on FPU stack
1899 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1900
1901 // Fixup floating pointer results so that result looks like a return from a compiled method
1902 if (ret_type == T_FLOAT) {
1903 if (UseSSE >= 1) {
1904 // Pop st0 and store as float and reload into xmm register
1905 __ fstp_s(Address(rbp, -4));
1906 __ movflt(xmm0, Address(rbp, -4));
1907 }
1908 } else if (ret_type == T_DOUBLE) {
1909 if (UseSSE >= 2) {
1910 // Pop st0 and store as double and reload into xmm register
1911 __ fstp_d(Address(rbp, -8));
1912 __ movdbl(xmm0, Address(rbp, -8));
1913 }
1914 }
1915
1916 // Return
1917
1918 __ leave();
1919 __ ret(0);
1920
1921 // Unexpected paths are out of line and go here
1922
1923 // Slow path locking & unlocking
1924 if (method->is_synchronized()) {
1925
1926 // BEGIN Slow path lock
1927
1928 __ bind(slow_path_lock);
1929
1930 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1931 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1932 __ push(thread);
1933 __ push(lock_reg);
1934 __ push(obj_reg);
1935 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1936 __ addptr(rsp, 3*wordSize);
1937
1938 #ifdef ASSERT
1939 { Label L;
1940 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1941 __ jcc(Assembler::equal, L);
1942 __ stop("no pending exception allowed on exit from monitorenter");
1943 __ bind(L);
1944 }
1945 #endif
1946 __ jmp(lock_done);
1947
1948 // END Slow path lock
1949
1950 // BEGIN Slow path unlock
1951 __ bind(slow_path_unlock);
1952 __ vzeroupper();
1953 // Slow path unlock
1954
1955 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1956 save_native_result(masm, ret_type, stack_slots);
1957 }
1958 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1959
1960 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1961 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1962
1963
1964 // should be a peal
1965 // +wordSize because of the push above
1966 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1967 __ push(thread);
1968 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1969 __ push(rax);
1970
1971 __ push(obj_reg);
1972 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1973 __ addptr(rsp, 3*wordSize);
1974 #ifdef ASSERT
1975 {
1976 Label L;
1977 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1978 __ jcc(Assembler::equal, L);
1979 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1980 __ bind(L);
1981 }
1982 #endif /* ASSERT */
1983
1984 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1985
1986 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1987 restore_native_result(masm, ret_type, stack_slots);
1988 }
1989 __ jmp(unlock_done);
1990 // END Slow path unlock
1991
1992 }
1993
1994 // SLOW PATH Reguard the stack if needed
1995
1996 __ bind(reguard);
1997 __ vzeroupper();
1998 save_native_result(masm, ret_type, stack_slots);
1999 {
2000 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2001 }
2002 restore_native_result(masm, ret_type, stack_slots);
2003 __ jmp(reguard_done);
2004
2005
2006 // BEGIN EXCEPTION PROCESSING
2007
2008 // Forward the exception
2009 __ bind(exception_pending);
2010
2011 // remove possible return value from FPU register stack
2012 __ empty_FPU_stack();
2013
2014 // pop our frame
2015 __ leave();
2016 // and forward the exception
2017 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2018
2019 __ flush();
2020
2021 nmethod *nm = nmethod::new_native_nmethod(method,
2022 compile_id,
2023 masm->code(),
2024 vep_offset,
2025 frame_complete,
2026 stack_slots / VMRegImpl::slots_per_word,
2027 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2028 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2029 oop_maps);
2030
2031 return nm;
2032
2033 }
2034
2035 // this function returns the adjust size (in number of words) to a c2i adapter
2036 // activation for use during deoptimization
2037 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2038 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2039 }
2040
2041
2042 // Number of stack slots between incoming argument block and the start of
2043 // a new frame. The PROLOG must add this many slots to the stack. The
2044 // EPILOG must remove this many slots. Intel needs one slot for
2045 // return address and one for rbp, (must save rbp)
2046 uint SharedRuntime::in_preserve_stack_slots() {
2047 return 2+VerifyStackAtCalls;
2048 }
2049
2050 uint SharedRuntime::out_preserve_stack_slots() {
2051 return 0;
2052 }
2053
2054 VMReg SharedRuntime::thread_register() {
2055 Unimplemented();
2056 return nullptr;
2057 }
2058
2059 //------------------------------generate_deopt_blob----------------------------
2060 void SharedRuntime::generate_deopt_blob() {
2061 // allocate space for the code
2062 ResourceMark rm;
2063 // setup code generation tools
2064 // note: the buffer code size must account for StackShadowPages=50
2065 const char* name = SharedRuntime::stub_name(SharedStubId::deopt_id);
2066 CodeBuffer buffer(name, 1536, 1024);
2067 MacroAssembler* masm = new MacroAssembler(&buffer);
2068 int frame_size_in_words;
2069 OopMap* map = nullptr;
2070 // Account for the extra args we place on the stack
2071 // by the time we call fetch_unroll_info
2072 const int additional_words = 2; // deopt kind, thread
2073
2074 OopMapSet *oop_maps = new OopMapSet();
2075
2076 // -------------
2077 // This code enters when returning to a de-optimized nmethod. A return
2078 // address has been pushed on the stack, and return values are in
2079 // registers.
2080 // If we are doing a normal deopt then we were called from the patched
2081 // nmethod from the point we returned to the nmethod. So the return
2082 // address on the stack is wrong by NativeCall::instruction_size
2083 // We will adjust the value to it looks like we have the original return
2084 // address on the stack (like when we eagerly deoptimized).
2085 // In the case of an exception pending with deoptimized then we enter
2086 // with a return address on the stack that points after the call we patched
2087 // into the exception handler. We have the following register state:
2088 // rax,: exception
2089 // rbx,: exception handler
2090 // rdx: throwing pc
2091 // So in this case we simply jam rdx into the useless return address and
2092 // the stack looks just like we want.
2093 //
2094 // At this point we need to de-opt. We save the argument return
2095 // registers. We call the first C routine, fetch_unroll_info(). This
2096 // routine captures the return values and returns a structure which
2097 // describes the current frame size and the sizes of all replacement frames.
2098 // The current frame is compiled code and may contain many inlined
2099 // functions, each with their own JVM state. We pop the current frame, then
2100 // push all the new frames. Then we call the C routine unpack_frames() to
2101 // populate these frames. Finally unpack_frames() returns us the new target
2102 // address. Notice that callee-save registers are BLOWN here; they have
2103 // already been captured in the vframeArray at the time the return PC was
2104 // patched.
2105 address start = __ pc();
2106 Label cont;
2107
2108 // Prolog for non exception case!
2109
2110 // Save everything in sight.
2111
2112 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2113 // Normal deoptimization
2114 __ push(Deoptimization::Unpack_deopt);
2115 __ jmp(cont);
2116
2117 int reexecute_offset = __ pc() - start;
2118
2119 // Reexecute case
2120 // return address is the pc describes what bci to do re-execute at
2121
2122 // No need to update map as each call to save_live_registers will produce identical oopmap
2123 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2124
2125 __ push(Deoptimization::Unpack_reexecute);
2126 __ jmp(cont);
2127
2128 int exception_offset = __ pc() - start;
2129
2130 // Prolog for exception case
2131
2132 // all registers are dead at this entry point, except for rax, and
2133 // rdx which contain the exception oop and exception pc
2134 // respectively. Set them in TLS and fall thru to the
2135 // unpack_with_exception_in_tls entry point.
2136
2137 __ get_thread(rdi);
2138 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2139 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2140
2141 int exception_in_tls_offset = __ pc() - start;
2142
2143 // new implementation because exception oop is now passed in JavaThread
2144
2145 // Prolog for exception case
2146 // All registers must be preserved because they might be used by LinearScan
2147 // Exceptiop oop and throwing PC are passed in JavaThread
2148 // tos: stack at point of call to method that threw the exception (i.e. only
2149 // args are on the stack, no return address)
2150
2151 // make room on stack for the return address
2152 // It will be patched later with the throwing pc. The correct value is not
2153 // available now because loading it from memory would destroy registers.
2154 __ push(0);
2155
2156 // Save everything in sight.
2157
2158 // No need to update map as each call to save_live_registers will produce identical oopmap
2159 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2160
2161 // Now it is safe to overwrite any register
2162
2163 // store the correct deoptimization type
2164 __ push(Deoptimization::Unpack_exception);
2165
2166 // load throwing pc from JavaThread and patch it as the return address
2167 // of the current frame. Then clear the field in JavaThread
2168 __ get_thread(rdi);
2169 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2170 __ movptr(Address(rbp, wordSize), rdx);
2171 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2172
2173 #ifdef ASSERT
2174 // verify that there is really an exception oop in JavaThread
2175 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2176 __ verify_oop(rax);
2177
2178 // verify that there is no pending exception
2179 Label no_pending_exception;
2180 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2181 __ testptr(rax, rax);
2182 __ jcc(Assembler::zero, no_pending_exception);
2183 __ stop("must not have pending exception here");
2184 __ bind(no_pending_exception);
2185 #endif
2186
2187 __ bind(cont);
2188
2189 // Compiled code leaves the floating point stack dirty, empty it.
2190 __ empty_FPU_stack();
2191
2192
2193 // Call C code. Need thread and this frame, but NOT official VM entry
2194 // crud. We cannot block on this call, no GC can happen.
2195 __ get_thread(rcx);
2196 __ push(rcx);
2197 // fetch_unroll_info needs to call last_java_frame()
2198 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg);
2199
2200 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2201
2202 // Need to have an oopmap that tells fetch_unroll_info where to
2203 // find any register it might need.
2204
2205 oop_maps->add_gc_map( __ pc()-start, map);
2206
2207 // Discard args to fetch_unroll_info
2208 __ pop(rcx);
2209 __ pop(rcx);
2210
2211 __ get_thread(rcx);
2212 __ reset_last_Java_frame(rcx, false);
2213
2214 // Load UnrollBlock into EDI
2215 __ mov(rdi, rax);
2216
2217 // Move the unpack kind to a safe place in the UnrollBlock because
2218 // we are very short of registers
2219
2220 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset());
2221 // retrieve the deopt kind from the UnrollBlock.
2222 __ movl(rax, unpack_kind);
2223
2224 Label noException;
2225 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2226 __ jcc(Assembler::notEqual, noException);
2227 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2228 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2229 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2230 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2231
2232 __ verify_oop(rax);
2233
2234 // Overwrite the result registers with the exception results.
2235 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2236 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2237
2238 __ bind(noException);
2239
2240 // Stack is back to only having register save data on the stack.
2241 // Now restore the result registers. Everything else is either dead or captured
2242 // in the vframeArray.
2243
2244 RegisterSaver::restore_result_registers(masm);
2245
2246 // Non standard control word may be leaked out through a safepoint blob, and we can
2247 // deopt at a poll point with the non standard control word. However, we should make
2248 // sure the control word is correct after restore_result_registers.
2249 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2250
2251 // All of the register save area has been popped of the stack. Only the
2252 // return address remains.
2253
2254 // Pop all the frames we must move/replace.
2255 //
2256 // Frame picture (youngest to oldest)
2257 // 1: self-frame (no frame link)
2258 // 2: deopting frame (no frame link)
2259 // 3: caller of deopting frame (could be compiled/interpreted).
2260 //
2261 // Note: by leaving the return address of self-frame on the stack
2262 // and using the size of frame 2 to adjust the stack
2263 // when we are done the return to frame 3 will still be on the stack.
2264
2265 // Pop deoptimized frame
2266 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2267
2268 // sp should be pointing at the return address to the caller (3)
2269
2270 // Pick up the initial fp we should save
2271 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2272 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2273
2274 #ifdef ASSERT
2275 // Compilers generate code that bang the stack by as much as the
2276 // interpreter would need. So this stack banging should never
2277 // trigger a fault. Verify that it does not on non product builds.
2278 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2279 __ bang_stack_size(rbx, rcx);
2280 #endif
2281
2282 // Load array of frame pcs into ECX
2283 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2284
2285 __ pop(rsi); // trash the old pc
2286
2287 // Load array of frame sizes into ESI
2288 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2289
2290 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2291
2292 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2293 __ movl(counter, rbx);
2294
2295 // Now adjust the caller's stack to make up for the extra locals
2296 // but record the original sp so that we can save it in the skeletal interpreter
2297 // frame and the stack walking of interpreter_sender will get the unextended sp
2298 // value and not the "real" sp value.
2299
2300 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2301 __ movptr(sp_temp, rsp);
2302 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2303 __ subptr(rsp, rbx);
2304
2305 // Push interpreter frames in a loop
2306 Label loop;
2307 __ bind(loop);
2308 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2309 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2310 __ pushptr(Address(rcx, 0)); // save return address
2311 __ enter(); // save old & set new rbp,
2312 __ subptr(rsp, rbx); // Prolog!
2313 __ movptr(rbx, sp_temp); // sender's sp
2314 // This value is corrected by layout_activation_impl
2315 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2316 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2317 __ movptr(sp_temp, rsp); // pass to next frame
2318 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2319 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2320 __ decrementl(counter); // decrement counter
2321 __ jcc(Assembler::notZero, loop);
2322 __ pushptr(Address(rcx, 0)); // save final return address
2323
2324 // Re-push self-frame
2325 __ enter(); // save old & set new rbp,
2326
2327 // Return address and rbp, are in place
2328 // We'll push additional args later. Just allocate a full sized
2329 // register save area
2330 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2331
2332 // Restore frame locals after moving the frame
2333 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2334 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2335 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2336 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2337 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2338
2339 // Set up the args to unpack_frame
2340
2341 __ pushl(unpack_kind); // get the unpack_kind value
2342 __ get_thread(rcx);
2343 __ push(rcx);
2344
2345 // set last_Java_sp, last_Java_fp
2346 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg);
2347
2348 // Call C code. Need thread but NOT official VM entry
2349 // crud. We cannot block on this call, no GC can happen. Call should
2350 // restore return values to their stack-slots with the new SP.
2351 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2352 // Set an oopmap for the call site
2353 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2354
2355 // rax, contains the return result type
2356 __ push(rax);
2357
2358 __ get_thread(rcx);
2359 __ reset_last_Java_frame(rcx, false);
2360
2361 // Collect return values
2362 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2363 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2364
2365 // Clear floating point stack before returning to interpreter
2366 __ empty_FPU_stack();
2367
2368 // Check if we should push the float or double return value.
2369 Label results_done, yes_double_value;
2370 __ cmpl(Address(rsp, 0), T_DOUBLE);
2371 __ jcc (Assembler::zero, yes_double_value);
2372 __ cmpl(Address(rsp, 0), T_FLOAT);
2373 __ jcc (Assembler::notZero, results_done);
2374
2375 // return float value as expected by interpreter
2376 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2377 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2378 __ jmp(results_done);
2379
2380 // return double value as expected by interpreter
2381 __ bind(yes_double_value);
2382 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2383 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2384
2385 __ bind(results_done);
2386
2387 // Pop self-frame.
2388 __ leave(); // Epilog!
2389
2390 // Jump to interpreter
2391 __ ret(0);
2392
2393 // -------------
2394 // make sure all code is generated
2395 masm->flush();
2396
2397 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2398 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2399 }
2400
2401 //------------------------------generate_handler_blob------
2402 //
2403 // Generate a special Compile2Runtime blob that saves all registers,
2404 // setup oopmap, and calls safepoint code to stop the compiled code for
2405 // a safepoint.
2406 //
2407 SafepointBlob* SharedRuntime::generate_handler_blob(SharedStubId id, address call_ptr) {
2408
2409 // Account for thread arg in our frame
2410 const int additional_words = 1;
2411 int frame_size_in_words;
2412
2413 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2414 assert(is_polling_page_id(id), "expected a polling page stub id");
2415
2416 ResourceMark rm;
2417 OopMapSet *oop_maps = new OopMapSet();
2418 OopMap* map;
2419
2420 // allocate space for the code
2421 // setup code generation tools
2422 const char* name = SharedRuntime::stub_name(id);
2423 CodeBuffer buffer(name, 2048, 1024);
2424 MacroAssembler* masm = new MacroAssembler(&buffer);
2425
2426 const Register java_thread = rdi; // callee-saved for VC++
2427 address start = __ pc();
2428 address call_pc = nullptr;
2429 bool cause_return = (id == SharedStubId::polling_page_return_handler_id);
2430 bool save_vectors = (id == SharedStubId::polling_page_vectors_safepoint_handler_id);
2431
2432 // If cause_return is true we are at a poll_return and there is
2433 // the return address on the stack to the caller on the nmethod
2434 // that is safepoint. We can leave this return on the stack and
2435 // effectively complete the return and safepoint in the caller.
2436 // Otherwise we push space for a return address that the safepoint
2437 // handler will install later to make the stack walking sensible.
2438 if (!cause_return)
2439 __ push(rbx); // Make room for return address (or push it again)
2440
2441 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2442
2443 // The following is basically a call_VM. However, we need the precise
2444 // address of the call in order to generate an oopmap. Hence, we do all the
2445 // work ourselves.
2446
2447 // Push thread argument and setup last_Java_sp
2448 __ get_thread(java_thread);
2449 __ push(java_thread);
2450 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg);
2451
2452 // if this was not a poll_return then we need to correct the return address now.
2453 if (!cause_return) {
2454 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2455 // Additionally, rbx is a callee saved register and we can look at it later to determine
2456 // if someone changed the return address for us!
2457 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2458 __ movptr(Address(rbp, wordSize), rbx);
2459 }
2460
2461 // do the call
2462 __ call(RuntimeAddress(call_ptr));
2463
2464 // Set an oopmap for the call site. This oopmap will map all
2465 // oop-registers and debug-info registers as callee-saved. This
2466 // will allow deoptimization at this safepoint to find all possible
2467 // debug-info recordings, as well as let GC find all oops.
2468
2469 oop_maps->add_gc_map( __ pc() - start, map);
2470
2471 // Discard arg
2472 __ pop(rcx);
2473
2474 Label noException;
2475
2476 // Clear last_Java_sp again
2477 __ get_thread(java_thread);
2478 __ reset_last_Java_frame(java_thread, false);
2479
2480 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2481 __ jcc(Assembler::equal, noException);
2482
2483 // Exception pending
2484 RegisterSaver::restore_live_registers(masm, save_vectors);
2485
2486 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2487
2488 __ bind(noException);
2489
2490 Label no_adjust, bail, not_special;
2491 if (!cause_return) {
2492 // If our stashed return pc was modified by the runtime we avoid touching it
2493 __ cmpptr(rbx, Address(rbp, wordSize));
2494 __ jccb(Assembler::notEqual, no_adjust);
2495
2496 // Skip over the poll instruction.
2497 // See NativeInstruction::is_safepoint_poll()
2498 // Possible encodings:
2499 // 85 00 test %eax,(%rax)
2500 // 85 01 test %eax,(%rcx)
2501 // 85 02 test %eax,(%rdx)
2502 // 85 03 test %eax,(%rbx)
2503 // 85 06 test %eax,(%rsi)
2504 // 85 07 test %eax,(%rdi)
2505 //
2506 // 85 04 24 test %eax,(%rsp)
2507 // 85 45 00 test %eax,0x0(%rbp)
2508
2509 #ifdef ASSERT
2510 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2511 #endif
2512 // rsp/rbp base encoding takes 3 bytes with the following register values:
2513 // rsp 0x04
2514 // rbp 0x05
2515 __ movzbl(rcx, Address(rbx, 1));
2516 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2517 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
2518 __ cmpptr(rcx, 1);
2519 __ jcc(Assembler::above, not_special);
2520 __ addptr(rbx, 1);
2521 __ bind(not_special);
2522 #ifdef ASSERT
2523 // Verify the correct encoding of the poll we're about to skip.
2524 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2525 __ jcc(Assembler::notEqual, bail);
2526 // Mask out the modrm bits
2527 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2528 // rax encodes to 0, so if the bits are nonzero it's incorrect
2529 __ jcc(Assembler::notZero, bail);
2530 #endif
2531 // Adjust return pc forward to step over the safepoint poll instruction
2532 __ addptr(rbx, 2);
2533 __ movptr(Address(rbp, wordSize), rbx);
2534 }
2535
2536 __ bind(no_adjust);
2537 // Normal exit, register restoring and exit
2538 RegisterSaver::restore_live_registers(masm, save_vectors);
2539
2540 __ ret(0);
2541
2542 #ifdef ASSERT
2543 __ bind(bail);
2544 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2545 #endif
2546
2547 // make sure all code is generated
2548 masm->flush();
2549
2550 // Fill-out other meta info
2551 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2552 }
2553
2554 //
2555 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2556 //
2557 // Generate a stub that calls into vm to find out the proper destination
2558 // of a java call. All the argument registers are live at this point
2559 // but since this is generic code we don't know what they are and the caller
2560 // must do any gc of the args.
2561 //
2562 RuntimeStub* SharedRuntime::generate_resolve_blob(SharedStubId id, address destination) {
2563 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2564 assert(is_resolve_id(id), "expected a resolve stub id");
2565
2566 // allocate space for the code
2567 ResourceMark rm;
2568
2569 const char* name = SharedRuntime::stub_name(id);
2570 CodeBuffer buffer(name, 1000, 512);
2571 MacroAssembler* masm = new MacroAssembler(&buffer);
2572
2573 int frame_size_words;
2574 enum frame_layout {
2575 thread_off,
2576 extra_words };
2577
2578 OopMapSet *oop_maps = new OopMapSet();
2579 OopMap* map = nullptr;
2580
2581 int start = __ offset();
2582
2583 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2584
2585 int frame_complete = __ offset();
2586
2587 const Register thread = rdi;
2588 __ get_thread(rdi);
2589
2590 __ push(thread);
2591 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg);
2592
2593 __ call(RuntimeAddress(destination));
2594
2595
2596 // Set an oopmap for the call site.
2597 // We need this not only for callee-saved registers, but also for volatile
2598 // registers that the compiler might be keeping live across a safepoint.
2599
2600 oop_maps->add_gc_map( __ offset() - start, map);
2601
2602 // rax, contains the address we are going to jump to assuming no exception got installed
2603
2604 __ addptr(rsp, wordSize);
2605
2606 // clear last_Java_sp
2607 __ reset_last_Java_frame(thread, true);
2608 // check for pending exceptions
2609 Label pending;
2610 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
2611 __ jcc(Assembler::notEqual, pending);
2612
2613 // get the returned Method*
2614 __ get_vm_result_2(rbx, thread);
2615 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2616
2617 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2618
2619 RegisterSaver::restore_live_registers(masm);
2620
2621 // We are back to the original state on entry and ready to go.
2622
2623 __ jmp(rax);
2624
2625 // Pending exception after the safepoint
2626
2627 __ bind(pending);
2628
2629 RegisterSaver::restore_live_registers(masm);
2630
2631 // exception pending => remove activation and forward to exception handler
2632
2633 __ get_thread(thread);
2634 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2635 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2636 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2637
2638 // -------------
2639 // make sure all code is generated
2640 masm->flush();
2641
2642 // return the blob
2643 // frame_size_words or bytes??
2644 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2645 }
2646
2647 //------------------------------------------------------------------------------------------------------------------------
2648 // Continuation point for throwing of implicit exceptions that are not handled in
2649 // the current activation. Fabricates an exception oop and initiates normal
2650 // exception dispatching in this frame.
2651 //
2652 // Previously the compiler (c2) allowed for callee save registers on Java calls.
2653 // This is no longer true after adapter frames were removed but could possibly
2654 // be brought back in the future if the interpreter code was reworked and it
2655 // was deemed worthwhile. The comment below was left to describe what must
2656 // happen here if callee saves were resurrected. As it stands now this stub
2657 // could actually be a vanilla BufferBlob and have now oopMap at all.
2658 // Since it doesn't make much difference we've chosen to leave it the
2659 // way it was in the callee save days and keep the comment.
2660
2661 // If we need to preserve callee-saved values we need a callee-saved oop map and
2662 // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs.
2663 // If the compiler needs all registers to be preserved between the fault
2664 // point and the exception handler then it must assume responsibility for that in
2665 // AbstractCompiler::continuation_for_implicit_null_exception or
2666 // continuation_for_implicit_division_by_zero_exception. All other implicit
2667 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are
2668 // either at call sites or otherwise assume that stack unwinding will be initiated,
2669 // so caller saved registers were assumed volatile in the compiler.
2670 RuntimeStub* SharedRuntime::generate_throw_exception(SharedStubId id, address runtime_entry) {
2671 assert(is_throw_id(id), "expected a throw stub id");
2672
2673 const char* name = SharedRuntime::stub_name(id);
2674
2675 // Information about frame layout at time of blocking runtime call.
2676 // Note that we only have to preserve callee-saved registers since
2677 // the compilers are responsible for supplying a continuation point
2678 // if they expect all registers to be preserved.
2679 enum layout {
2680 thread_off, // last_java_sp
2681 arg1_off,
2682 arg2_off,
2683 rbp_off, // callee saved register
2684 ret_pc,
2685 framesize
2686 };
2687
2688 int insts_size = 256;
2689 int locs_size = 32;
2690
2691 ResourceMark rm;
2692 const char* timer_msg = "SharedRuntime generate_throw_exception";
2693 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime));
2694
2695 CodeBuffer code(name, insts_size, locs_size);
2696 OopMapSet* oop_maps = new OopMapSet();
2697 MacroAssembler* masm = new MacroAssembler(&code);
2698
2699 address start = __ pc();
2700
2701 // This is an inlined and slightly modified version of call_VM
2702 // which has the ability to fetch the return PC out of
2703 // thread-local storage and also sets up last_Java_sp slightly
2704 // differently than the real call_VM
2705 Register java_thread = rbx;
2706 __ get_thread(java_thread);
2707
2708 __ enter(); // required for proper stackwalking of RuntimeStub frame
2709
2710 // pc and rbp, already pushed
2711 __ subptr(rsp, (framesize-2) * wordSize); // prolog
2712
2713 // Frame is now completed as far as size and linkage.
2714
2715 int frame_complete = __ pc() - start;
2716
2717 // push java thread (becomes first argument of C function)
2718 __ movptr(Address(rsp, thread_off * wordSize), java_thread);
2719 // Set up last_Java_sp and last_Java_fp
2720 __ set_last_Java_frame(java_thread, rsp, rbp, nullptr, noreg);
2721
2722 // Call runtime
2723 BLOCK_COMMENT("call runtime_entry");
2724 __ call(RuntimeAddress(runtime_entry));
2725 // Generate oop map
2726 OopMap* map = new OopMap(framesize, 0);
2727 oop_maps->add_gc_map(__ pc() - start, map);
2728
2729 // restore the thread (cannot use the pushed argument since arguments
2730 // may be overwritten by C code generated by an optimizing compiler);
2731 // however can use the register value directly if it is callee saved.
2732 __ get_thread(java_thread);
2733
2734 __ reset_last_Java_frame(java_thread, true);
2735
2736 __ leave(); // required for proper stackwalking of RuntimeStub frame
2737
2738 // check for pending exceptions
2739 #ifdef ASSERT
2740 Label L;
2741 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2742 __ jcc(Assembler::notEqual, L);
2743 __ should_not_reach_here();
2744 __ bind(L);
2745 #endif /* ASSERT */
2746 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2747
2748
2749 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false);
2750 return stub;
2751 }
2752
2753 #if INCLUDE_JFR
2754
2755 static void jfr_prologue(address the_pc, MacroAssembler* masm) {
2756 Register java_thread = rdi;
2757 __ get_thread(java_thread);
2758 __ set_last_Java_frame(java_thread, rsp, rbp, the_pc, noreg);
2759 __ movptr(Address(rsp, 0), java_thread);
2760 }
2761
2762 // The handle is dereferenced through a load barrier.
2763 static void jfr_epilogue(MacroAssembler* masm) {
2764 Register java_thread = rdi;
2765 __ get_thread(java_thread);
2766 __ reset_last_Java_frame(java_thread, true);
2767 }
2768
2769 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
2770 // It returns a jobject handle to the event writer.
2771 // The handle is dereferenced and the return value is the event writer oop.
2772 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
2773 enum layout {
2774 FPUState_off = 0,
2775 rbp_off = FPUStateSizeInWords,
2776 rdi_off,
2777 rsi_off,
2778 rcx_off,
2779 rbx_off,
2780 saved_argument_off,
2781 saved_argument_off2, // 2nd half of double
2782 framesize
2783 };
2784
2785 int insts_size = 1024;
2786 int locs_size = 64;
2787 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_write_checkpoint_id);
2788 CodeBuffer code(name, insts_size, locs_size);
2789 OopMapSet* oop_maps = new OopMapSet();
2790 MacroAssembler* masm = new MacroAssembler(&code);
2791
2792 address start = __ pc();
2793 __ enter();
2794 int frame_complete = __ pc() - start;
2795 address the_pc = __ pc();
2796 jfr_prologue(the_pc, masm);
2797 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
2798 jfr_epilogue(masm);
2799 __ resolve_global_jobject(rax, rdi, rdx);
2800 __ leave();
2801 __ ret(0);
2802
2803 OopMap* map = new OopMap(framesize, 1); // rbp
2804 oop_maps->add_gc_map(the_pc - start, map);
2805
2806 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2807 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2808 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2809 oop_maps, false);
2810 return stub;
2811 }
2812
2813 // For c2: call to return a leased buffer.
2814 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
2815 enum layout {
2816 FPUState_off = 0,
2817 rbp_off = FPUStateSizeInWords,
2818 rdi_off,
2819 rsi_off,
2820 rcx_off,
2821 rbx_off,
2822 saved_argument_off,
2823 saved_argument_off2, // 2nd half of double
2824 framesize
2825 };
2826
2827 int insts_size = 1024;
2828 int locs_size = 64;
2829 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_return_lease_id);
2830 CodeBuffer code(name, insts_size, locs_size);
2831 OopMapSet* oop_maps = new OopMapSet();
2832 MacroAssembler* masm = new MacroAssembler(&code);
2833
2834 address start = __ pc();
2835 __ enter();
2836 int frame_complete = __ pc() - start;
2837 address the_pc = __ pc();
2838 jfr_prologue(the_pc, masm);
2839 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1);
2840 jfr_epilogue(masm);
2841 __ leave();
2842 __ ret(0);
2843
2844 OopMap* map = new OopMap(framesize, 1); // rbp
2845 oop_maps->add_gc_map(the_pc - start, map);
2846
2847 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2848 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2849 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2850 oop_maps, false);
2851 return stub;
2852 }
2853
2854 #endif // INCLUDE_JFR