1 /*
2 * Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/macroAssembler.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "code/compiledIC.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/nativeInst.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "compiler/oopMap.hpp"
32 #include "gc/shared/gcLocker.hpp"
33 #include "gc/shared/barrierSet.hpp"
34 #include "gc/shared/barrierSetAssembler.hpp"
35 #include "interpreter/interpreter.hpp"
36 #include "logging/log.hpp"
37 #include "memory/resourceArea.hpp"
38 #include "oops/klass.inline.hpp"
39 #include "prims/methodHandles.hpp"
40 #include "runtime/jniHandles.hpp"
41 #include "runtime/safepointMechanism.hpp"
42 #include "runtime/sharedRuntime.hpp"
43 #include "runtime/signature.hpp"
44 #include "runtime/stubRoutines.hpp"
45 #include "runtime/timerTrace.hpp"
46 #include "runtime/vframeArray.hpp"
47 #include "runtime/vm_version.hpp"
48 #include "utilities/align.hpp"
49 #include "vmreg_x86.inline.hpp"
50 #ifdef COMPILER1
51 #include "c1/c1_Runtime1.hpp"
52 #endif
53 #ifdef COMPILER2
54 #include "opto/runtime.hpp"
55 #endif
56
57 #define __ masm->
58
59 #ifdef PRODUCT
60 #define BLOCK_COMMENT(str) /* nothing */
61 #else
62 #define BLOCK_COMMENT(str) __ block_comment(str)
63 #endif // PRODUCT
64
65 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
66
67 class RegisterSaver {
68 // Capture info about frame layout
69 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
70 enum layout {
71 fpu_state_off = 0,
72 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
73 st0_off, st0H_off,
74 st1_off, st1H_off,
75 st2_off, st2H_off,
76 st3_off, st3H_off,
77 st4_off, st4H_off,
78 st5_off, st5H_off,
79 st6_off, st6H_off,
80 st7_off, st7H_off,
81 xmm_off,
82 DEF_XMM_OFFS(0),
83 DEF_XMM_OFFS(1),
84 DEF_XMM_OFFS(2),
85 DEF_XMM_OFFS(3),
86 DEF_XMM_OFFS(4),
87 DEF_XMM_OFFS(5),
88 DEF_XMM_OFFS(6),
89 DEF_XMM_OFFS(7),
90 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
91 rdi_off,
92 rsi_off,
93 ignore_off, // extra copy of rbp,
94 rsp_off,
95 rbx_off,
96 rdx_off,
97 rcx_off,
98 rax_off,
99 // The frame sender code expects that rbp will be in the "natural" place and
100 // will override any oopMap setting for it. We must therefore force the layout
101 // so that it agrees with the frame sender code.
102 rbp_off,
103 return_off, // slot for return address
104 reg_save_size };
105 enum { FPU_regs_live = flags_off - fpu_state_end };
106
107 public:
108
109 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
110 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
111 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
112
113 static int rax_offset() { return rax_off; }
114 static int rbx_offset() { return rbx_off; }
115
116 // Offsets into the register save area
117 // Used by deoptimization when it is managing result register
118 // values on its own
119
120 static int raxOffset(void) { return rax_off; }
121 static int rdxOffset(void) { return rdx_off; }
122 static int rbxOffset(void) { return rbx_off; }
123 static int xmm0Offset(void) { return xmm0_off; }
124 // This really returns a slot in the fp save area, which one is not important
125 static int fpResultOffset(void) { return st0_off; }
126
127 // During deoptimization only the result register need to be restored
128 // all the other values have already been extracted.
129
130 static void restore_result_registers(MacroAssembler* masm);
131
132 };
133
134 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
135 int* total_frame_words, bool verify_fpu, bool save_vectors) {
136 int num_xmm_regs = XMMRegister::number_of_registers;
137 int ymm_bytes = num_xmm_regs * 16;
138 int zmm_bytes = num_xmm_regs * 32;
139 #ifdef COMPILER2
140 int opmask_state_bytes = KRegister::number_of_registers * 8;
141 if (save_vectors) {
142 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
143 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
144 // Save upper half of YMM registers
145 int vect_bytes = ymm_bytes;
146 if (UseAVX > 2) {
147 // Save upper half of ZMM registers as well
148 vect_bytes += zmm_bytes;
149 additional_frame_words += opmask_state_bytes / wordSize;
150 }
151 additional_frame_words += vect_bytes / wordSize;
152 }
153 #else
154 assert(!save_vectors, "vectors are generated only by C2");
155 #endif
156 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
157 int frame_words = frame_size_in_bytes / wordSize;
158 *total_frame_words = frame_words;
159
160 assert(FPUStateSizeInWords == 27, "update stack layout");
161
162 // save registers, fpu state, and flags
163 // We assume caller has already has return address slot on the stack
164 // We push epb twice in this sequence because we want the real rbp,
165 // to be under the return like a normal enter and we want to use pusha
166 // We push by hand instead of using push.
167 __ enter();
168 __ pusha();
169 __ pushf();
170 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
171 __ push_FPU_state(); // Save FPU state & init
172
173 if (verify_fpu) {
174 // Some stubs may have non standard FPU control word settings so
175 // only check and reset the value when it required to be the
176 // standard value. The safepoint blob in particular can be used
177 // in methods which are using the 24 bit control word for
178 // optimized float math.
179
180 #ifdef ASSERT
181 // Make sure the control word has the expected value
182 Label ok;
183 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
184 __ jccb(Assembler::equal, ok);
185 __ stop("corrupted control word detected");
186 __ bind(ok);
187 #endif
188
189 // Reset the control word to guard against exceptions being unmasked
190 // since fstp_d can cause FPU stack underflow exceptions. Write it
191 // into the on stack copy and then reload that to make sure that the
192 // current and future values are correct.
193 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
194 }
195
196 __ frstor(Address(rsp, 0));
197 if (!verify_fpu) {
198 // Set the control word so that exceptions are masked for the
199 // following code.
200 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
201 }
202
203 int off = st0_off;
204 int delta = st1_off - off;
205
206 // Save the FPU registers in de-opt-able form
207 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
208 __ fstp_d(Address(rsp, off*wordSize));
209 off += delta;
210 }
211
212 off = xmm0_off;
213 delta = xmm1_off - off;
214 if(UseSSE == 1) {
215 // Save the XMM state
216 for (int n = 0; n < num_xmm_regs; n++) {
217 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
218 off += delta;
219 }
220 } else if(UseSSE >= 2) {
221 // Save whole 128bit (16 bytes) XMM registers
222 for (int n = 0; n < num_xmm_regs; n++) {
223 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
224 off += delta;
225 }
226 }
227
228 #ifdef COMPILER2
229 if (save_vectors) {
230 __ subptr(rsp, ymm_bytes);
231 // Save upper half of YMM registers
232 for (int n = 0; n < num_xmm_regs; n++) {
233 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
234 }
235 if (UseAVX > 2) {
236 __ subptr(rsp, zmm_bytes);
237 // Save upper half of ZMM registers
238 for (int n = 0; n < num_xmm_regs; n++) {
239 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
240 }
241 __ subptr(rsp, opmask_state_bytes);
242 // Save opmask registers
243 for (int n = 0; n < KRegister::number_of_registers; n++) {
244 __ kmov(Address(rsp, n*8), as_KRegister(n));
245 }
246 }
247 }
248 #else
249 assert(!save_vectors, "vectors are generated only by C2");
250 #endif
251
252 __ vzeroupper();
253
254 // Set an oopmap for the call site. This oopmap will map all
255 // oop-registers and debug-info registers as callee-saved. This
256 // will allow deoptimization at this safepoint to find all possible
257 // debug-info recordings, as well as let GC find all oops.
258
259 OopMapSet *oop_maps = new OopMapSet();
260 OopMap* map = new OopMap( frame_words, 0 );
261
262 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
263 #define NEXTREG(x) (x)->as_VMReg()->next()
264
265 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
266 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
267 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
268 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
269 // rbp, location is known implicitly, no oopMap
270 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
271 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
272
273 // %%% This is really a waste but we'll keep things as they were for now for the upper component
274 off = st0_off;
275 delta = st1_off - off;
276 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
277 FloatRegister freg_name = as_FloatRegister(n);
278 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
279 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
280 off += delta;
281 }
282 off = xmm0_off;
283 delta = xmm1_off - off;
284 for (int n = 0; n < num_xmm_regs; n++) {
285 XMMRegister xmm_name = as_XMMRegister(n);
286 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
287 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
288 off += delta;
289 }
290 #undef NEXTREG
291 #undef STACK_OFFSET
292
293 return map;
294 }
295
296 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
297 int opmask_state_bytes = 0;
298 int additional_frame_bytes = 0;
299 int num_xmm_regs = XMMRegister::number_of_registers;
300 int ymm_bytes = num_xmm_regs * 16;
301 int zmm_bytes = num_xmm_regs * 32;
302 // Recover XMM & FPU state
303 #ifdef COMPILER2
304 if (restore_vectors) {
305 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
306 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
307 // Save upper half of YMM registers
308 additional_frame_bytes = ymm_bytes;
309 if (UseAVX > 2) {
310 // Save upper half of ZMM registers as well
311 additional_frame_bytes += zmm_bytes;
312 opmask_state_bytes = KRegister::number_of_registers * 8;
313 additional_frame_bytes += opmask_state_bytes;
314 }
315 }
316 #else
317 assert(!restore_vectors, "vectors are generated only by C2");
318 #endif
319
320 int off = xmm0_off;
321 int delta = xmm1_off - off;
322
323 __ vzeroupper();
324
325 if (UseSSE == 1) {
326 // Restore XMM registers
327 assert(additional_frame_bytes == 0, "");
328 for (int n = 0; n < num_xmm_regs; n++) {
329 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
330 off += delta;
331 }
332 } else if (UseSSE >= 2) {
333 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
334 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
335 for (int n = 0; n < num_xmm_regs; n++) {
336 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
337 off += delta;
338 }
339 }
340
341 if (restore_vectors) {
342 off = additional_frame_bytes - ymm_bytes;
343 // Restore upper half of YMM registers.
344 for (int n = 0; n < num_xmm_regs; n++) {
345 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
346 }
347 if (UseAVX > 2) {
348 // Restore upper half of ZMM registers.
349 off = opmask_state_bytes;
350 for (int n = 0; n < num_xmm_regs; n++) {
351 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
352 }
353 for (int n = 0; n < KRegister::number_of_registers; n++) {
354 __ kmov(as_KRegister(n), Address(rsp, n*8));
355 }
356 }
357 __ addptr(rsp, additional_frame_bytes);
358 }
359
360 __ pop_FPU_state();
361 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
362
363 __ popf();
364 __ popa();
365 // Get the rbp, described implicitly by the frame sender code (no oopMap)
366 __ pop(rbp);
367 }
368
369 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
370
371 // Just restore result register. Only used by deoptimization. By
372 // now any callee save register that needs to be restore to a c2
373 // caller of the deoptee has been extracted into the vframeArray
374 // and will be stuffed into the c2i adapter we create for later
375 // restoration so only result registers need to be restored here.
376 //
377
378 __ frstor(Address(rsp, 0)); // Restore fpu state
379
380 // Recover XMM & FPU state
381 if( UseSSE == 1 ) {
382 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
383 } else if( UseSSE >= 2 ) {
384 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
385 }
386 __ movptr(rax, Address(rsp, rax_off*wordSize));
387 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
388 // Pop all of the register save are off the stack except the return address
389 __ addptr(rsp, return_off * wordSize);
390 }
391
392 // Is vector's size (in bytes) bigger than a size saved by default?
393 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
394 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
395 bool SharedRuntime::is_wide_vector(int size) {
396 return size > 16;
397 }
398
399 // The java_calling_convention describes stack locations as ideal slots on
400 // a frame with no abi restrictions. Since we must observe abi restrictions
401 // (like the placement of the register window) the slots must be biased by
402 // the following value.
403 static int reg2offset_in(VMReg r) {
404 // Account for saved rbp, and return address
405 // This should really be in_preserve_stack_slots
406 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
407 }
408
409 static int reg2offset_out(VMReg r) {
410 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
411 }
412
413 // ---------------------------------------------------------------------------
414 // Read the array of BasicTypes from a signature, and compute where the
415 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
416 // quantities. Values less than SharedInfo::stack0 are registers, those above
417 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
418 // as framesizes are fixed.
419 // VMRegImpl::stack0 refers to the first slot 0(sp).
420 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
421 // Register up to Register::number_of_registers are the 32-bit
422 // integer registers.
423
424 // Pass first two oop/int args in registers ECX and EDX.
425 // Pass first two float/double args in registers XMM0 and XMM1.
426 // Doubles have precedence, so if you pass a mix of floats and doubles
427 // the doubles will grab the registers before the floats will.
428
429 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
430 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
431 // units regardless of build. Of course for i486 there is no 64 bit build
432
433
434 // ---------------------------------------------------------------------------
435 // The compiled Java calling convention.
436 // Pass first two oop/int args in registers ECX and EDX.
437 // Pass first two float/double args in registers XMM0 and XMM1.
438 // Doubles have precedence, so if you pass a mix of floats and doubles
439 // the doubles will grab the registers before the floats will.
440 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
441 VMRegPair *regs,
442 int total_args_passed) {
443 uint stack = 0; // Starting stack position for args on stack
444
445
446 // Pass first two oop/int args in registers ECX and EDX.
447 uint reg_arg0 = 9999;
448 uint reg_arg1 = 9999;
449
450 // Pass first two float/double args in registers XMM0 and XMM1.
451 // Doubles have precedence, so if you pass a mix of floats and doubles
452 // the doubles will grab the registers before the floats will.
453 // CNC - TURNED OFF FOR non-SSE.
454 // On Intel we have to round all doubles (and most floats) at
455 // call sites by storing to the stack in any case.
456 // UseSSE=0 ==> Don't Use ==> 9999+0
457 // UseSSE=1 ==> Floats only ==> 9999+1
458 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
459 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
460 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
461 uint freg_arg0 = 9999+fargs;
462 uint freg_arg1 = 9999+fargs;
463
464 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
465 int i;
466 for( i = 0; i < total_args_passed; i++) {
467 if( sig_bt[i] == T_DOUBLE ) {
468 // first 2 doubles go in registers
469 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
470 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
471 else // Else double is passed low on the stack to be aligned.
472 stack += 2;
473 } else if( sig_bt[i] == T_LONG ) {
474 stack += 2;
475 }
476 }
477 int dstack = 0; // Separate counter for placing doubles
478
479 // Now pick where all else goes.
480 for( i = 0; i < total_args_passed; i++) {
481 // From the type and the argument number (count) compute the location
482 switch( sig_bt[i] ) {
483 case T_SHORT:
484 case T_CHAR:
485 case T_BYTE:
486 case T_BOOLEAN:
487 case T_INT:
488 case T_ARRAY:
489 case T_OBJECT:
490 case T_ADDRESS:
491 if( reg_arg0 == 9999 ) {
492 reg_arg0 = i;
493 regs[i].set1(rcx->as_VMReg());
494 } else if( reg_arg1 == 9999 ) {
495 reg_arg1 = i;
496 regs[i].set1(rdx->as_VMReg());
497 } else {
498 regs[i].set1(VMRegImpl::stack2reg(stack++));
499 }
500 break;
501 case T_FLOAT:
502 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
503 freg_arg0 = i;
504 regs[i].set1(xmm0->as_VMReg());
505 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
506 freg_arg1 = i;
507 regs[i].set1(xmm1->as_VMReg());
508 } else {
509 regs[i].set1(VMRegImpl::stack2reg(stack++));
510 }
511 break;
512 case T_LONG:
513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
514 regs[i].set2(VMRegImpl::stack2reg(dstack));
515 dstack += 2;
516 break;
517 case T_DOUBLE:
518 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
519 if( freg_arg0 == (uint)i ) {
520 regs[i].set2(xmm0->as_VMReg());
521 } else if( freg_arg1 == (uint)i ) {
522 regs[i].set2(xmm1->as_VMReg());
523 } else {
524 regs[i].set2(VMRegImpl::stack2reg(dstack));
525 dstack += 2;
526 }
527 break;
528 case T_VOID: regs[i].set_bad(); break;
529 break;
530 default:
531 ShouldNotReachHere();
532 break;
533 }
534 }
535
536 return stack;
537 }
538
539 // Patch the callers callsite with entry to compiled code if it exists.
540 static void patch_callers_callsite(MacroAssembler *masm) {
541 Label L;
542 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
543 __ jcc(Assembler::equal, L);
544 // Schedule the branch target address early.
545 // Call into the VM to patch the caller, then jump to compiled callee
546 // rax, isn't live so capture return address while we easily can
547 __ movptr(rax, Address(rsp, 0));
548 __ pusha();
549 __ pushf();
550
551 if (UseSSE == 1) {
552 __ subptr(rsp, 2*wordSize);
553 __ movflt(Address(rsp, 0), xmm0);
554 __ movflt(Address(rsp, wordSize), xmm1);
555 }
556 if (UseSSE >= 2) {
557 __ subptr(rsp, 4*wordSize);
558 __ movdbl(Address(rsp, 0), xmm0);
559 __ movdbl(Address(rsp, 2*wordSize), xmm1);
560 }
561 #ifdef COMPILER2
562 // C2 may leave the stack dirty if not in SSE2+ mode
563 if (UseSSE >= 2) {
564 __ verify_FPU(0, "c2i transition should have clean FPU stack");
565 } else {
566 __ empty_FPU_stack();
567 }
568 #endif /* COMPILER2 */
569
570 // VM needs caller's callsite
571 __ push(rax);
572 // VM needs target method
573 __ push(rbx);
574 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
575 __ addptr(rsp, 2*wordSize);
576
577 if (UseSSE == 1) {
578 __ movflt(xmm0, Address(rsp, 0));
579 __ movflt(xmm1, Address(rsp, wordSize));
580 __ addptr(rsp, 2*wordSize);
581 }
582 if (UseSSE >= 2) {
583 __ movdbl(xmm0, Address(rsp, 0));
584 __ movdbl(xmm1, Address(rsp, 2*wordSize));
585 __ addptr(rsp, 4*wordSize);
586 }
587
588 __ popf();
589 __ popa();
590 __ bind(L);
591 }
592
593
594 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
595 int next_off = st_off - Interpreter::stackElementSize;
596 __ movdbl(Address(rsp, next_off), r);
597 }
598
599 static void gen_c2i_adapter(MacroAssembler *masm,
600 int total_args_passed,
601 int comp_args_on_stack,
602 const BasicType *sig_bt,
603 const VMRegPair *regs,
604 Label& skip_fixup) {
605 // Before we get into the guts of the C2I adapter, see if we should be here
606 // at all. We've come from compiled code and are attempting to jump to the
607 // interpreter, which means the caller made a static call to get here
608 // (vcalls always get a compiled target if there is one). Check for a
609 // compiled target. If there is one, we need to patch the caller's call.
610 patch_callers_callsite(masm);
611
612 __ bind(skip_fixup);
613
614 #ifdef COMPILER2
615 // C2 may leave the stack dirty if not in SSE2+ mode
616 if (UseSSE >= 2) {
617 __ verify_FPU(0, "c2i transition should have clean FPU stack");
618 } else {
619 __ empty_FPU_stack();
620 }
621 #endif /* COMPILER2 */
622
623 // Since all args are passed on the stack, total_args_passed * interpreter_
624 // stack_element_size is the
625 // space we need.
626 int extraspace = total_args_passed * Interpreter::stackElementSize;
627
628 // Get return address
629 __ pop(rax);
630
631 // set senderSP value
632 __ movptr(rsi, rsp);
633
634 __ subptr(rsp, extraspace);
635
636 // Now write the args into the outgoing interpreter space
637 for (int i = 0; i < total_args_passed; i++) {
638 if (sig_bt[i] == T_VOID) {
639 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
640 continue;
641 }
642
643 // st_off points to lowest address on stack.
644 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
645 int next_off = st_off - Interpreter::stackElementSize;
646
647 // Say 4 args:
648 // i st_off
649 // 0 12 T_LONG
650 // 1 8 T_VOID
651 // 2 4 T_OBJECT
652 // 3 0 T_BOOL
653 VMReg r_1 = regs[i].first();
654 VMReg r_2 = regs[i].second();
655 if (!r_1->is_valid()) {
656 assert(!r_2->is_valid(), "");
657 continue;
658 }
659
660 if (r_1->is_stack()) {
661 // memory to memory use fpu stack top
662 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
663
664 if (!r_2->is_valid()) {
665 __ movl(rdi, Address(rsp, ld_off));
666 __ movptr(Address(rsp, st_off), rdi);
667 } else {
668
669 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
670 // st_off == MSW, st_off-wordSize == LSW
671
672 __ movptr(rdi, Address(rsp, ld_off));
673 __ movptr(Address(rsp, next_off), rdi);
674 __ movptr(rdi, Address(rsp, ld_off + wordSize));
675 __ movptr(Address(rsp, st_off), rdi);
676 }
677 } else if (r_1->is_Register()) {
678 Register r = r_1->as_Register();
679 if (!r_2->is_valid()) {
680 __ movl(Address(rsp, st_off), r);
681 } else {
682 // long/double in gpr
683 ShouldNotReachHere();
684 }
685 } else {
686 assert(r_1->is_XMMRegister(), "");
687 if (!r_2->is_valid()) {
688 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
689 } else {
690 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
691 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
692 }
693 }
694 }
695
696 // Schedule the branch target address early.
697 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
698 // And repush original return address
699 __ push(rax);
700 __ jmp(rcx);
701 }
702
703
704 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
705 int next_val_off = ld_off - Interpreter::stackElementSize;
706 __ movdbl(r, Address(saved_sp, next_val_off));
707 }
708
709 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
710 int total_args_passed,
711 int comp_args_on_stack,
712 const BasicType *sig_bt,
713 const VMRegPair *regs) {
714 // Note: rsi contains the senderSP on entry. We must preserve it since
715 // we may do a i2c -> c2i transition if we lose a race where compiled
716 // code goes non-entrant while we get args ready.
717
718 // Adapters can be frameless because they do not require the caller
719 // to perform additional cleanup work, such as correcting the stack pointer.
720 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
721 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
722 // even if a callee has modified the stack pointer.
723 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
724 // routinely repairs its caller's stack pointer (from sender_sp, which is set
725 // up via the senderSP register).
726 // In other words, if *either* the caller or callee is interpreted, we can
727 // get the stack pointer repaired after a call.
728 // This is why c2i and i2c adapters cannot be indefinitely composed.
729 // In particular, if a c2i adapter were to somehow call an i2c adapter,
730 // both caller and callee would be compiled methods, and neither would
731 // clean up the stack pointer changes performed by the two adapters.
732 // If this happens, control eventually transfers back to the compiled
733 // caller, but with an uncorrected stack, causing delayed havoc.
734
735 // Pick up the return address
736 __ movptr(rax, Address(rsp, 0));
737
738 // Must preserve original SP for loading incoming arguments because
739 // we need to align the outgoing SP for compiled code.
740 __ movptr(rdi, rsp);
741
742 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
743 // in registers, we will occasionally have no stack args.
744 int comp_words_on_stack = 0;
745 if (comp_args_on_stack) {
746 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
747 // registers are below. By subtracting stack0, we either get a negative
748 // number (all values in registers) or the maximum stack slot accessed.
749 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
750 // Convert 4-byte stack slots to words.
751 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
752 // Round up to miminum stack alignment, in wordSize
753 comp_words_on_stack = align_up(comp_words_on_stack, 2);
754 __ subptr(rsp, comp_words_on_stack * wordSize);
755 }
756
757 // Align the outgoing SP
758 __ andptr(rsp, -(StackAlignmentInBytes));
759
760 // push the return address on the stack (note that pushing, rather
761 // than storing it, yields the correct frame alignment for the callee)
762 __ push(rax);
763
764 // Put saved SP in another register
765 const Register saved_sp = rax;
766 __ movptr(saved_sp, rdi);
767
768
769 // Will jump to the compiled code just as if compiled code was doing it.
770 // Pre-load the register-jump target early, to schedule it better.
771 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
772
773 // Now generate the shuffle code. Pick up all register args and move the
774 // rest through the floating point stack top.
775 for (int i = 0; i < total_args_passed; i++) {
776 if (sig_bt[i] == T_VOID) {
777 // Longs and doubles are passed in native word order, but misaligned
778 // in the 32-bit build.
779 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
780 continue;
781 }
782
783 // Pick up 0, 1 or 2 words from SP+offset.
784
785 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
786 "scrambled load targets?");
787 // Load in argument order going down.
788 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
789 // Point to interpreter value (vs. tag)
790 int next_off = ld_off - Interpreter::stackElementSize;
791 //
792 //
793 //
794 VMReg r_1 = regs[i].first();
795 VMReg r_2 = regs[i].second();
796 if (!r_1->is_valid()) {
797 assert(!r_2->is_valid(), "");
798 continue;
799 }
800 if (r_1->is_stack()) {
801 // Convert stack slot to an SP offset (+ wordSize to account for return address )
802 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
803
804 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
805 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
806 // we be generated.
807 if (!r_2->is_valid()) {
808 // __ fld_s(Address(saved_sp, ld_off));
809 // __ fstp_s(Address(rsp, st_off));
810 __ movl(rsi, Address(saved_sp, ld_off));
811 __ movptr(Address(rsp, st_off), rsi);
812 } else {
813 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
814 // are accessed as negative so LSW is at LOW address
815
816 // ld_off is MSW so get LSW
817 // st_off is LSW (i.e. reg.first())
818 // __ fld_d(Address(saved_sp, next_off));
819 // __ fstp_d(Address(rsp, st_off));
820 //
821 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
822 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
823 // So we must adjust where to pick up the data to match the interpreter.
824 //
825 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
826 // are accessed as negative so LSW is at LOW address
827
828 // ld_off is MSW so get LSW
829 __ movptr(rsi, Address(saved_sp, next_off));
830 __ movptr(Address(rsp, st_off), rsi);
831 __ movptr(rsi, Address(saved_sp, ld_off));
832 __ movptr(Address(rsp, st_off + wordSize), rsi);
833 }
834 } else if (r_1->is_Register()) { // Register argument
835 Register r = r_1->as_Register();
836 assert(r != rax, "must be different");
837 if (r_2->is_valid()) {
838 //
839 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
840 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
841 // So we must adjust where to pick up the data to match the interpreter.
842
843 // this can be a misaligned move
844 __ movptr(r, Address(saved_sp, next_off));
845 assert(r_2->as_Register() != rax, "need another temporary register");
846 // Remember r_1 is low address (and LSB on x86)
847 // So r_2 gets loaded from high address regardless of the platform
848 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
849 } else {
850 __ movl(r, Address(saved_sp, ld_off));
851 }
852 } else {
853 assert(r_1->is_XMMRegister(), "");
854 if (!r_2->is_valid()) {
855 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
856 } else {
857 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
858 }
859 }
860 }
861
862 // 6243940 We might end up in handle_wrong_method if
863 // the callee is deoptimized as we race thru here. If that
864 // happens we don't want to take a safepoint because the
865 // caller frame will look interpreted and arguments are now
866 // "compiled" so it is much better to make this transition
867 // invisible to the stack walking code. Unfortunately if
868 // we try and find the callee by normal means a safepoint
869 // is possible. So we stash the desired callee in the thread
870 // and the vm will find there should this case occur.
871
872 __ get_thread(rax);
873 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
874
875 // move Method* to rax, in case we end up in an c2i adapter.
876 // the c2i adapters expect Method* in rax, (c2) because c2's
877 // resolve stubs return the result (the method) in rax,.
878 // I'd love to fix this.
879 __ mov(rax, rbx);
880
881 __ jmp(rdi);
882 }
883
884 // ---------------------------------------------------------------
885 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
886 int total_args_passed,
887 int comp_args_on_stack,
888 const BasicType *sig_bt,
889 const VMRegPair *regs,
890 AdapterHandlerEntry* handler) {
891 address i2c_entry = __ pc();
892
893 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
894
895 // -------------------------------------------------------------------------
896 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
897 // to the interpreter. The args start out packed in the compiled layout. They
898 // need to be unpacked into the interpreter layout. This will almost always
899 // require some stack space. We grow the current (compiled) stack, then repack
900 // the args. We finally end in a jump to the generic interpreter entry point.
901 // On exit from the interpreter, the interpreter will restore our SP (lest the
902 // compiled code, which relies solely on SP and not EBP, get sick).
903
904 address c2i_unverified_entry = __ pc();
905 Label skip_fixup;
906
907 Register data = rax;
908 Register receiver = rcx;
909 Register temp = rbx;
910
911 {
912 __ ic_check(1 /* end_alignment */);
913 __ movptr(rbx, Address(data, CompiledICData::speculated_method_offset()));
914 // Method might have been compiled since the call site was patched to
915 // interpreted if that is the case treat it as a miss so we can get
916 // the call site corrected.
917 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
918 __ jcc(Assembler::equal, skip_fixup);
919 }
920
921 address c2i_entry = __ pc();
922
923 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
924 bs->c2i_entry_barrier(masm);
925
926 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
927
928 handler->set_entry_points(i2c_entry, c2i_entry, c2i_unverified_entry, nullptr);
929 return;
930 }
931
932 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
933 VMRegPair *regs,
934 int total_args_passed) {
935
936 // We return the amount of VMRegImpl stack slots we need to reserve for all
937 // the arguments NOT counting out_preserve_stack_slots.
938
939 uint stack = 0; // All arguments on stack
940
941 for( int i = 0; i < total_args_passed; i++) {
942 // From the type and the argument number (count) compute the location
943 switch( sig_bt[i] ) {
944 case T_BOOLEAN:
945 case T_CHAR:
946 case T_FLOAT:
947 case T_BYTE:
948 case T_SHORT:
949 case T_INT:
950 case T_OBJECT:
951 case T_ARRAY:
952 case T_ADDRESS:
953 case T_METADATA:
954 regs[i].set1(VMRegImpl::stack2reg(stack++));
955 break;
956 case T_LONG:
957 case T_DOUBLE: // The stack numbering is reversed from Java
958 // Since C arguments do not get reversed, the ordering for
959 // doubles on the stack must be opposite the Java convention
960 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
961 regs[i].set2(VMRegImpl::stack2reg(stack));
962 stack += 2;
963 break;
964 case T_VOID: regs[i].set_bad(); break;
965 default:
966 ShouldNotReachHere();
967 break;
968 }
969 }
970 return stack;
971 }
972
973 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
974 uint num_bits,
975 uint total_args_passed) {
976 Unimplemented();
977 return 0;
978 }
979
980 // A simple move of integer like type
981 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
982 if (src.first()->is_stack()) {
983 if (dst.first()->is_stack()) {
984 // stack to stack
985 // __ ld(FP, reg2offset(src.first()), L5);
986 // __ st(L5, SP, reg2offset(dst.first()));
987 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
988 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
989 } else {
990 // stack to reg
991 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
992 }
993 } else if (dst.first()->is_stack()) {
994 // reg to stack
995 // no need to sign extend on 64bit
996 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
997 } else {
998 if (dst.first() != src.first()) {
999 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1000 }
1001 }
1002 }
1003
1004 // An oop arg. Must pass a handle not the oop itself
1005 static void object_move(MacroAssembler* masm,
1006 OopMap* map,
1007 int oop_handle_offset,
1008 int framesize_in_slots,
1009 VMRegPair src,
1010 VMRegPair dst,
1011 bool is_receiver,
1012 int* receiver_offset) {
1013
1014 // Because of the calling conventions we know that src can be a
1015 // register or a stack location. dst can only be a stack location.
1016
1017 assert(dst.first()->is_stack(), "must be stack");
1018 // must pass a handle. First figure out the location we use as a handle
1019
1020 if (src.first()->is_stack()) {
1021 // Oop is already on the stack as an argument
1022 Register rHandle = rax;
1023 Label nil;
1024 __ xorptr(rHandle, rHandle);
1025 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD);
1026 __ jcc(Assembler::equal, nil);
1027 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1028 __ bind(nil);
1029 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1030
1031 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1032 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1033 if (is_receiver) {
1034 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1035 }
1036 } else {
1037 // Oop is in a register we must store it to the space we reserve
1038 // on the stack for oop_handles
1039 const Register rOop = src.first()->as_Register();
1040 const Register rHandle = rax;
1041 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1042 int offset = oop_slot*VMRegImpl::stack_slot_size;
1043 Label skip;
1044 __ movptr(Address(rsp, offset), rOop);
1045 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1046 __ xorptr(rHandle, rHandle);
1047 __ cmpptr(rOop, NULL_WORD);
1048 __ jcc(Assembler::equal, skip);
1049 __ lea(rHandle, Address(rsp, offset));
1050 __ bind(skip);
1051 // Store the handle parameter
1052 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1053 if (is_receiver) {
1054 *receiver_offset = offset;
1055 }
1056 }
1057 }
1058
1059 // A float arg may have to do float reg int reg conversion
1060 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1061 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1062
1063 // Because of the calling convention we know that src is either a stack location
1064 // or an xmm register. dst can only be a stack location.
1065
1066 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1067
1068 if (src.first()->is_stack()) {
1069 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1070 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1071 } else {
1072 // reg to stack
1073 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1074 }
1075 }
1076
1077 // A long move
1078 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1079
1080 // The only legal possibility for a long_move VMRegPair is:
1081 // 1: two stack slots (possibly unaligned)
1082 // as neither the java or C calling convention will use registers
1083 // for longs.
1084
1085 if (src.first()->is_stack() && dst.first()->is_stack()) {
1086 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1087 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1088 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1089 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1090 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1091 } else {
1092 ShouldNotReachHere();
1093 }
1094 }
1095
1096 // A double move
1097 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1098
1099 // The only legal possibilities for a double_move VMRegPair are:
1100 // The painful thing here is that like long_move a VMRegPair might be
1101
1102 // Because of the calling convention we know that src is either
1103 // 1: a single physical register (xmm registers only)
1104 // 2: two stack slots (possibly unaligned)
1105 // dst can only be a pair of stack slots.
1106
1107 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1108
1109 if (src.first()->is_stack()) {
1110 // source is all stack
1111 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1112 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1113 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1114 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1115 } else {
1116 // reg to stack
1117 // No worries about stack alignment
1118 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1119 }
1120 }
1121
1122
1123 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1124 // We always ignore the frame_slots arg and just use the space just below frame pointer
1125 // which by this time is free to use
1126 switch (ret_type) {
1127 case T_FLOAT:
1128 __ fstp_s(Address(rbp, -wordSize));
1129 break;
1130 case T_DOUBLE:
1131 __ fstp_d(Address(rbp, -2*wordSize));
1132 break;
1133 case T_VOID: break;
1134 case T_LONG:
1135 __ movptr(Address(rbp, -wordSize), rax);
1136 __ movptr(Address(rbp, -2*wordSize), rdx);
1137 break;
1138 default: {
1139 __ movptr(Address(rbp, -wordSize), rax);
1140 }
1141 }
1142 }
1143
1144 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1145 // We always ignore the frame_slots arg and just use the space just below frame pointer
1146 // which by this time is free to use
1147 switch (ret_type) {
1148 case T_FLOAT:
1149 __ fld_s(Address(rbp, -wordSize));
1150 break;
1151 case T_DOUBLE:
1152 __ fld_d(Address(rbp, -2*wordSize));
1153 break;
1154 case T_LONG:
1155 __ movptr(rax, Address(rbp, -wordSize));
1156 __ movptr(rdx, Address(rbp, -2*wordSize));
1157 break;
1158 case T_VOID: break;
1159 default: {
1160 __ movptr(rax, Address(rbp, -wordSize));
1161 }
1162 }
1163 }
1164
1165 static void verify_oop_args(MacroAssembler* masm,
1166 const methodHandle& method,
1167 const BasicType* sig_bt,
1168 const VMRegPair* regs) {
1169 Register temp_reg = rbx; // not part of any compiled calling seq
1170 if (VerifyOops) {
1171 for (int i = 0; i < method->size_of_parameters(); i++) {
1172 if (is_reference_type(sig_bt[i])) {
1173 VMReg r = regs[i].first();
1174 assert(r->is_valid(), "bad oop arg");
1175 if (r->is_stack()) {
1176 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1177 __ verify_oop(temp_reg);
1178 } else {
1179 __ verify_oop(r->as_Register());
1180 }
1181 }
1182 }
1183 }
1184 }
1185
1186 static void gen_special_dispatch(MacroAssembler* masm,
1187 const methodHandle& method,
1188 const BasicType* sig_bt,
1189 const VMRegPair* regs) {
1190 verify_oop_args(masm, method, sig_bt, regs);
1191 vmIntrinsics::ID iid = method->intrinsic_id();
1192
1193 // Now write the args into the outgoing interpreter space
1194 bool has_receiver = false;
1195 Register receiver_reg = noreg;
1196 int member_arg_pos = -1;
1197 Register member_reg = noreg;
1198 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1199 if (ref_kind != 0) {
1200 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1201 member_reg = rbx; // known to be free at this point
1202 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1203 } else if (iid == vmIntrinsics::_invokeBasic) {
1204 has_receiver = true;
1205 } else {
1206 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1207 }
1208
1209 if (member_reg != noreg) {
1210 // Load the member_arg into register, if necessary.
1211 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1212 VMReg r = regs[member_arg_pos].first();
1213 if (r->is_stack()) {
1214 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1215 } else {
1216 // no data motion is needed
1217 member_reg = r->as_Register();
1218 }
1219 }
1220
1221 if (has_receiver) {
1222 // Make sure the receiver is loaded into a register.
1223 assert(method->size_of_parameters() > 0, "oob");
1224 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1225 VMReg r = regs[0].first();
1226 assert(r->is_valid(), "bad receiver arg");
1227 if (r->is_stack()) {
1228 // Porting note: This assumes that compiled calling conventions always
1229 // pass the receiver oop in a register. If this is not true on some
1230 // platform, pick a temp and load the receiver from stack.
1231 fatal("receiver always in a register");
1232 receiver_reg = rcx; // known to be free at this point
1233 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1234 } else {
1235 // no data motion is needed
1236 receiver_reg = r->as_Register();
1237 }
1238 }
1239
1240 // Figure out which address we are really jumping to:
1241 MethodHandles::generate_method_handle_dispatch(masm, iid,
1242 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1243 }
1244
1245 // ---------------------------------------------------------------------------
1246 // Generate a native wrapper for a given method. The method takes arguments
1247 // in the Java compiled code convention, marshals them to the native
1248 // convention (handlizes oops, etc), transitions to native, makes the call,
1249 // returns to java state (possibly blocking), unhandlizes any result and
1250 // returns.
1251 //
1252 // Critical native functions are a shorthand for the use of
1253 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1254 // functions. The wrapper is expected to unpack the arguments before
1255 // passing them to the callee. Critical native functions leave the state _in_Java,
1256 // since they cannot stop for GC.
1257 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1258 // block and the check for pending exceptions it's impossible for them
1259 // to be thrown.
1260 //
1261 //
1262 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1263 const methodHandle& method,
1264 int compile_id,
1265 BasicType* in_sig_bt,
1266 VMRegPair* in_regs,
1267 BasicType ret_type) {
1268 if (method->is_method_handle_intrinsic()) {
1269 vmIntrinsics::ID iid = method->intrinsic_id();
1270 intptr_t start = (intptr_t)__ pc();
1271 int vep_offset = ((intptr_t)__ pc()) - start;
1272 gen_special_dispatch(masm,
1273 method,
1274 in_sig_bt,
1275 in_regs);
1276 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1277 __ flush();
1278 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1279 return nmethod::new_native_nmethod(method,
1280 compile_id,
1281 masm->code(),
1282 vep_offset,
1283 frame_complete,
1284 stack_slots / VMRegImpl::slots_per_word,
1285 in_ByteSize(-1),
1286 in_ByteSize(-1),
1287 (OopMapSet*)nullptr);
1288 }
1289 address native_func = method->native_function();
1290 assert(native_func != nullptr, "must have function");
1291
1292 // An OopMap for lock (and class if static)
1293 OopMapSet *oop_maps = new OopMapSet();
1294
1295 // We have received a description of where all the java arg are located
1296 // on entry to the wrapper. We need to convert these args to where
1297 // the jni function will expect them. To figure out where they go
1298 // we convert the java signature to a C signature by inserting
1299 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1300
1301 const int total_in_args = method->size_of_parameters();
1302 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1303
1304 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1305 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1306
1307 int argc = 0;
1308 out_sig_bt[argc++] = T_ADDRESS;
1309 if (method->is_static()) {
1310 out_sig_bt[argc++] = T_OBJECT;
1311 }
1312
1313 for (int i = 0; i < total_in_args ; i++ ) {
1314 out_sig_bt[argc++] = in_sig_bt[i];
1315 }
1316
1317 // Now figure out where the args must be stored and how much stack space
1318 // they require.
1319 int out_arg_slots;
1320 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1321
1322 // Compute framesize for the wrapper. We need to handlize all oops in
1323 // registers a max of 2 on x86.
1324
1325 // Calculate the total number of stack slots we will need.
1326
1327 // First count the abi requirement plus all of the outgoing args
1328 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1329
1330 // Now the space for the inbound oop handle area
1331 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1332
1333 int oop_handle_offset = stack_slots;
1334 stack_slots += total_save_slots;
1335
1336 // Now any space we need for handlizing a klass if static method
1337
1338 int klass_slot_offset = 0;
1339 int klass_offset = -1;
1340 int lock_slot_offset = 0;
1341 bool is_static = false;
1342
1343 if (method->is_static()) {
1344 klass_slot_offset = stack_slots;
1345 stack_slots += VMRegImpl::slots_per_word;
1346 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1347 is_static = true;
1348 }
1349
1350 // Plus a lock if needed
1351
1352 if (method->is_synchronized()) {
1353 lock_slot_offset = stack_slots;
1354 stack_slots += VMRegImpl::slots_per_word;
1355 }
1356
1357 // Now a place (+2) to save return values or temp during shuffling
1358 // + 2 for return address (which we own) and saved rbp,
1359 stack_slots += 4;
1360
1361 // Ok The space we have allocated will look like:
1362 //
1363 //
1364 // FP-> | |
1365 // |---------------------|
1366 // | 2 slots for moves |
1367 // |---------------------|
1368 // | lock box (if sync) |
1369 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1370 // | klass (if static) |
1371 // |---------------------| <- klass_slot_offset
1372 // | oopHandle area |
1373 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1374 // | outbound memory |
1375 // | based arguments |
1376 // | |
1377 // |---------------------|
1378 // | |
1379 // SP-> | out_preserved_slots |
1380 //
1381 //
1382 // ****************************************************************************
1383 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1384 // arguments off of the stack after the jni call. Before the call we can use
1385 // instructions that are SP relative. After the jni call we switch to FP
1386 // relative instructions instead of re-adjusting the stack on windows.
1387 // ****************************************************************************
1388
1389
1390 // Now compute actual number of stack words we need rounding to make
1391 // stack properly aligned.
1392 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1393
1394 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1395
1396 intptr_t start = (intptr_t)__ pc();
1397
1398 // First thing make an ic check to see if we should even be here
1399
1400 // We are free to use all registers as temps without saving them and
1401 // restoring them except rbp. rbp is the only callee save register
1402 // as far as the interpreter and the compiler(s) are concerned.
1403
1404
1405 const Register receiver = rcx;
1406 Label exception_pending;
1407
1408 __ verify_oop(receiver);
1409 // verified entry must be aligned for code patching.
1410 __ ic_check(8 /* end_alignment */);
1411
1412 int vep_offset = ((intptr_t)__ pc()) - start;
1413
1414 #ifdef COMPILER1
1415 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1416 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1417 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1418 }
1419 #endif // COMPILER1
1420
1421 // The instruction at the verified entry point must be 5 bytes or longer
1422 // because it can be patched on the fly by make_non_entrant. The stack bang
1423 // instruction fits that requirement.
1424
1425 // Generate stack overflow check
1426 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1427
1428 // Generate a new frame for the wrapper.
1429 __ enter();
1430 // -2 because return address is already present and so is saved rbp
1431 __ subptr(rsp, stack_size - 2*wordSize);
1432
1433
1434 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1435 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */);
1436
1437 // Frame is now completed as far as size and linkage.
1438 int frame_complete = ((intptr_t)__ pc()) - start;
1439
1440 // Calculate the difference between rsp and rbp,. We need to know it
1441 // after the native call because on windows Java Natives will pop
1442 // the arguments and it is painful to do rsp relative addressing
1443 // in a platform independent way. So after the call we switch to
1444 // rbp, relative addressing.
1445
1446 int fp_adjustment = stack_size - 2*wordSize;
1447
1448 #ifdef COMPILER2
1449 // C2 may leave the stack dirty if not in SSE2+ mode
1450 if (UseSSE >= 2) {
1451 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1452 } else {
1453 __ empty_FPU_stack();
1454 }
1455 #endif /* COMPILER2 */
1456
1457 // Compute the rbp, offset for any slots used after the jni call
1458
1459 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1460
1461 // We use rdi as a thread pointer because it is callee save and
1462 // if we load it once it is usable thru the entire wrapper
1463 const Register thread = rdi;
1464
1465 // We use rsi as the oop handle for the receiver/klass
1466 // It is callee save so it survives the call to native
1467
1468 const Register oop_handle_reg = rsi;
1469
1470 __ get_thread(thread);
1471
1472 //
1473 // We immediately shuffle the arguments so that any vm call we have to
1474 // make from here on out (sync slow path, jvmti, etc.) we will have
1475 // captured the oops from our caller and have a valid oopMap for
1476 // them.
1477
1478 // -----------------
1479 // The Grand Shuffle
1480 //
1481 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1482 // and, if static, the class mirror instead of a receiver. This pretty much
1483 // guarantees that register layout will not match (and x86 doesn't use reg
1484 // parms though amd does). Since the native abi doesn't use register args
1485 // and the java conventions does we don't have to worry about collisions.
1486 // All of our moved are reg->stack or stack->stack.
1487 // We ignore the extra arguments during the shuffle and handle them at the
1488 // last moment. The shuffle is described by the two calling convention
1489 // vectors we have in our possession. We simply walk the java vector to
1490 // get the source locations and the c vector to get the destinations.
1491
1492 int c_arg = method->is_static() ? 2 : 1;
1493
1494 // Record rsp-based slot for receiver on stack for non-static methods
1495 int receiver_offset = -1;
1496
1497 // This is a trick. We double the stack slots so we can claim
1498 // the oops in the caller's frame. Since we are sure to have
1499 // more args than the caller doubling is enough to make
1500 // sure we can capture all the incoming oop args from the
1501 // caller.
1502 //
1503 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1504
1505 // Mark location of rbp,
1506 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1507
1508 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1509 // Are free to temporaries if we have to do stack to steck moves.
1510 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1511
1512 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1513 switch (in_sig_bt[i]) {
1514 case T_ARRAY:
1515 case T_OBJECT:
1516 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1517 ((i == 0) && (!is_static)),
1518 &receiver_offset);
1519 break;
1520 case T_VOID:
1521 break;
1522
1523 case T_FLOAT:
1524 float_move(masm, in_regs[i], out_regs[c_arg]);
1525 break;
1526
1527 case T_DOUBLE:
1528 assert( i + 1 < total_in_args &&
1529 in_sig_bt[i + 1] == T_VOID &&
1530 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1531 double_move(masm, in_regs[i], out_regs[c_arg]);
1532 break;
1533
1534 case T_LONG :
1535 long_move(masm, in_regs[i], out_regs[c_arg]);
1536 break;
1537
1538 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1539
1540 default:
1541 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1542 }
1543 }
1544
1545 // Pre-load a static method's oop into rsi. Used both by locking code and
1546 // the normal JNI call code.
1547 if (method->is_static()) {
1548
1549 // load opp into a register
1550 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1551
1552 // Now handlize the static class mirror it's known not-null.
1553 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1554 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1555
1556 // Now get the handle
1557 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1558 // store the klass handle as second argument
1559 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1560 }
1561
1562 // Change state to native (we save the return address in the thread, since it might not
1563 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1564 // points into the right code segment. It does not have to be the correct return pc.
1565 // We use the same pc/oopMap repeatedly when we call out
1566
1567 intptr_t the_pc = (intptr_t) __ pc();
1568 oop_maps->add_gc_map(the_pc - start, map);
1569
1570 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg);
1571
1572
1573 // We have all of the arguments setup at this point. We must not touch any register
1574 // argument registers at this point (what if we save/restore them there are no oop?
1575
1576 if (DTraceMethodProbes) {
1577 __ mov_metadata(rax, method());
1578 __ call_VM_leaf(
1579 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1580 thread, rax);
1581 }
1582
1583 // RedefineClasses() tracing support for obsolete method entry
1584 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1585 __ mov_metadata(rax, method());
1586 __ call_VM_leaf(
1587 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1588 thread, rax);
1589 }
1590
1591 // These are register definitions we need for locking/unlocking
1592 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1593 const Register obj_reg = rcx; // Will contain the oop
1594 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1595
1596 Label slow_path_lock;
1597 Label lock_done;
1598
1599 // Lock a synchronized method
1600 if (method->is_synchronized()) {
1601 Label count_mon;
1602
1603 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1604
1605 // Get the handle (the 2nd argument)
1606 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1607
1608 // Get address of the box
1609
1610 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1611
1612 // Load the oop from the handle
1613 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1614
1615 if (LockingMode == LM_MONITOR) {
1616 __ jmp(slow_path_lock);
1617 } else if (LockingMode == LM_LEGACY) {
1618 // Load immediate 1 into swap_reg %rax,
1619 __ movptr(swap_reg, 1);
1620
1621 // Load (object->mark() | 1) into swap_reg %rax,
1622 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1623
1624 // Save (object->mark() | 1) into BasicLock's displaced header
1625 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1626
1627 // src -> dest iff dest == rax, else rax, <- dest
1628 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1629 __ lock();
1630 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1631 __ jcc(Assembler::equal, count_mon);
1632
1633 // Test if the oopMark is an obvious stack pointer, i.e.,
1634 // 1) (mark & 3) == 0, and
1635 // 2) rsp <= mark < mark + os::pagesize()
1636 // These 3 tests can be done by evaluating the following
1637 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1638 // assuming both stack pointer and pagesize have their
1639 // least significant 2 bits clear.
1640 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1641
1642 __ subptr(swap_reg, rsp);
1643 __ andptr(swap_reg, 3 - (int)os::vm_page_size());
1644
1645 // Save the test result, for recursive case, the result is zero
1646 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1647 __ jcc(Assembler::notEqual, slow_path_lock);
1648 } else {
1649 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1650 // Lacking registers and thread on x86_32. Always take slow path.
1651 __ jmp(slow_path_lock);
1652 }
1653 __ bind(count_mon);
1654 __ inc_held_monitor_count();
1655
1656 // Slow path will re-enter here
1657 __ bind(lock_done);
1658 }
1659
1660
1661 // Finally just about ready to make the JNI call
1662
1663 // get JNIEnv* which is first argument to native
1664 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1665 __ movptr(Address(rsp, 0), rdx);
1666
1667 // Now set thread in native
1668 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1669
1670 __ call(RuntimeAddress(native_func));
1671
1672 // Verify or restore cpu control state after JNI call
1673 __ restore_cpu_control_state_after_jni(noreg);
1674
1675 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1676 // arguments off of the stack. We could just re-adjust the stack pointer here
1677 // and continue to do SP relative addressing but we instead switch to FP
1678 // relative addressing.
1679
1680 // Unpack native results.
1681 switch (ret_type) {
1682 case T_BOOLEAN: __ c2bool(rax); break;
1683 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1684 case T_BYTE : __ sign_extend_byte (rax); break;
1685 case T_SHORT : __ sign_extend_short(rax); break;
1686 case T_INT : /* nothing to do */ break;
1687 case T_DOUBLE :
1688 case T_FLOAT :
1689 // Result is in st0 we'll save as needed
1690 break;
1691 case T_ARRAY: // Really a handle
1692 case T_OBJECT: // Really a handle
1693 break; // can't de-handlize until after safepoint check
1694 case T_VOID: break;
1695 case T_LONG: break;
1696 default : ShouldNotReachHere();
1697 }
1698
1699 // Switch thread to "native transition" state before reading the synchronization state.
1700 // This additional state is necessary because reading and testing the synchronization
1701 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1702 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1703 // VM thread changes sync state to synchronizing and suspends threads for GC.
1704 // Thread A is resumed to finish this native method, but doesn't block here since it
1705 // didn't see any synchronization is progress, and escapes.
1706 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1707
1708 // Force this write out before the read below
1709 if (!UseSystemMemoryBarrier) {
1710 __ membar(Assembler::Membar_mask_bits(
1711 Assembler::LoadLoad | Assembler::LoadStore |
1712 Assembler::StoreLoad | Assembler::StoreStore));
1713 }
1714
1715 if (AlwaysRestoreFPU) {
1716 // Make sure the control word is correct.
1717 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1718 }
1719
1720 // check for safepoint operation in progress and/or pending suspend requests
1721 { Label Continue, slow_path;
1722
1723 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1724
1725 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1726 __ jcc(Assembler::equal, Continue);
1727 __ bind(slow_path);
1728
1729 // Don't use call_VM as it will see a possible pending exception and forward it
1730 // and never return here preventing us from clearing _last_native_pc down below.
1731 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1732 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1733 // by hand.
1734 //
1735 __ vzeroupper();
1736
1737 save_native_result(masm, ret_type, stack_slots);
1738 __ push(thread);
1739 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1740 JavaThread::check_special_condition_for_native_trans)));
1741 __ increment(rsp, wordSize);
1742 // Restore any method result value
1743 restore_native_result(masm, ret_type, stack_slots);
1744 __ bind(Continue);
1745 }
1746
1747 // change thread state
1748 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1749
1750 Label reguard;
1751 Label reguard_done;
1752 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1753 __ jcc(Assembler::equal, reguard);
1754
1755 // slow path reguard re-enters here
1756 __ bind(reguard_done);
1757
1758 // Handle possible exception (will unlock if necessary)
1759
1760 // native result if any is live
1761
1762 // Unlock
1763 Label slow_path_unlock;
1764 Label unlock_done;
1765 if (method->is_synchronized()) {
1766
1767 Label fast_done;
1768
1769 // Get locked oop from the handle we passed to jni
1770 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1771
1772 if (LockingMode == LM_LEGACY) {
1773 Label not_recur;
1774 // Simple recursive lock?
1775 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD);
1776 __ jcc(Assembler::notEqual, not_recur);
1777 __ dec_held_monitor_count();
1778 __ jmpb(fast_done);
1779 __ bind(not_recur);
1780 }
1781
1782 // Must save rax, if it is live now because cmpxchg must use it
1783 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1784 save_native_result(masm, ret_type, stack_slots);
1785 }
1786
1787 if (LockingMode == LM_MONITOR) {
1788 __ jmp(slow_path_unlock);
1789 } else if (LockingMode == LM_LEGACY) {
1790 // get old displaced header
1791 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1792
1793 // get address of the stack lock
1794 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1795
1796 // Atomic swap old header if oop still contains the stack lock
1797 // src -> dest iff dest == rax, else rax, <- dest
1798 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1799 __ lock();
1800 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1801 __ jcc(Assembler::notEqual, slow_path_unlock);
1802 __ dec_held_monitor_count();
1803 } else {
1804 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1805 __ lightweight_unlock(obj_reg, swap_reg, thread, lock_reg, slow_path_unlock);
1806 __ dec_held_monitor_count();
1807 }
1808
1809 // slow path re-enters here
1810 __ bind(unlock_done);
1811 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1812 restore_native_result(masm, ret_type, stack_slots);
1813 }
1814
1815 __ bind(fast_done);
1816 }
1817
1818 if (DTraceMethodProbes) {
1819 // Tell dtrace about this method exit
1820 save_native_result(masm, ret_type, stack_slots);
1821 __ mov_metadata(rax, method());
1822 __ call_VM_leaf(
1823 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1824 thread, rax);
1825 restore_native_result(masm, ret_type, stack_slots);
1826 }
1827
1828 // We can finally stop using that last_Java_frame we setup ages ago
1829
1830 __ reset_last_Java_frame(thread, false);
1831
1832 // Unbox oop result, e.g. JNIHandles::resolve value.
1833 if (is_reference_type(ret_type)) {
1834 __ resolve_jobject(rax /* value */,
1835 thread /* thread */,
1836 rcx /* tmp */);
1837 }
1838
1839 if (CheckJNICalls) {
1840 // clear_pending_jni_exception_check
1841 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
1842 }
1843
1844 // reset handle block
1845 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1846 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD);
1847
1848 // Any exception pending?
1849 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1850 __ jcc(Assembler::notEqual, exception_pending);
1851
1852 // no exception, we're almost done
1853
1854 // check that only result value is on FPU stack
1855 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1856
1857 // Fixup floating pointer results so that result looks like a return from a compiled method
1858 if (ret_type == T_FLOAT) {
1859 if (UseSSE >= 1) {
1860 // Pop st0 and store as float and reload into xmm register
1861 __ fstp_s(Address(rbp, -4));
1862 __ movflt(xmm0, Address(rbp, -4));
1863 }
1864 } else if (ret_type == T_DOUBLE) {
1865 if (UseSSE >= 2) {
1866 // Pop st0 and store as double and reload into xmm register
1867 __ fstp_d(Address(rbp, -8));
1868 __ movdbl(xmm0, Address(rbp, -8));
1869 }
1870 }
1871
1872 // Return
1873
1874 __ leave();
1875 __ ret(0);
1876
1877 // Unexpected paths are out of line and go here
1878
1879 // Slow path locking & unlocking
1880 if (method->is_synchronized()) {
1881
1882 // BEGIN Slow path lock
1883
1884 __ bind(slow_path_lock);
1885
1886 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1887 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1888 __ push(thread);
1889 __ push(lock_reg);
1890 __ push(obj_reg);
1891 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1892 __ addptr(rsp, 3*wordSize);
1893
1894 #ifdef ASSERT
1895 { Label L;
1896 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1897 __ jcc(Assembler::equal, L);
1898 __ stop("no pending exception allowed on exit from monitorenter");
1899 __ bind(L);
1900 }
1901 #endif
1902 __ jmp(lock_done);
1903
1904 // END Slow path lock
1905
1906 // BEGIN Slow path unlock
1907 __ bind(slow_path_unlock);
1908 __ vzeroupper();
1909 // Slow path unlock
1910
1911 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1912 save_native_result(masm, ret_type, stack_slots);
1913 }
1914 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1915
1916 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1917 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1918
1919
1920 // should be a peal
1921 // +wordSize because of the push above
1922 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1923 __ push(thread);
1924 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1925 __ push(rax);
1926
1927 __ push(obj_reg);
1928 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
1929 __ addptr(rsp, 3*wordSize);
1930 #ifdef ASSERT
1931 {
1932 Label L;
1933 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1934 __ jcc(Assembler::equal, L);
1935 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1936 __ bind(L);
1937 }
1938 #endif /* ASSERT */
1939
1940 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1941
1942 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1943 restore_native_result(masm, ret_type, stack_slots);
1944 }
1945 __ jmp(unlock_done);
1946 // END Slow path unlock
1947
1948 }
1949
1950 // SLOW PATH Reguard the stack if needed
1951
1952 __ bind(reguard);
1953 __ vzeroupper();
1954 save_native_result(masm, ret_type, stack_slots);
1955 {
1956 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
1957 }
1958 restore_native_result(masm, ret_type, stack_slots);
1959 __ jmp(reguard_done);
1960
1961
1962 // BEGIN EXCEPTION PROCESSING
1963
1964 // Forward the exception
1965 __ bind(exception_pending);
1966
1967 // remove possible return value from FPU register stack
1968 __ empty_FPU_stack();
1969
1970 // pop our frame
1971 __ leave();
1972 // and forward the exception
1973 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1974
1975 __ flush();
1976
1977 nmethod *nm = nmethod::new_native_nmethod(method,
1978 compile_id,
1979 masm->code(),
1980 vep_offset,
1981 frame_complete,
1982 stack_slots / VMRegImpl::slots_per_word,
1983 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
1984 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
1985 oop_maps);
1986
1987 return nm;
1988
1989 }
1990
1991 // this function returns the adjust size (in number of words) to a c2i adapter
1992 // activation for use during deoptimization
1993 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
1994 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
1995 }
1996
1997
1998 // Number of stack slots between incoming argument block and the start of
1999 // a new frame. The PROLOG must add this many slots to the stack. The
2000 // EPILOG must remove this many slots. Intel needs one slot for
2001 // return address and one for rbp, (must save rbp)
2002 uint SharedRuntime::in_preserve_stack_slots() {
2003 return 2+VerifyStackAtCalls;
2004 }
2005
2006 uint SharedRuntime::out_preserve_stack_slots() {
2007 return 0;
2008 }
2009
2010 VMReg SharedRuntime::thread_register() {
2011 Unimplemented();
2012 return nullptr;
2013 }
2014
2015 //------------------------------generate_deopt_blob----------------------------
2016 void SharedRuntime::generate_deopt_blob() {
2017 // allocate space for the code
2018 ResourceMark rm;
2019 // setup code generation tools
2020 // note: the buffer code size must account for StackShadowPages=50
2021 const char* name = SharedRuntime::stub_name(SharedStubId::deopt_id);
2022 CodeBuffer buffer(name, 1536, 1024);
2023 MacroAssembler* masm = new MacroAssembler(&buffer);
2024 int frame_size_in_words;
2025 OopMap* map = nullptr;
2026 // Account for the extra args we place on the stack
2027 // by the time we call fetch_unroll_info
2028 const int additional_words = 2; // deopt kind, thread
2029
2030 OopMapSet *oop_maps = new OopMapSet();
2031
2032 // -------------
2033 // This code enters when returning to a de-optimized nmethod. A return
2034 // address has been pushed on the stack, and return values are in
2035 // registers.
2036 // If we are doing a normal deopt then we were called from the patched
2037 // nmethod from the point we returned to the nmethod. So the return
2038 // address on the stack is wrong by NativeCall::instruction_size
2039 // We will adjust the value to it looks like we have the original return
2040 // address on the stack (like when we eagerly deoptimized).
2041 // In the case of an exception pending with deoptimized then we enter
2042 // with a return address on the stack that points after the call we patched
2043 // into the exception handler. We have the following register state:
2044 // rax,: exception
2045 // rbx,: exception handler
2046 // rdx: throwing pc
2047 // So in this case we simply jam rdx into the useless return address and
2048 // the stack looks just like we want.
2049 //
2050 // At this point we need to de-opt. We save the argument return
2051 // registers. We call the first C routine, fetch_unroll_info(). This
2052 // routine captures the return values and returns a structure which
2053 // describes the current frame size and the sizes of all replacement frames.
2054 // The current frame is compiled code and may contain many inlined
2055 // functions, each with their own JVM state. We pop the current frame, then
2056 // push all the new frames. Then we call the C routine unpack_frames() to
2057 // populate these frames. Finally unpack_frames() returns us the new target
2058 // address. Notice that callee-save registers are BLOWN here; they have
2059 // already been captured in the vframeArray at the time the return PC was
2060 // patched.
2061 address start = __ pc();
2062 Label cont;
2063
2064 // Prolog for non exception case!
2065
2066 // Save everything in sight.
2067
2068 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2069 // Normal deoptimization
2070 __ push(Deoptimization::Unpack_deopt);
2071 __ jmp(cont);
2072
2073 int reexecute_offset = __ pc() - start;
2074
2075 // Reexecute case
2076 // return address is the pc describes what bci to do re-execute at
2077
2078 // No need to update map as each call to save_live_registers will produce identical oopmap
2079 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2080
2081 __ push(Deoptimization::Unpack_reexecute);
2082 __ jmp(cont);
2083
2084 int exception_offset = __ pc() - start;
2085
2086 // Prolog for exception case
2087
2088 // all registers are dead at this entry point, except for rax, and
2089 // rdx which contain the exception oop and exception pc
2090 // respectively. Set them in TLS and fall thru to the
2091 // unpack_with_exception_in_tls entry point.
2092
2093 __ get_thread(rdi);
2094 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2095 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2096
2097 int exception_in_tls_offset = __ pc() - start;
2098
2099 // new implementation because exception oop is now passed in JavaThread
2100
2101 // Prolog for exception case
2102 // All registers must be preserved because they might be used by LinearScan
2103 // Exceptiop oop and throwing PC are passed in JavaThread
2104 // tos: stack at point of call to method that threw the exception (i.e. only
2105 // args are on the stack, no return address)
2106
2107 // make room on stack for the return address
2108 // It will be patched later with the throwing pc. The correct value is not
2109 // available now because loading it from memory would destroy registers.
2110 __ push(0);
2111
2112 // Save everything in sight.
2113
2114 // No need to update map as each call to save_live_registers will produce identical oopmap
2115 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2116
2117 // Now it is safe to overwrite any register
2118
2119 // store the correct deoptimization type
2120 __ push(Deoptimization::Unpack_exception);
2121
2122 // load throwing pc from JavaThread and patch it as the return address
2123 // of the current frame. Then clear the field in JavaThread
2124 __ get_thread(rdi);
2125 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2126 __ movptr(Address(rbp, wordSize), rdx);
2127 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2128
2129 #ifdef ASSERT
2130 // verify that there is really an exception oop in JavaThread
2131 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2132 __ verify_oop(rax);
2133
2134 // verify that there is no pending exception
2135 Label no_pending_exception;
2136 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2137 __ testptr(rax, rax);
2138 __ jcc(Assembler::zero, no_pending_exception);
2139 __ stop("must not have pending exception here");
2140 __ bind(no_pending_exception);
2141 #endif
2142
2143 __ bind(cont);
2144
2145 // Compiled code leaves the floating point stack dirty, empty it.
2146 __ empty_FPU_stack();
2147
2148
2149 // Call C code. Need thread and this frame, but NOT official VM entry
2150 // crud. We cannot block on this call, no GC can happen.
2151 __ get_thread(rcx);
2152 __ push(rcx);
2153 // fetch_unroll_info needs to call last_java_frame()
2154 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg);
2155
2156 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2157
2158 // Need to have an oopmap that tells fetch_unroll_info where to
2159 // find any register it might need.
2160
2161 oop_maps->add_gc_map( __ pc()-start, map);
2162
2163 // Discard args to fetch_unroll_info
2164 __ pop(rcx);
2165 __ pop(rcx);
2166
2167 __ get_thread(rcx);
2168 __ reset_last_Java_frame(rcx, false);
2169
2170 // Load UnrollBlock into EDI
2171 __ mov(rdi, rax);
2172
2173 // Move the unpack kind to a safe place in the UnrollBlock because
2174 // we are very short of registers
2175
2176 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset());
2177 // retrieve the deopt kind from the UnrollBlock.
2178 __ movl(rax, unpack_kind);
2179
2180 Label noException;
2181 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2182 __ jcc(Assembler::notEqual, noException);
2183 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2184 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2185 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2186 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2187
2188 __ verify_oop(rax);
2189
2190 // Overwrite the result registers with the exception results.
2191 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2192 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2193
2194 __ bind(noException);
2195
2196 // Stack is back to only having register save data on the stack.
2197 // Now restore the result registers. Everything else is either dead or captured
2198 // in the vframeArray.
2199
2200 RegisterSaver::restore_result_registers(masm);
2201
2202 // Non standard control word may be leaked out through a safepoint blob, and we can
2203 // deopt at a poll point with the non standard control word. However, we should make
2204 // sure the control word is correct after restore_result_registers.
2205 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2206
2207 // All of the register save area has been popped of the stack. Only the
2208 // return address remains.
2209
2210 // Pop all the frames we must move/replace.
2211 //
2212 // Frame picture (youngest to oldest)
2213 // 1: self-frame (no frame link)
2214 // 2: deopting frame (no frame link)
2215 // 3: caller of deopting frame (could be compiled/interpreted).
2216 //
2217 // Note: by leaving the return address of self-frame on the stack
2218 // and using the size of frame 2 to adjust the stack
2219 // when we are done the return to frame 3 will still be on the stack.
2220
2221 // Pop deoptimized frame
2222 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2223
2224 // sp should be pointing at the return address to the caller (3)
2225
2226 // Pick up the initial fp we should save
2227 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2228 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2229
2230 #ifdef ASSERT
2231 // Compilers generate code that bang the stack by as much as the
2232 // interpreter would need. So this stack banging should never
2233 // trigger a fault. Verify that it does not on non product builds.
2234 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2235 __ bang_stack_size(rbx, rcx);
2236 #endif
2237
2238 // Load array of frame pcs into ECX
2239 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2240
2241 __ pop(rsi); // trash the old pc
2242
2243 // Load array of frame sizes into ESI
2244 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2245
2246 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2247
2248 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2249 __ movl(counter, rbx);
2250
2251 // Now adjust the caller's stack to make up for the extra locals
2252 // but record the original sp so that we can save it in the skeletal interpreter
2253 // frame and the stack walking of interpreter_sender will get the unextended sp
2254 // value and not the "real" sp value.
2255
2256 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2257 __ movptr(sp_temp, rsp);
2258 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2259 __ subptr(rsp, rbx);
2260
2261 // Push interpreter frames in a loop
2262 Label loop;
2263 __ bind(loop);
2264 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2265 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2266 __ pushptr(Address(rcx, 0)); // save return address
2267 __ enter(); // save old & set new rbp,
2268 __ subptr(rsp, rbx); // Prolog!
2269 __ movptr(rbx, sp_temp); // sender's sp
2270 // This value is corrected by layout_activation_impl
2271 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2272 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2273 __ movptr(sp_temp, rsp); // pass to next frame
2274 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2275 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2276 __ decrementl(counter); // decrement counter
2277 __ jcc(Assembler::notZero, loop);
2278 __ pushptr(Address(rcx, 0)); // save final return address
2279
2280 // Re-push self-frame
2281 __ enter(); // save old & set new rbp,
2282
2283 // Return address and rbp, are in place
2284 // We'll push additional args later. Just allocate a full sized
2285 // register save area
2286 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2287
2288 // Restore frame locals after moving the frame
2289 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2290 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2291 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2292 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2293 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2294
2295 // Set up the args to unpack_frame
2296
2297 __ pushl(unpack_kind); // get the unpack_kind value
2298 __ get_thread(rcx);
2299 __ push(rcx);
2300
2301 // set last_Java_sp, last_Java_fp
2302 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg);
2303
2304 // Call C code. Need thread but NOT official VM entry
2305 // crud. We cannot block on this call, no GC can happen. Call should
2306 // restore return values to their stack-slots with the new SP.
2307 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2308 // Set an oopmap for the call site
2309 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2310
2311 // rax, contains the return result type
2312 __ push(rax);
2313
2314 __ get_thread(rcx);
2315 __ reset_last_Java_frame(rcx, false);
2316
2317 // Collect return values
2318 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2319 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2320
2321 // Clear floating point stack before returning to interpreter
2322 __ empty_FPU_stack();
2323
2324 // Check if we should push the float or double return value.
2325 Label results_done, yes_double_value;
2326 __ cmpl(Address(rsp, 0), T_DOUBLE);
2327 __ jcc (Assembler::zero, yes_double_value);
2328 __ cmpl(Address(rsp, 0), T_FLOAT);
2329 __ jcc (Assembler::notZero, results_done);
2330
2331 // return float value as expected by interpreter
2332 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2333 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2334 __ jmp(results_done);
2335
2336 // return double value as expected by interpreter
2337 __ bind(yes_double_value);
2338 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2339 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2340
2341 __ bind(results_done);
2342
2343 // Pop self-frame.
2344 __ leave(); // Epilog!
2345
2346 // Jump to interpreter
2347 __ ret(0);
2348
2349 // -------------
2350 // make sure all code is generated
2351 masm->flush();
2352
2353 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2354 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2355 }
2356
2357 //------------------------------generate_handler_blob------
2358 //
2359 // Generate a special Compile2Runtime blob that saves all registers,
2360 // setup oopmap, and calls safepoint code to stop the compiled code for
2361 // a safepoint.
2362 //
2363 SafepointBlob* SharedRuntime::generate_handler_blob(SharedStubId id, address call_ptr) {
2364
2365 // Account for thread arg in our frame
2366 const int additional_words = 1;
2367 int frame_size_in_words;
2368
2369 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2370 assert(is_polling_page_id(id), "expected a polling page stub id");
2371
2372 ResourceMark rm;
2373 OopMapSet *oop_maps = new OopMapSet();
2374 OopMap* map;
2375
2376 // allocate space for the code
2377 // setup code generation tools
2378 const char* name = SharedRuntime::stub_name(id);
2379 CodeBuffer buffer(name, 2048, 1024);
2380 MacroAssembler* masm = new MacroAssembler(&buffer);
2381
2382 const Register java_thread = rdi; // callee-saved for VC++
2383 address start = __ pc();
2384 address call_pc = nullptr;
2385 bool cause_return = (id == SharedStubId::polling_page_return_handler_id);
2386 bool save_vectors = (id == SharedStubId::polling_page_vectors_safepoint_handler_id);
2387
2388 // If cause_return is true we are at a poll_return and there is
2389 // the return address on the stack to the caller on the nmethod
2390 // that is safepoint. We can leave this return on the stack and
2391 // effectively complete the return and safepoint in the caller.
2392 // Otherwise we push space for a return address that the safepoint
2393 // handler will install later to make the stack walking sensible.
2394 if (!cause_return)
2395 __ push(rbx); // Make room for return address (or push it again)
2396
2397 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2398
2399 // The following is basically a call_VM. However, we need the precise
2400 // address of the call in order to generate an oopmap. Hence, we do all the
2401 // work ourselves.
2402
2403 // Push thread argument and setup last_Java_sp
2404 __ get_thread(java_thread);
2405 __ push(java_thread);
2406 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg);
2407
2408 // if this was not a poll_return then we need to correct the return address now.
2409 if (!cause_return) {
2410 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2411 // Additionally, rbx is a callee saved register and we can look at it later to determine
2412 // if someone changed the return address for us!
2413 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2414 __ movptr(Address(rbp, wordSize), rbx);
2415 }
2416
2417 // do the call
2418 __ call(RuntimeAddress(call_ptr));
2419
2420 // Set an oopmap for the call site. This oopmap will map all
2421 // oop-registers and debug-info registers as callee-saved. This
2422 // will allow deoptimization at this safepoint to find all possible
2423 // debug-info recordings, as well as let GC find all oops.
2424
2425 oop_maps->add_gc_map( __ pc() - start, map);
2426
2427 // Discard arg
2428 __ pop(rcx);
2429
2430 Label noException;
2431
2432 // Clear last_Java_sp again
2433 __ get_thread(java_thread);
2434 __ reset_last_Java_frame(java_thread, false);
2435
2436 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2437 __ jcc(Assembler::equal, noException);
2438
2439 // Exception pending
2440 RegisterSaver::restore_live_registers(masm, save_vectors);
2441
2442 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2443
2444 __ bind(noException);
2445
2446 Label no_adjust, bail, not_special;
2447 if (!cause_return) {
2448 // If our stashed return pc was modified by the runtime we avoid touching it
2449 __ cmpptr(rbx, Address(rbp, wordSize));
2450 __ jccb(Assembler::notEqual, no_adjust);
2451
2452 // Skip over the poll instruction.
2453 // See NativeInstruction::is_safepoint_poll()
2454 // Possible encodings:
2455 // 85 00 test %eax,(%rax)
2456 // 85 01 test %eax,(%rcx)
2457 // 85 02 test %eax,(%rdx)
2458 // 85 03 test %eax,(%rbx)
2459 // 85 06 test %eax,(%rsi)
2460 // 85 07 test %eax,(%rdi)
2461 //
2462 // 85 04 24 test %eax,(%rsp)
2463 // 85 45 00 test %eax,0x0(%rbp)
2464
2465 #ifdef ASSERT
2466 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2467 #endif
2468 // rsp/rbp base encoding takes 3 bytes with the following register values:
2469 // rsp 0x04
2470 // rbp 0x05
2471 __ movzbl(rcx, Address(rbx, 1));
2472 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2473 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
2474 __ cmpptr(rcx, 1);
2475 __ jcc(Assembler::above, not_special);
2476 __ addptr(rbx, 1);
2477 __ bind(not_special);
2478 #ifdef ASSERT
2479 // Verify the correct encoding of the poll we're about to skip.
2480 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2481 __ jcc(Assembler::notEqual, bail);
2482 // Mask out the modrm bits
2483 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2484 // rax encodes to 0, so if the bits are nonzero it's incorrect
2485 __ jcc(Assembler::notZero, bail);
2486 #endif
2487 // Adjust return pc forward to step over the safepoint poll instruction
2488 __ addptr(rbx, 2);
2489 __ movptr(Address(rbp, wordSize), rbx);
2490 }
2491
2492 __ bind(no_adjust);
2493 // Normal exit, register restoring and exit
2494 RegisterSaver::restore_live_registers(masm, save_vectors);
2495
2496 __ ret(0);
2497
2498 #ifdef ASSERT
2499 __ bind(bail);
2500 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2501 #endif
2502
2503 // make sure all code is generated
2504 masm->flush();
2505
2506 // Fill-out other meta info
2507 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2508 }
2509
2510 //
2511 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2512 //
2513 // Generate a stub that calls into vm to find out the proper destination
2514 // of a java call. All the argument registers are live at this point
2515 // but since this is generic code we don't know what they are and the caller
2516 // must do any gc of the args.
2517 //
2518 RuntimeStub* SharedRuntime::generate_resolve_blob(SharedStubId id, address destination) {
2519 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2520 assert(is_resolve_id(id), "expected a resolve stub id");
2521
2522 // allocate space for the code
2523 ResourceMark rm;
2524
2525 const char* name = SharedRuntime::stub_name(id);
2526 CodeBuffer buffer(name, 1000, 512);
2527 MacroAssembler* masm = new MacroAssembler(&buffer);
2528
2529 int frame_size_words;
2530 enum frame_layout {
2531 thread_off,
2532 extra_words };
2533
2534 OopMapSet *oop_maps = new OopMapSet();
2535 OopMap* map = nullptr;
2536
2537 int start = __ offset();
2538
2539 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2540
2541 int frame_complete = __ offset();
2542
2543 const Register thread = rdi;
2544 __ get_thread(rdi);
2545
2546 __ push(thread);
2547 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg);
2548
2549 __ call(RuntimeAddress(destination));
2550
2551
2552 // Set an oopmap for the call site.
2553 // We need this not only for callee-saved registers, but also for volatile
2554 // registers that the compiler might be keeping live across a safepoint.
2555
2556 oop_maps->add_gc_map( __ offset() - start, map);
2557
2558 // rax, contains the address we are going to jump to assuming no exception got installed
2559
2560 __ addptr(rsp, wordSize);
2561
2562 // clear last_Java_sp
2563 __ reset_last_Java_frame(thread, true);
2564 // check for pending exceptions
2565 Label pending;
2566 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
2567 __ jcc(Assembler::notEqual, pending);
2568
2569 // get the returned Method*
2570 __ get_vm_result_2(rbx, thread);
2571 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2572
2573 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2574
2575 RegisterSaver::restore_live_registers(masm);
2576
2577 // We are back to the original state on entry and ready to go.
2578
2579 __ jmp(rax);
2580
2581 // Pending exception after the safepoint
2582
2583 __ bind(pending);
2584
2585 RegisterSaver::restore_live_registers(masm);
2586
2587 // exception pending => remove activation and forward to exception handler
2588
2589 __ get_thread(thread);
2590 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2591 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2592 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2593
2594 // -------------
2595 // make sure all code is generated
2596 masm->flush();
2597
2598 // return the blob
2599 // frame_size_words or bytes??
2600 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2601 }
2602
2603 //------------------------------------------------------------------------------------------------------------------------
2604 // Continuation point for throwing of implicit exceptions that are not handled in
2605 // the current activation. Fabricates an exception oop and initiates normal
2606 // exception dispatching in this frame.
2607 //
2608 // Previously the compiler (c2) allowed for callee save registers on Java calls.
2609 // This is no longer true after adapter frames were removed but could possibly
2610 // be brought back in the future if the interpreter code was reworked and it
2611 // was deemed worthwhile. The comment below was left to describe what must
2612 // happen here if callee saves were resurrected. As it stands now this stub
2613 // could actually be a vanilla BufferBlob and have now oopMap at all.
2614 // Since it doesn't make much difference we've chosen to leave it the
2615 // way it was in the callee save days and keep the comment.
2616
2617 // If we need to preserve callee-saved values we need a callee-saved oop map and
2618 // therefore have to make these stubs into RuntimeStubs rather than BufferBlobs.
2619 // If the compiler needs all registers to be preserved between the fault
2620 // point and the exception handler then it must assume responsibility for that in
2621 // AbstractCompiler::continuation_for_implicit_null_exception or
2622 // continuation_for_implicit_division_by_zero_exception. All other implicit
2623 // exceptions (e.g., NullPointerException or AbstractMethodError on entry) are
2624 // either at call sites or otherwise assume that stack unwinding will be initiated,
2625 // so caller saved registers were assumed volatile in the compiler.
2626 RuntimeStub* SharedRuntime::generate_throw_exception(SharedStubId id, address runtime_entry) {
2627 assert(is_throw_id(id), "expected a throw stub id");
2628
2629 const char* name = SharedRuntime::stub_name(id);
2630
2631 // Information about frame layout at time of blocking runtime call.
2632 // Note that we only have to preserve callee-saved registers since
2633 // the compilers are responsible for supplying a continuation point
2634 // if they expect all registers to be preserved.
2635 enum layout {
2636 thread_off, // last_java_sp
2637 arg1_off,
2638 arg2_off,
2639 rbp_off, // callee saved register
2640 ret_pc,
2641 framesize
2642 };
2643
2644 int insts_size = 256;
2645 int locs_size = 32;
2646
2647 ResourceMark rm;
2648 const char* timer_msg = "SharedRuntime generate_throw_exception";
2649 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime));
2650
2651 CodeBuffer code(name, insts_size, locs_size);
2652 OopMapSet* oop_maps = new OopMapSet();
2653 MacroAssembler* masm = new MacroAssembler(&code);
2654
2655 address start = __ pc();
2656
2657 // This is an inlined and slightly modified version of call_VM
2658 // which has the ability to fetch the return PC out of
2659 // thread-local storage and also sets up last_Java_sp slightly
2660 // differently than the real call_VM
2661 Register java_thread = rbx;
2662 __ get_thread(java_thread);
2663
2664 __ enter(); // required for proper stackwalking of RuntimeStub frame
2665
2666 // pc and rbp, already pushed
2667 __ subptr(rsp, (framesize-2) * wordSize); // prolog
2668
2669 // Frame is now completed as far as size and linkage.
2670
2671 int frame_complete = __ pc() - start;
2672
2673 // push java thread (becomes first argument of C function)
2674 __ movptr(Address(rsp, thread_off * wordSize), java_thread);
2675 // Set up last_Java_sp and last_Java_fp
2676 __ set_last_Java_frame(java_thread, rsp, rbp, nullptr, noreg);
2677
2678 // Call runtime
2679 BLOCK_COMMENT("call runtime_entry");
2680 __ call(RuntimeAddress(runtime_entry));
2681 // Generate oop map
2682 OopMap* map = new OopMap(framesize, 0);
2683 oop_maps->add_gc_map(__ pc() - start, map);
2684
2685 // restore the thread (cannot use the pushed argument since arguments
2686 // may be overwritten by C code generated by an optimizing compiler);
2687 // however can use the register value directly if it is callee saved.
2688 __ get_thread(java_thread);
2689
2690 __ reset_last_Java_frame(java_thread, true);
2691
2692 __ leave(); // required for proper stackwalking of RuntimeStub frame
2693
2694 // check for pending exceptions
2695 #ifdef ASSERT
2696 Label L;
2697 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2698 __ jcc(Assembler::notEqual, L);
2699 __ should_not_reach_here();
2700 __ bind(L);
2701 #endif /* ASSERT */
2702 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2703
2704
2705 RuntimeStub* stub = RuntimeStub::new_runtime_stub(name, &code, frame_complete, framesize, oop_maps, false);
2706 return stub;
2707 }
2708
2709 #if INCLUDE_JFR
2710
2711 static void jfr_prologue(address the_pc, MacroAssembler* masm) {
2712 Register java_thread = rdi;
2713 __ get_thread(java_thread);
2714 __ set_last_Java_frame(java_thread, rsp, rbp, the_pc, noreg);
2715 __ movptr(Address(rsp, 0), java_thread);
2716 }
2717
2718 // The handle is dereferenced through a load barrier.
2719 static void jfr_epilogue(MacroAssembler* masm) {
2720 Register java_thread = rdi;
2721 __ get_thread(java_thread);
2722 __ reset_last_Java_frame(java_thread, true);
2723 }
2724
2725 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
2726 // It returns a jobject handle to the event writer.
2727 // The handle is dereferenced and the return value is the event writer oop.
2728 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
2729 enum layout {
2730 FPUState_off = 0,
2731 rbp_off = FPUStateSizeInWords,
2732 rdi_off,
2733 rsi_off,
2734 rcx_off,
2735 rbx_off,
2736 saved_argument_off,
2737 saved_argument_off2, // 2nd half of double
2738 framesize
2739 };
2740
2741 int insts_size = 1024;
2742 int locs_size = 64;
2743 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_write_checkpoint_id);
2744 CodeBuffer code(name, insts_size, locs_size);
2745 OopMapSet* oop_maps = new OopMapSet();
2746 MacroAssembler* masm = new MacroAssembler(&code);
2747
2748 address start = __ pc();
2749 __ enter();
2750 int frame_complete = __ pc() - start;
2751 address the_pc = __ pc();
2752 jfr_prologue(the_pc, masm);
2753 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
2754 jfr_epilogue(masm);
2755 __ resolve_global_jobject(rax, rdi, rdx);
2756 __ leave();
2757 __ ret(0);
2758
2759 OopMap* map = new OopMap(framesize, 1); // rbp
2760 oop_maps->add_gc_map(the_pc - start, map);
2761
2762 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2763 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2764 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2765 oop_maps, false);
2766 return stub;
2767 }
2768
2769 // For c2: call to return a leased buffer.
2770 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
2771 enum layout {
2772 FPUState_off = 0,
2773 rbp_off = FPUStateSizeInWords,
2774 rdi_off,
2775 rsi_off,
2776 rcx_off,
2777 rbx_off,
2778 saved_argument_off,
2779 saved_argument_off2, // 2nd half of double
2780 framesize
2781 };
2782
2783 int insts_size = 1024;
2784 int locs_size = 64;
2785 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_return_lease_id);
2786 CodeBuffer code(name, insts_size, locs_size);
2787 OopMapSet* oop_maps = new OopMapSet();
2788 MacroAssembler* masm = new MacroAssembler(&code);
2789
2790 address start = __ pc();
2791 __ enter();
2792 int frame_complete = __ pc() - start;
2793 address the_pc = __ pc();
2794 jfr_prologue(the_pc, masm);
2795 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1);
2796 jfr_epilogue(masm);
2797 __ leave();
2798 __ ret(0);
2799
2800 OopMap* map = new OopMap(framesize, 1); // rbp
2801 oop_maps->add_gc_map(the_pc - start, map);
2802
2803 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2804 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2805 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2806 oop_maps, false);
2807 return stub;
2808 }
2809
2810 #endif // INCLUDE_JFR