1770 #else
1771 fep = __ pc(); // ftos entry point
1772 __ push_f(xmm0);
1773 __ jmpb(L);
1774 dep = __ pc(); // dtos entry point
1775 __ push_d(xmm0);
1776 __ jmpb(L);
1777 #endif // _LP64
1778 lep = __ pc(); // ltos entry point
1779 __ push_l();
1780 __ jmpb(L);
1781 aep = bep = cep = sep = iep = __ pc(); // [abcsi]tos entry point
1782 __ push_i_or_ptr();
1783 vep = __ pc(); // vtos entry point
1784 __ bind(L);
1785 generate_and_dispatch(t);
1786 }
1787
1788 //-----------------------------------------------------------------------------
1789
1790 // Non-product code
1791 #ifndef PRODUCT
1792
1793 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1794 address entry = __ pc();
1795
1796 #ifndef _LP64
1797 // prepare expression stack
1798 __ pop(rcx); // pop return address so expression stack is 'pure'
1799 __ push(state); // save tosca
1800
1801 // pass tosca registers as arguments & call tracer
1802 __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), rcx, rax, rdx);
1803 __ mov(rcx, rax); // make sure return address is not destroyed by pop(state)
1804 __ pop(state); // restore tosca
1805
1806 // return
1807 __ jmp(rcx);
1808 #else
1809 __ push(state);
1812 __ push(c_rarg2);
1813 __ push(c_rarg3);
1814 __ mov(c_rarg2, rax); // Pass itos
1815 #ifdef _WIN64
1816 __ movflt(xmm3, xmm0); // Pass ftos
1817 #endif
1818 __ call_VM(noreg,
1819 CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode),
1820 c_rarg1, c_rarg2, c_rarg3);
1821 __ pop(c_rarg3);
1822 __ pop(c_rarg2);
1823 __ pop(c_rarg1);
1824 __ pop(c_rarg0);
1825 __ pop(state);
1826 __ ret(0); // return from result handler
1827 #endif // _LP64
1828
1829 return entry;
1830 }
1831
1832 void TemplateInterpreterGenerator::count_bytecode() {
1833 __ incrementl(ExternalAddress((address) &BytecodeCounter::_counter_value), rscratch1);
1834 }
1835
1836 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1837 __ incrementl(ExternalAddress((address) &BytecodeHistogram::_counters[t->bytecode()]), rscratch1);
1838 }
1839
1840 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1841 __ mov32(rbx, ExternalAddress((address) &BytecodePairHistogram::_index));
1842 __ shrl(rbx, BytecodePairHistogram::log2_number_of_codes);
1843 __ orl(rbx,
1844 ((int) t->bytecode()) <<
1845 BytecodePairHistogram::log2_number_of_codes);
1846 __ mov32(ExternalAddress((address) &BytecodePairHistogram::_index), rbx, rscratch1);
1847 __ lea(rscratch1, ExternalAddress((address) BytecodePairHistogram::_counters));
1848 __ incrementl(Address(rscratch1, rbx, Address::times_4));
1849 }
1850
1851
1852 void TemplateInterpreterGenerator::trace_bytecode(Template* t) {
1853 // Call a little run-time stub to avoid blow-up for each bytecode.
1854 // The run-time runtime saves the right registers, depending on
1855 // the tosca in-state for the given template.
1856
1857 assert(Interpreter::trace_code(t->tos_in()) != nullptr,
1858 "entry must have been generated");
1859 #ifndef _LP64
|
1770 #else
1771 fep = __ pc(); // ftos entry point
1772 __ push_f(xmm0);
1773 __ jmpb(L);
1774 dep = __ pc(); // dtos entry point
1775 __ push_d(xmm0);
1776 __ jmpb(L);
1777 #endif // _LP64
1778 lep = __ pc(); // ltos entry point
1779 __ push_l();
1780 __ jmpb(L);
1781 aep = bep = cep = sep = iep = __ pc(); // [abcsi]tos entry point
1782 __ push_i_or_ptr();
1783 vep = __ pc(); // vtos entry point
1784 __ bind(L);
1785 generate_and_dispatch(t);
1786 }
1787
1788 //-----------------------------------------------------------------------------
1789
1790 void TemplateInterpreterGenerator::count_bytecode() {
1791 #ifdef _LP64
1792 __ incrementq(ExternalAddress((address) &BytecodeCounter::_counter_value), rscratch1);
1793 #else
1794 Unimplemented();
1795 #endif
1796 }
1797
1798 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1799 __ incrementl(ExternalAddress((address) &BytecodeHistogram::_counters[t->bytecode()]), rscratch1);
1800 }
1801
1802 // Non-product code
1803 #ifndef PRODUCT
1804
1805 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1806 address entry = __ pc();
1807
1808 #ifndef _LP64
1809 // prepare expression stack
1810 __ pop(rcx); // pop return address so expression stack is 'pure'
1811 __ push(state); // save tosca
1812
1813 // pass tosca registers as arguments & call tracer
1814 __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), rcx, rax, rdx);
1815 __ mov(rcx, rax); // make sure return address is not destroyed by pop(state)
1816 __ pop(state); // restore tosca
1817
1818 // return
1819 __ jmp(rcx);
1820 #else
1821 __ push(state);
1824 __ push(c_rarg2);
1825 __ push(c_rarg3);
1826 __ mov(c_rarg2, rax); // Pass itos
1827 #ifdef _WIN64
1828 __ movflt(xmm3, xmm0); // Pass ftos
1829 #endif
1830 __ call_VM(noreg,
1831 CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode),
1832 c_rarg1, c_rarg2, c_rarg3);
1833 __ pop(c_rarg3);
1834 __ pop(c_rarg2);
1835 __ pop(c_rarg1);
1836 __ pop(c_rarg0);
1837 __ pop(state);
1838 __ ret(0); // return from result handler
1839 #endif // _LP64
1840
1841 return entry;
1842 }
1843
1844 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1845 __ mov32(rbx, ExternalAddress((address) &BytecodePairHistogram::_index));
1846 __ shrl(rbx, BytecodePairHistogram::log2_number_of_codes);
1847 __ orl(rbx,
1848 ((int) t->bytecode()) <<
1849 BytecodePairHistogram::log2_number_of_codes);
1850 __ mov32(ExternalAddress((address) &BytecodePairHistogram::_index), rbx, rscratch1);
1851 __ lea(rscratch1, ExternalAddress((address) BytecodePairHistogram::_counters));
1852 __ incrementl(Address(rscratch1, rbx, Address::times_4));
1853 }
1854
1855
1856 void TemplateInterpreterGenerator::trace_bytecode(Template* t) {
1857 // Call a little run-time stub to avoid blow-up for each bytecode.
1858 // The run-time runtime saves the right registers, depending on
1859 // the tosca in-state for the given template.
1860
1861 assert(Interpreter::trace_code(t->tos_in()) != nullptr,
1862 "entry must have been generated");
1863 #ifndef _LP64
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