src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp

*** 65,34 ***
    // beginning with M1 and A7, and don't need to be checked [1].
    // 1) hw.optional.floatingpoint always returns 1 [2].
    // 2) ID_AA64PFR0_EL1 describes AdvSIMD always equals to FP field.
    //    See the Arm ARM, section "ID_AA64PFR0_EL1, AArch64 Processor Feature
    //    Register 0".
!   _features = CPU_FP | CPU_ASIMD;
  
    // All Apple-darwin Arm processors have AES, PMULL, SHA1 and SHA2.
    // See https://github.com/apple-oss-distributions/xnu/blob/main/osfmk/arm/commpage/commpage.c#L412
    // Note that we ought to add assertions to check sysctlbyname parameters for
    // these four CPU features, e.g., "hw.optional.arm.FEAT_AES", but the
    // corresponding string names are not available before xnu-8019 version.
    // Hence, assertions are omitted considering backward compatibility.
!   _features |= CPU_AES | CPU_PMULL | CPU_SHA1 | CPU_SHA2;
  
    if (cpu_has("hw.optional.armv8_crc32")) {
!     _features |= CPU_CRC32;
    }
    if (cpu_has("hw.optional.arm.FEAT_LSE") ||
        cpu_has("hw.optional.armv8_1_atomics")) {
!     _features |= CPU_LSE;
    }
    if (cpu_has("hw.optional.arm.FEAT_SHA512") ||
        cpu_has("hw.optional.armv8_2_sha512")) {
!     _features |= CPU_SHA512;
    }
    if (cpu_has("hw.optional.arm.FEAT_SHA3") ||
        cpu_has("hw.optional.armv8_2_sha3")) {
!     _features |= CPU_SHA3;
    }
  
    int cache_line_size;
    int hw_conf_cache_line[] = { CTL_HW, HW_CACHELINE };
    sysctllen = sizeof(cache_line_size);
--- 65,38 ---
    // beginning with M1 and A7, and don't need to be checked [1].
    // 1) hw.optional.floatingpoint always returns 1 [2].
    // 2) ID_AA64PFR0_EL1 describes AdvSIMD always equals to FP field.
    //    See the Arm ARM, section "ID_AA64PFR0_EL1, AArch64 Processor Feature
    //    Register 0".
!   set_feature(CPU_FP);
+   set_feature(CPU_ASIMD);
  
    // All Apple-darwin Arm processors have AES, PMULL, SHA1 and SHA2.
    // See https://github.com/apple-oss-distributions/xnu/blob/main/osfmk/arm/commpage/commpage.c#L412
    // Note that we ought to add assertions to check sysctlbyname parameters for
    // these four CPU features, e.g., "hw.optional.arm.FEAT_AES", but the
    // corresponding string names are not available before xnu-8019 version.
    // Hence, assertions are omitted considering backward compatibility.
!   set_feature(CPU_AES);
+   set_feature(CPU_PMULL);
+   set_feature(CPU_SHA1);
+   set_feature(CPU_SHA2);
  
    if (cpu_has("hw.optional.armv8_crc32")) {
!     set_feature(CPU_CRC32);
    }
    if (cpu_has("hw.optional.arm.FEAT_LSE") ||
        cpu_has("hw.optional.armv8_1_atomics")) {
!     set_feature(CPU_LSE);
    }
    if (cpu_has("hw.optional.arm.FEAT_SHA512") ||
        cpu_has("hw.optional.armv8_2_sha512")) {
!     set_feature(CPU_SHA512);
    }
    if (cpu_has("hw.optional.arm.FEAT_SHA3") ||
        cpu_has("hw.optional.armv8_2_sha3")) {
!     set_feature(CPU_SHA3);
    }
  
    int cache_line_size;
    int hw_conf_cache_line[] = { CTL_HW, HW_CACHELINE };
    sysctllen = sizeof(cache_line_size);