1 /*
2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "asm/macroAssembler.hpp"
29 #include "asm/macroAssembler.inline.hpp"
30 #include "code/codeCache.hpp"
31 #include "code/debugInfoRec.hpp"
32 #include "code/icBuffer.hpp"
33 #include "code/vtableStubs.hpp"
34 #include "compiler/oopMap.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "interpreter/interp_masm.hpp"
38 #include "logging/log.hpp"
39 #include "memory/resourceArea.hpp"
40 #include "nativeInst_aarch64.hpp"
41 #include "oops/compiledICHolder.hpp"
42 #include "oops/klass.inline.hpp"
43 #include "prims/methodHandles.hpp"
44 #include "runtime/jniHandles.hpp"
45 #include "runtime/safepointMechanism.hpp"
46 #include "runtime/sharedRuntime.hpp"
47 #include "runtime/signature.hpp"
48 #include "runtime/stubRoutines.hpp"
49 #include "runtime/vframeArray.hpp"
50 #include "utilities/align.hpp"
51 #include "utilities/formatBuffer.hpp"
52 #include "vmreg_aarch64.inline.hpp"
53 #ifdef COMPILER1
54 #include "c1/c1_Runtime1.hpp"
55 #endif
56 #ifdef COMPILER2
57 #include "adfiles/ad_aarch64.hpp"
58 #include "opto/runtime.hpp"
59 #endif
60 #if INCLUDE_JVMCI
61 #include "jvmci/jvmciJavaClasses.hpp"
62 #endif
63
64 #define __ masm->
65
66 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
67
68 class SimpleRuntimeFrame {
69
70 public:
71
72 // Most of the runtime stubs have this simple frame layout.
73 // This class exists to make the layout shared in one place.
74 // Offsets are for compiler stack slots, which are jints.
75 enum layout {
76 // The frame sender code expects that rbp will be in the "natural" place and
77 // will override any oopMap setting for it. We must therefore force the layout
78 // so that it agrees with the frame sender code.
79 // we don't expect any arg reg save area so aarch64 asserts that
80 // frame::arg_reg_save_area_bytes == 0
81 rbp_off = 0,
82 rbp_off2,
83 return_off, return_off2,
84 framesize
85 };
86 };
87
88 // FIXME -- this is used by C1
89 class RegisterSaver {
90 const bool _save_vectors;
91 public:
92 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
93
94 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
95 void restore_live_registers(MacroAssembler* masm);
96
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
100
101 int reg_offset_in_bytes(Register r);
102 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
103 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
104 int v0_offset_in_bytes(void) { return 0; }
105
106 // Capture info about frame layout
107 // Note this is only correct when not saving full vectors.
108 enum layout {
109 fpu_state_off = 0,
110 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
111 // The frame sender code expects that rfp will be in
112 // the "natural" place and will override any oopMap
113 // setting for it. We must therefore force the layout
114 // so that it agrees with the frame sender code.
115 r0_off = fpu_state_off + FPUStateSizeInWords,
116 rfp_off = r0_off + (RegisterImpl::number_of_registers - 2) * RegisterImpl::max_slots_per_register,
117 return_off = rfp_off + RegisterImpl::max_slots_per_register, // slot for return address
118 reg_save_size = return_off + RegisterImpl::max_slots_per_register};
119
120 };
121
122 int RegisterSaver::reg_offset_in_bytes(Register r) {
123 // The integer registers are located above the floating point
124 // registers in the stack frame pushed by save_live_registers() so the
125 // offset depends on whether we are saving full vectors, and whether
126 // those vectors are NEON or SVE.
127
128 int slots_per_vect = FloatRegisterImpl::save_slots_per_register;
129
130 #if COMPILER2_OR_JVMCI
131 if (_save_vectors) {
132 slots_per_vect = FloatRegisterImpl::slots_per_neon_register;
133
134 #ifdef COMPILER2
135 if (Matcher::supports_scalable_vector()) {
136 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
137 }
138 #endif
139 }
140 #endif
141
142 int r0_offset = (slots_per_vect * FloatRegisterImpl::number_of_registers) * BytesPerInt;
143 return r0_offset + r->encoding() * wordSize;
144 }
145
146 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
147 bool use_sve = false;
148 int sve_vector_size_in_bytes = 0;
149 int sve_vector_size_in_slots = 0;
150
151 #ifdef COMPILER2
152 use_sve = Matcher::supports_scalable_vector();
153 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
154 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
155 #endif
156
157 #if COMPILER2_OR_JVMCI
158 if (_save_vectors) {
159 int vect_words = 0;
160 int extra_save_slots_per_register = 0;
161 // Save upper half of vector registers
162 if (use_sve) {
163 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegisterImpl::save_slots_per_register;
164 } else {
165 extra_save_slots_per_register = FloatRegisterImpl::extra_save_slots_per_neon_register;
166 }
167 vect_words = FloatRegisterImpl::number_of_registers * extra_save_slots_per_register /
168 VMRegImpl::slots_per_word;
169 additional_frame_words += vect_words;
170 }
171 #else
172 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
173 #endif
174
175 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
176 reg_save_size * BytesPerInt, 16);
177 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
178 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
179 // The caller will allocate additional_frame_words
180 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
181 // CodeBlob frame size is in words.
182 int frame_size_in_words = frame_size_in_bytes / wordSize;
183 *total_frame_words = frame_size_in_words;
184
185 // Save Integer and Float registers.
186 __ enter();
187 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes);
188
189 // Set an oopmap for the call site. This oopmap will map all
190 // oop-registers and debug-info registers as callee-saved. This
191 // will allow deoptimization at this safepoint to find all possible
192 // debug-info recordings, as well as let GC find all oops.
193
194 OopMapSet *oop_maps = new OopMapSet();
195 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
196
197 for (int i = 0; i < RegisterImpl::number_of_registers; i++) {
198 Register r = as_Register(i);
199 if (r <= rfp && r != rscratch1 && r != rscratch2) {
200 // SP offsets are in 4-byte words.
201 // Register slots are 8 bytes wide, 32 floating-point registers.
202 int sp_offset = RegisterImpl::max_slots_per_register * i +
203 FloatRegisterImpl::save_slots_per_register * FloatRegisterImpl::number_of_registers;
204 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots),
205 r->as_VMReg());
206 }
207 }
208
209 for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) {
210 FloatRegister r = as_FloatRegister(i);
211 int sp_offset = 0;
212 if (_save_vectors) {
213 sp_offset = use_sve ? (sve_vector_size_in_slots * i) :
214 (FloatRegisterImpl::slots_per_neon_register * i);
215 } else {
216 sp_offset = FloatRegisterImpl::save_slots_per_register * i;
217 }
218 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
219 r->as_VMReg());
220 }
221
222 return oop_map;
223 }
224
225 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
226 #ifdef COMPILER2
227 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
228 Matcher::scalable_vector_reg_size(T_BYTE));
229 #else
230 #if !INCLUDE_JVMCI
231 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
232 #endif
233 __ pop_CPU_state(_save_vectors);
234 #endif
235 __ leave();
236
237 }
238
239 // Is vector's size (in bytes) bigger than a size saved by default?
240 // 8 bytes vector registers are saved by default on AArch64.
241 bool SharedRuntime::is_wide_vector(int size) {
242 return size > 8;
243 }
244
245 // The java_calling_convention describes stack locations as ideal slots on
246 // a frame with no abi restrictions. Since we must observe abi restrictions
247 // (like the placement of the register window) the slots must be biased by
248 // the following value.
249 static int reg2offset_in(VMReg r) {
250 // Account for saved rfp and lr
251 // This should really be in_preserve_stack_slots
252 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
253 }
254
255 static int reg2offset_out(VMReg r) {
256 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
257 }
258
259 // ---------------------------------------------------------------------------
260 // Read the array of BasicTypes from a signature, and compute where the
261 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
262 // quantities. Values less than VMRegImpl::stack0 are registers, those above
263 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
264 // as framesizes are fixed.
265 // VMRegImpl::stack0 refers to the first slot 0(sp).
266 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
267 // up to RegisterImpl::number_of_registers) are the 64-bit
268 // integer registers.
269
270 // Note: the INPUTS in sig_bt are in units of Java argument words,
271 // which are 64-bit. The OUTPUTS are in 32-bit units.
272
273 // The Java calling convention is a "shifted" version of the C ABI.
274 // By skipping the first C ABI register we can call non-static jni
275 // methods with small numbers of arguments without having to shuffle
276 // the arguments at all. Since we control the java ABI we ought to at
277 // least get some advantage out of it.
278
279 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
280 VMRegPair *regs,
281 int total_args_passed) {
282
283 // Create the mapping between argument positions and
284 // registers.
285 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
286 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
287 };
288 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
289 j_farg0, j_farg1, j_farg2, j_farg3,
290 j_farg4, j_farg5, j_farg6, j_farg7
291 };
292
293
294 uint int_args = 0;
295 uint fp_args = 0;
296 uint stk_args = 0; // inc by 2 each time
297
298 for (int i = 0; i < total_args_passed; i++) {
299 switch (sig_bt[i]) {
300 case T_BOOLEAN:
301 case T_CHAR:
302 case T_BYTE:
303 case T_SHORT:
304 case T_INT:
305 if (int_args < Argument::n_int_register_parameters_j) {
306 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
307 } else {
308 regs[i].set1(VMRegImpl::stack2reg(stk_args));
309 stk_args += 2;
310 }
311 break;
312 case T_VOID:
313 // halves of T_LONG or T_DOUBLE
314 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
315 regs[i].set_bad();
316 break;
317 case T_LONG:
318 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
319 // fall through
320 case T_OBJECT:
321 case T_ARRAY:
322 case T_ADDRESS:
323 if (int_args < Argument::n_int_register_parameters_j) {
324 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
325 } else {
326 regs[i].set2(VMRegImpl::stack2reg(stk_args));
327 stk_args += 2;
328 }
329 break;
330 case T_FLOAT:
331 if (fp_args < Argument::n_float_register_parameters_j) {
332 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
333 } else {
334 regs[i].set1(VMRegImpl::stack2reg(stk_args));
335 stk_args += 2;
336 }
337 break;
338 case T_DOUBLE:
339 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
340 if (fp_args < Argument::n_float_register_parameters_j) {
341 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
342 } else {
343 regs[i].set2(VMRegImpl::stack2reg(stk_args));
344 stk_args += 2;
345 }
346 break;
347 default:
348 ShouldNotReachHere();
349 break;
350 }
351 }
352
353 return align_up(stk_args, 2);
354 }
355
356 // Patch the callers callsite with entry to compiled code if it exists.
357 static void patch_callers_callsite(MacroAssembler *masm) {
358 Label L;
359 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
360 __ cbz(rscratch1, L);
361
362 __ enter();
363 __ push_CPU_state();
364
365 // VM needs caller's callsite
366 // VM needs target method
367 // This needs to be a long call since we will relocate this adapter to
368 // the codeBuffer and it may not reach
369
370 #ifndef PRODUCT
371 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
372 #endif
373
374 __ mov(c_rarg0, rmethod);
375 __ mov(c_rarg1, lr);
376 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
377 __ blr(rscratch1);
378
379 // Explicit isb required because fixup_callers_callsite may change the code
380 // stream.
381 __ safepoint_isb();
382
383 __ pop_CPU_state();
384 // restore sp
385 __ leave();
386 __ bind(L);
387 }
388
389 static void gen_c2i_adapter(MacroAssembler *masm,
390 int total_args_passed,
391 int comp_args_on_stack,
392 const BasicType *sig_bt,
393 const VMRegPair *regs,
394 Label& skip_fixup) {
395 // Before we get into the guts of the C2I adapter, see if we should be here
396 // at all. We've come from compiled code and are attempting to jump to the
397 // interpreter, which means the caller made a static call to get here
398 // (vcalls always get a compiled target if there is one). Check for a
399 // compiled target. If there is one, we need to patch the caller's call.
400 patch_callers_callsite(masm);
401
402 __ bind(skip_fixup);
403
404 int words_pushed = 0;
405
406 // Since all args are passed on the stack, total_args_passed *
407 // Interpreter::stackElementSize is the space we need.
408
409 int extraspace = total_args_passed * Interpreter::stackElementSize;
410
411 __ mov(r13, sp);
412
413 // stack is aligned, keep it that way
414 extraspace = align_up(extraspace, 2*wordSize);
415
416 if (extraspace)
417 __ sub(sp, sp, extraspace);
418
419 // Now write the args into the outgoing interpreter space
420 for (int i = 0; i < total_args_passed; i++) {
421 if (sig_bt[i] == T_VOID) {
422 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
423 continue;
424 }
425
426 // offset to start parameters
427 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
428 int next_off = st_off - Interpreter::stackElementSize;
429
430 // Say 4 args:
431 // i st_off
432 // 0 32 T_LONG
433 // 1 24 T_VOID
434 // 2 16 T_OBJECT
435 // 3 8 T_BOOL
436 // - 0 return address
437 //
438 // However to make thing extra confusing. Because we can fit a Java long/double in
439 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
440 // leaves one slot empty and only stores to a single slot. In this case the
441 // slot that is occupied is the T_VOID slot. See I said it was confusing.
442
443 VMReg r_1 = regs[i].first();
444 VMReg r_2 = regs[i].second();
445 if (!r_1->is_valid()) {
446 assert(!r_2->is_valid(), "");
447 continue;
448 }
449 if (r_1->is_stack()) {
450 // memory to memory use rscratch1
451 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
452 + extraspace
453 + words_pushed * wordSize);
454 if (!r_2->is_valid()) {
455 // sign extend??
456 __ ldrw(rscratch1, Address(sp, ld_off));
457 __ str(rscratch1, Address(sp, st_off));
458
459 } else {
460
461 __ ldr(rscratch1, Address(sp, ld_off));
462
463 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
464 // T_DOUBLE and T_LONG use two slots in the interpreter
465 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
466 // ld_off == LSW, ld_off+wordSize == MSW
467 // st_off == MSW, next_off == LSW
468 __ str(rscratch1, Address(sp, next_off));
469 #ifdef ASSERT
470 // Overwrite the unused slot with known junk
471 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull);
472 __ str(rscratch1, Address(sp, st_off));
473 #endif /* ASSERT */
474 } else {
475 __ str(rscratch1, Address(sp, st_off));
476 }
477 }
478 } else if (r_1->is_Register()) {
479 Register r = r_1->as_Register();
480 if (!r_2->is_valid()) {
481 // must be only an int (or less ) so move only 32bits to slot
482 // why not sign extend??
483 __ str(r, Address(sp, st_off));
484 } else {
485 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
486 // T_DOUBLE and T_LONG use two slots in the interpreter
487 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
488 // jlong/double in gpr
489 #ifdef ASSERT
490 // Overwrite the unused slot with known junk
491 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull);
492 __ str(rscratch1, Address(sp, st_off));
493 #endif /* ASSERT */
494 __ str(r, Address(sp, next_off));
495 } else {
496 __ str(r, Address(sp, st_off));
497 }
498 }
499 } else {
500 assert(r_1->is_FloatRegister(), "");
501 if (!r_2->is_valid()) {
502 // only a float use just part of the slot
503 __ strs(r_1->as_FloatRegister(), Address(sp, st_off));
504 } else {
505 #ifdef ASSERT
506 // Overwrite the unused slot with known junk
507 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull);
508 __ str(rscratch1, Address(sp, st_off));
509 #endif /* ASSERT */
510 __ strd(r_1->as_FloatRegister(), Address(sp, next_off));
511 }
512 }
513 }
514
515 __ mov(esp, sp); // Interp expects args on caller's expression stack
516
517 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
518 __ br(rscratch1);
519 }
520
521
522 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
523 int total_args_passed,
524 int comp_args_on_stack,
525 const BasicType *sig_bt,
526 const VMRegPair *regs) {
527
528 // Note: r13 contains the senderSP on entry. We must preserve it since
529 // we may do a i2c -> c2i transition if we lose a race where compiled
530 // code goes non-entrant while we get args ready.
531
532 // In addition we use r13 to locate all the interpreter args because
533 // we must align the stack to 16 bytes.
534
535 // Adapters are frameless.
536
537 // An i2c adapter is frameless because the *caller* frame, which is
538 // interpreted, routinely repairs its own esp (from
539 // interpreter_frame_last_sp), even if a callee has modified the
540 // stack pointer. It also recalculates and aligns sp.
541
542 // A c2i adapter is frameless because the *callee* frame, which is
543 // interpreted, routinely repairs its caller's sp (from sender_sp,
544 // which is set up via the senderSP register).
545
546 // In other words, if *either* the caller or callee is interpreted, we can
547 // get the stack pointer repaired after a call.
548
549 // This is why c2i and i2c adapters cannot be indefinitely composed.
550 // In particular, if a c2i adapter were to somehow call an i2c adapter,
551 // both caller and callee would be compiled methods, and neither would
552 // clean up the stack pointer changes performed by the two adapters.
553 // If this happens, control eventually transfers back to the compiled
554 // caller, but with an uncorrected stack, causing delayed havoc.
555
556 if (VerifyAdapterCalls &&
557 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
558 #if 0
559 // So, let's test for cascading c2i/i2c adapters right now.
560 // assert(Interpreter::contains($return_addr) ||
561 // StubRoutines::contains($return_addr),
562 // "i2c adapter must return to an interpreter frame");
563 __ block_comment("verify_i2c { ");
564 Label L_ok;
565 if (Interpreter::code() != NULL)
566 range_check(masm, rax, r11,
567 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
568 L_ok);
569 if (StubRoutines::code1() != NULL)
570 range_check(masm, rax, r11,
571 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
572 L_ok);
573 if (StubRoutines::code2() != NULL)
574 range_check(masm, rax, r11,
575 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
576 L_ok);
577 const char* msg = "i2c adapter must return to an interpreter frame";
578 __ block_comment(msg);
579 __ stop(msg);
580 __ bind(L_ok);
581 __ block_comment("} verify_i2ce ");
582 #endif
583 }
584
585 // Cut-out for having no stack args.
586 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
587 if (comp_args_on_stack) {
588 __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
589 __ andr(sp, rscratch1, -16);
590 }
591
592 // Will jump to the compiled code just as if compiled code was doing it.
593 // Pre-load the register-jump target early, to schedule it better.
594 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
595
596 #if INCLUDE_JVMCI
597 if (EnableJVMCI) {
598 // check if this call should be routed towards a specific entry point
599 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
600 Label no_alternative_target;
601 __ cbz(rscratch2, no_alternative_target);
602 __ mov(rscratch1, rscratch2);
603 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
604 __ bind(no_alternative_target);
605 }
606 #endif // INCLUDE_JVMCI
607
608 // Now generate the shuffle code.
609 for (int i = 0; i < total_args_passed; i++) {
610 if (sig_bt[i] == T_VOID) {
611 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
612 continue;
613 }
614
615 // Pick up 0, 1 or 2 words from SP+offset.
616
617 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
618 "scrambled load targets?");
619 // Load in argument order going down.
620 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
621 // Point to interpreter value (vs. tag)
622 int next_off = ld_off - Interpreter::stackElementSize;
623 //
624 //
625 //
626 VMReg r_1 = regs[i].first();
627 VMReg r_2 = regs[i].second();
628 if (!r_1->is_valid()) {
629 assert(!r_2->is_valid(), "");
630 continue;
631 }
632 if (r_1->is_stack()) {
633 // Convert stack slot to an SP offset (+ wordSize to account for return address )
634 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
635 if (!r_2->is_valid()) {
636 // sign extend???
637 __ ldrsw(rscratch2, Address(esp, ld_off));
638 __ str(rscratch2, Address(sp, st_off));
639 } else {
640 //
641 // We are using two optoregs. This can be either T_OBJECT,
642 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
643 // two slots but only uses one for thr T_LONG or T_DOUBLE case
644 // So we must adjust where to pick up the data to match the
645 // interpreter.
646 //
647 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
648 // are accessed as negative so LSW is at LOW address
649
650 // ld_off is MSW so get LSW
651 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
652 next_off : ld_off;
653 __ ldr(rscratch2, Address(esp, offset));
654 // st_off is LSW (i.e. reg.first())
655 __ str(rscratch2, Address(sp, st_off));
656 }
657 } else if (r_1->is_Register()) { // Register argument
658 Register r = r_1->as_Register();
659 if (r_2->is_valid()) {
660 //
661 // We are using two VMRegs. This can be either T_OBJECT,
662 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
663 // two slots but only uses one for thr T_LONG or T_DOUBLE case
664 // So we must adjust where to pick up the data to match the
665 // interpreter.
666
667 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
668 next_off : ld_off;
669
670 // this can be a misaligned move
671 __ ldr(r, Address(esp, offset));
672 } else {
673 // sign extend and use a full word?
674 __ ldrw(r, Address(esp, ld_off));
675 }
676 } else {
677 if (!r_2->is_valid()) {
678 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
679 } else {
680 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
681 }
682 }
683 }
684
685 // 6243940 We might end up in handle_wrong_method if
686 // the callee is deoptimized as we race thru here. If that
687 // happens we don't want to take a safepoint because the
688 // caller frame will look interpreted and arguments are now
689 // "compiled" so it is much better to make this transition
690 // invisible to the stack walking code. Unfortunately if
691 // we try and find the callee by normal means a safepoint
692 // is possible. So we stash the desired callee in the thread
693 // and the vm will find there should this case occur.
694
695 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
696
697 __ br(rscratch1);
698 }
699
700 // ---------------------------------------------------------------
701 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
702 int total_args_passed,
703 int comp_args_on_stack,
704 const BasicType *sig_bt,
705 const VMRegPair *regs,
706 AdapterFingerPrint* fingerprint) {
707 address i2c_entry = __ pc();
708
709 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
710
711 address c2i_unverified_entry = __ pc();
712 Label skip_fixup;
713
714 Label ok;
715
716 Register holder = rscratch2;
717 Register receiver = j_rarg0;
718 Register tmp = r10; // A call-clobbered register not used for arg passing
719
720 // -------------------------------------------------------------------------
721 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
722 // to the interpreter. The args start out packed in the compiled layout. They
723 // need to be unpacked into the interpreter layout. This will almost always
724 // require some stack space. We grow the current (compiled) stack, then repack
725 // the args. We finally end in a jump to the generic interpreter entry point.
726 // On exit from the interpreter, the interpreter will restore our SP (lest the
727 // compiled code, which relys solely on SP and not FP, get sick).
728
729 {
730 __ block_comment("c2i_unverified_entry {");
731 __ load_klass(rscratch1, receiver);
732 __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
733 __ cmp(rscratch1, tmp);
734 __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
735 __ br(Assembler::EQ, ok);
736 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
737
738 __ bind(ok);
739 // Method might have been compiled since the call site was patched to
740 // interpreted; if that is the case treat it as a miss so we can get
741 // the call site corrected.
742 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
743 __ cbz(rscratch1, skip_fixup);
744 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
745 __ block_comment("} c2i_unverified_entry");
746 }
747
748 address c2i_entry = __ pc();
749
750 // Class initialization barrier for static methods
751 address c2i_no_clinit_check_entry = NULL;
752 if (VM_Version::supports_fast_class_init_checks()) {
753 Label L_skip_barrier;
754
755 { // Bypass the barrier for non-static methods
756 __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
757 __ andsw(zr, rscratch1, JVM_ACC_STATIC);
758 __ br(Assembler::EQ, L_skip_barrier); // non-static
759 }
760
761 __ load_method_holder(rscratch2, rmethod);
762 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
763 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
764
765 __ bind(L_skip_barrier);
766 c2i_no_clinit_check_entry = __ pc();
767 }
768
769 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
770 bs->c2i_entry_barrier(masm);
771
772 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
773
774 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
775 }
776
777 static int c_calling_convention_priv(const BasicType *sig_bt,
778 VMRegPair *regs,
779 VMRegPair *regs2,
780 int total_args_passed) {
781 assert(regs2 == NULL, "not needed on AArch64");
782
783 // We return the amount of VMRegImpl stack slots we need to reserve for all
784 // the arguments NOT counting out_preserve_stack_slots.
785
786 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
787 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
788 };
789 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
790 c_farg0, c_farg1, c_farg2, c_farg3,
791 c_farg4, c_farg5, c_farg6, c_farg7
792 };
793
794 uint int_args = 0;
795 uint fp_args = 0;
796 uint stk_args = 0; // inc by 2 each time
797
798 for (int i = 0; i < total_args_passed; i++) {
799 switch (sig_bt[i]) {
800 case T_BOOLEAN:
801 case T_CHAR:
802 case T_BYTE:
803 case T_SHORT:
804 case T_INT:
805 if (int_args < Argument::n_int_register_parameters_c) {
806 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
807 } else {
808 #ifdef __APPLE__
809 // Less-than word types are stored one after another.
810 // The code is unable to handle this so bailout.
811 return -1;
812 #endif
813 regs[i].set1(VMRegImpl::stack2reg(stk_args));
814 stk_args += 2;
815 }
816 break;
817 case T_LONG:
818 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
819 // fall through
820 case T_OBJECT:
821 case T_ARRAY:
822 case T_ADDRESS:
823 case T_METADATA:
824 if (int_args < Argument::n_int_register_parameters_c) {
825 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
826 } else {
827 regs[i].set2(VMRegImpl::stack2reg(stk_args));
828 stk_args += 2;
829 }
830 break;
831 case T_FLOAT:
832 if (fp_args < Argument::n_float_register_parameters_c) {
833 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
834 } else {
835 #ifdef __APPLE__
836 // Less-than word types are stored one after another.
837 // The code is unable to handle this so bailout.
838 return -1;
839 #endif
840 regs[i].set1(VMRegImpl::stack2reg(stk_args));
841 stk_args += 2;
842 }
843 break;
844 case T_DOUBLE:
845 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
846 if (fp_args < Argument::n_float_register_parameters_c) {
847 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
848 } else {
849 regs[i].set2(VMRegImpl::stack2reg(stk_args));
850 stk_args += 2;
851 }
852 break;
853 case T_VOID: // Halves of longs and doubles
854 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
855 regs[i].set_bad();
856 break;
857 default:
858 ShouldNotReachHere();
859 break;
860 }
861 }
862
863 return stk_args;
864 }
865
866 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
867 uint num_bits,
868 uint total_args_passed) {
869 Unimplemented();
870 return 0;
871 }
872
873 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
874 VMRegPair *regs,
875 VMRegPair *regs2,
876 int total_args_passed)
877 {
878 int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
879 guarantee(result >= 0, "Unsupported arguments configuration");
880 return result;
881 }
882
883 // On 64 bit we will store integer like items to the stack as
884 // 64 bits items (Aarch64 abi) even though java would only store
885 // 32bits for a parameter. On 32bit it will simply be 32 bits
886 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
887 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
888 if (src.first()->is_stack()) {
889 if (dst.first()->is_stack()) {
890 // stack to stack
891 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
892 __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
893 } else {
894 // stack to reg
895 __ ldrsw(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first())));
896 }
897 } else if (dst.first()->is_stack()) {
898 // reg to stack
899 // Do we really have to sign extend???
900 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
901 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first())));
902 } else {
903 if (dst.first() != src.first()) {
904 __ sxtw(dst.first()->as_Register(), src.first()->as_Register());
905 }
906 }
907 }
908
909 // An oop arg. Must pass a handle not the oop itself
910 static void object_move(MacroAssembler* masm,
911 OopMap* map,
912 int oop_handle_offset,
913 int framesize_in_slots,
914 VMRegPair src,
915 VMRegPair dst,
916 bool is_receiver,
917 int* receiver_offset) {
918
919 // must pass a handle. First figure out the location we use as a handle
920
921 Register rHandle = dst.first()->is_stack() ? rscratch2 : dst.first()->as_Register();
922
923 // See if oop is NULL if it is we need no handle
924
925 if (src.first()->is_stack()) {
926
927 // Oop is already on the stack as an argument
928 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
929 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
930 if (is_receiver) {
931 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
932 }
933
934 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
935 __ lea(rHandle, Address(rfp, reg2offset_in(src.first())));
936 // conditionally move a NULL
937 __ cmp(rscratch1, zr);
938 __ csel(rHandle, zr, rHandle, Assembler::EQ);
939 } else {
940
941 // Oop is in an a register we must store it to the space we reserve
942 // on the stack for oop_handles and pass a handle if oop is non-NULL
943
944 const Register rOop = src.first()->as_Register();
945 int oop_slot;
946 if (rOop == j_rarg0)
947 oop_slot = 0;
948 else if (rOop == j_rarg1)
949 oop_slot = 1;
950 else if (rOop == j_rarg2)
951 oop_slot = 2;
952 else if (rOop == j_rarg3)
953 oop_slot = 3;
954 else if (rOop == j_rarg4)
955 oop_slot = 4;
956 else if (rOop == j_rarg5)
957 oop_slot = 5;
958 else if (rOop == j_rarg6)
959 oop_slot = 6;
960 else {
961 assert(rOop == j_rarg7, "wrong register");
962 oop_slot = 7;
963 }
964
965 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
966 int offset = oop_slot*VMRegImpl::stack_slot_size;
967
968 map->set_oop(VMRegImpl::stack2reg(oop_slot));
969 // Store oop in handle area, may be NULL
970 __ str(rOop, Address(sp, offset));
971 if (is_receiver) {
972 *receiver_offset = offset;
973 }
974
975 __ cmp(rOop, zr);
976 __ lea(rHandle, Address(sp, offset));
977 // conditionally move a NULL
978 __ csel(rHandle, zr, rHandle, Assembler::EQ);
979 }
980
981 // If arg is on the stack then place it otherwise it is already in correct reg.
982 if (dst.first()->is_stack()) {
983 __ str(rHandle, Address(sp, reg2offset_out(dst.first())));
984 }
985 }
986
987 // A float arg may have to do float reg int reg conversion
988 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
989 assert(src.first()->is_stack() && dst.first()->is_stack() ||
990 src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error");
991 if (src.first()->is_stack()) {
992 if (dst.first()->is_stack()) {
993 __ ldrw(rscratch1, Address(rfp, reg2offset_in(src.first())));
994 __ strw(rscratch1, Address(sp, reg2offset_out(dst.first())));
995 } else {
996 ShouldNotReachHere();
997 }
998 } else if (src.first() != dst.first()) {
999 if (src.is_single_phys_reg() && dst.is_single_phys_reg())
1000 __ fmovs(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1001 else
1002 ShouldNotReachHere();
1003 }
1004 }
1005
1006 // A long move
1007 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1008 if (src.first()->is_stack()) {
1009 if (dst.first()->is_stack()) {
1010 // stack to stack
1011 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
1012 __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
1013 } else {
1014 // stack to reg
1015 __ ldr(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first())));
1016 }
1017 } else if (dst.first()->is_stack()) {
1018 // reg to stack
1019 // Do we really have to sign extend???
1020 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1021 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first())));
1022 } else {
1023 if (dst.first() != src.first()) {
1024 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1025 }
1026 }
1027 }
1028
1029
1030 // A double move
1031 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1032 assert(src.first()->is_stack() && dst.first()->is_stack() ||
1033 src.first()->is_reg() && dst.first()->is_reg(), "Unexpected error");
1034 if (src.first()->is_stack()) {
1035 if (dst.first()->is_stack()) {
1036 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first())));
1037 __ str(rscratch1, Address(sp, reg2offset_out(dst.first())));
1038 } else {
1039 ShouldNotReachHere();
1040 }
1041 } else if (src.first() != dst.first()) {
1042 if (src.is_single_phys_reg() && dst.is_single_phys_reg())
1043 __ fmovd(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1044 else
1045 ShouldNotReachHere();
1046 }
1047 }
1048
1049
1050 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1051 // We always ignore the frame_slots arg and just use the space just below frame pointer
1052 // which by this time is free to use
1053 switch (ret_type) {
1054 case T_FLOAT:
1055 __ strs(v0, Address(rfp, -wordSize));
1056 break;
1057 case T_DOUBLE:
1058 __ strd(v0, Address(rfp, -wordSize));
1059 break;
1060 case T_VOID: break;
1061 default: {
1062 __ str(r0, Address(rfp, -wordSize));
1063 }
1064 }
1065 }
1066
1067 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1068 // We always ignore the frame_slots arg and just use the space just below frame pointer
1069 // which by this time is free to use
1070 switch (ret_type) {
1071 case T_FLOAT:
1072 __ ldrs(v0, Address(rfp, -wordSize));
1073 break;
1074 case T_DOUBLE:
1075 __ ldrd(v0, Address(rfp, -wordSize));
1076 break;
1077 case T_VOID: break;
1078 default: {
1079 __ ldr(r0, Address(rfp, -wordSize));
1080 }
1081 }
1082 }
1083 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1084 RegSet x;
1085 for ( int i = first_arg ; i < arg_count ; i++ ) {
1086 if (args[i].first()->is_Register()) {
1087 x = x + args[i].first()->as_Register();
1088 } else if (args[i].first()->is_FloatRegister()) {
1089 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
1090 }
1091 }
1092 __ push(x, sp);
1093 }
1094
1095 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1096 RegSet x;
1097 for ( int i = first_arg ; i < arg_count ; i++ ) {
1098 if (args[i].first()->is_Register()) {
1099 x = x + args[i].first()->as_Register();
1100 } else {
1101 ;
1102 }
1103 }
1104 __ pop(x, sp);
1105 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1106 if (args[i].first()->is_Register()) {
1107 ;
1108 } else if (args[i].first()->is_FloatRegister()) {
1109 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
1110 }
1111 }
1112 }
1113
1114 // Unpack an array argument into a pointer to the body and the length
1115 // if the array is non-null, otherwise pass 0 for both.
1116 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { Unimplemented(); }
1117
1118
1119 class ComputeMoveOrder: public StackObj {
1120 class MoveOperation: public ResourceObj {
1121 friend class ComputeMoveOrder;
1122 private:
1123 VMRegPair _src;
1124 VMRegPair _dst;
1125 int _src_index;
1126 int _dst_index;
1127 bool _processed;
1128 MoveOperation* _next;
1129 MoveOperation* _prev;
1130
1131 static int get_id(VMRegPair r) { Unimplemented(); return 0; }
1132
1133 public:
1134 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1135 _src(src)
1136 , _dst(dst)
1137 , _src_index(src_index)
1138 , _dst_index(dst_index)
1139 , _processed(false)
1140 , _next(NULL)
1141 , _prev(NULL) { Unimplemented(); }
1142
1143 VMRegPair src() const { Unimplemented(); return _src; }
1144 int src_id() const { Unimplemented(); return 0; }
1145 int src_index() const { Unimplemented(); return 0; }
1146 VMRegPair dst() const { Unimplemented(); return _src; }
1147 void set_dst(int i, VMRegPair dst) { Unimplemented(); }
1148 int dst_index() const { Unimplemented(); return 0; }
1149 int dst_id() const { Unimplemented(); return 0; }
1150 MoveOperation* next() const { Unimplemented(); return 0; }
1151 MoveOperation* prev() const { Unimplemented(); return 0; }
1152 void set_processed() { Unimplemented(); }
1153 bool is_processed() const { Unimplemented(); return 0; }
1154
1155 // insert
1156 void break_cycle(VMRegPair temp_register) { Unimplemented(); }
1157
1158 void link(GrowableArray<MoveOperation*>& killer) { Unimplemented(); }
1159 };
1160
1161 private:
1162 GrowableArray<MoveOperation*> edges;
1163
1164 public:
1165 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1166 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { Unimplemented(); }
1167
1168 // Collected all the move operations
1169 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { Unimplemented(); }
1170
1171 // Walk the edges breaking cycles between moves. The result list
1172 // can be walked in order to produce the proper set of loads
1173 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { Unimplemented(); return 0; }
1174 };
1175
1176
1177 static void rt_call(MacroAssembler* masm, address dest) {
1178 CodeBlob *cb = CodeCache::find_blob(dest);
1179 if (cb) {
1180 __ far_call(RuntimeAddress(dest));
1181 } else {
1182 __ lea(rscratch1, RuntimeAddress(dest));
1183 __ blr(rscratch1);
1184 }
1185 }
1186
1187 static void verify_oop_args(MacroAssembler* masm,
1188 const methodHandle& method,
1189 const BasicType* sig_bt,
1190 const VMRegPair* regs) {
1191 Register temp_reg = r19; // not part of any compiled calling seq
1192 if (VerifyOops) {
1193 for (int i = 0; i < method->size_of_parameters(); i++) {
1194 if (sig_bt[i] == T_OBJECT ||
1195 sig_bt[i] == T_ARRAY) {
1196 VMReg r = regs[i].first();
1197 assert(r->is_valid(), "bad oop arg");
1198 if (r->is_stack()) {
1199 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1200 __ verify_oop(temp_reg);
1201 } else {
1202 __ verify_oop(r->as_Register());
1203 }
1204 }
1205 }
1206 }
1207 }
1208
1209 static void gen_special_dispatch(MacroAssembler* masm,
1210 const methodHandle& method,
1211 const BasicType* sig_bt,
1212 const VMRegPair* regs) {
1213 verify_oop_args(masm, method, sig_bt, regs);
1214 vmIntrinsics::ID iid = method->intrinsic_id();
1215
1216 // Now write the args into the outgoing interpreter space
1217 bool has_receiver = false;
1218 Register receiver_reg = noreg;
1219 int member_arg_pos = -1;
1220 Register member_reg = noreg;
1221 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1222 if (ref_kind != 0) {
1223 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1224 member_reg = r19; // known to be free at this point
1225 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1226 } else if (iid == vmIntrinsics::_invokeBasic || iid == vmIntrinsics::_linkToNative) {
1227 has_receiver = true;
1228 } else {
1229 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1230 }
1231
1232 if (member_reg != noreg) {
1233 // Load the member_arg into register, if necessary.
1234 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1235 VMReg r = regs[member_arg_pos].first();
1236 if (r->is_stack()) {
1237 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1238 } else {
1239 // no data motion is needed
1240 member_reg = r->as_Register();
1241 }
1242 }
1243
1244 if (has_receiver) {
1245 // Make sure the receiver is loaded into a register.
1246 assert(method->size_of_parameters() > 0, "oob");
1247 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1248 VMReg r = regs[0].first();
1249 assert(r->is_valid(), "bad receiver arg");
1250 if (r->is_stack()) {
1251 // Porting note: This assumes that compiled calling conventions always
1252 // pass the receiver oop in a register. If this is not true on some
1253 // platform, pick a temp and load the receiver from stack.
1254 fatal("receiver always in a register");
1255 receiver_reg = r2; // known to be free at this point
1256 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1257 } else {
1258 // no data motion is needed
1259 receiver_reg = r->as_Register();
1260 }
1261 }
1262
1263 // Figure out which address we are really jumping to:
1264 MethodHandles::generate_method_handle_dispatch(masm, iid,
1265 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1266 }
1267
1268 // ---------------------------------------------------------------------------
1269 // Generate a native wrapper for a given method. The method takes arguments
1270 // in the Java compiled code convention, marshals them to the native
1271 // convention (handlizes oops, etc), transitions to native, makes the call,
1272 // returns to java state (possibly blocking), unhandlizes any result and
1273 // returns.
1274 //
1275 // Critical native functions are a shorthand for the use of
1276 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1277 // functions. The wrapper is expected to unpack the arguments before
1278 // passing them to the callee. Critical native functions leave the state _in_Java,
1279 // since they block out GC.
1280 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1281 // block and the check for pending exceptions it's impossible for them
1282 // to be thrown.
1283 //
1284 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1285 const methodHandle& method,
1286 int compile_id,
1287 BasicType* in_sig_bt,
1288 VMRegPair* in_regs,
1289 BasicType ret_type,
1290 address critical_entry) {
1291 if (method->is_method_handle_intrinsic()) {
1292 vmIntrinsics::ID iid = method->intrinsic_id();
1293 intptr_t start = (intptr_t)__ pc();
1294 int vep_offset = ((intptr_t)__ pc()) - start;
1295
1296 // First instruction must be a nop as it may need to be patched on deoptimisation
1297 __ nop();
1298 gen_special_dispatch(masm,
1299 method,
1300 in_sig_bt,
1301 in_regs);
1302 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1303 __ flush();
1304 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1305 return nmethod::new_native_nmethod(method,
1306 compile_id,
1307 masm->code(),
1308 vep_offset,
1309 frame_complete,
1310 stack_slots / VMRegImpl::slots_per_word,
1311 in_ByteSize(-1),
1312 in_ByteSize(-1),
1313 (OopMapSet*)NULL);
1314 }
1315 bool is_critical_native = true;
1316 address native_func = critical_entry;
1317 if (native_func == NULL) {
1318 native_func = method->native_function();
1319 is_critical_native = false;
1320 }
1321 assert(native_func != NULL, "must have function");
1322
1323 // An OopMap for lock (and class if static)
1324 OopMapSet *oop_maps = new OopMapSet();
1325 intptr_t start = (intptr_t)__ pc();
1326
1327 // We have received a description of where all the java arg are located
1328 // on entry to the wrapper. We need to convert these args to where
1329 // the jni function will expect them. To figure out where they go
1330 // we convert the java signature to a C signature by inserting
1331 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1332
1333 const int total_in_args = method->size_of_parameters();
1334 int total_c_args = total_in_args;
1335 if (!is_critical_native) {
1336 total_c_args += 1;
1337 if (method->is_static()) {
1338 total_c_args++;
1339 }
1340 } else {
1341 for (int i = 0; i < total_in_args; i++) {
1342 if (in_sig_bt[i] == T_ARRAY) {
1343 total_c_args++;
1344 }
1345 }
1346 }
1347
1348 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1349 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1350 BasicType* in_elem_bt = NULL;
1351
1352 int argc = 0;
1353 if (!is_critical_native) {
1354 out_sig_bt[argc++] = T_ADDRESS;
1355 if (method->is_static()) {
1356 out_sig_bt[argc++] = T_OBJECT;
1357 }
1358
1359 for (int i = 0; i < total_in_args ; i++ ) {
1360 out_sig_bt[argc++] = in_sig_bt[i];
1361 }
1362 } else {
1363 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1364 SignatureStream ss(method->signature());
1365 for (int i = 0; i < total_in_args ; i++ ) {
1366 if (in_sig_bt[i] == T_ARRAY) {
1367 // Arrays are passed as int, elem* pair
1368 out_sig_bt[argc++] = T_INT;
1369 out_sig_bt[argc++] = T_ADDRESS;
1370 ss.skip_array_prefix(1); // skip one '['
1371 assert(ss.is_primitive(), "primitive type expected");
1372 in_elem_bt[i] = ss.type();
1373 } else {
1374 out_sig_bt[argc++] = in_sig_bt[i];
1375 in_elem_bt[i] = T_VOID;
1376 }
1377 if (in_sig_bt[i] != T_VOID) {
1378 assert(in_sig_bt[i] == ss.type() ||
1379 in_sig_bt[i] == T_ARRAY, "must match");
1380 ss.next();
1381 }
1382 }
1383 }
1384
1385 // Now figure out where the args must be stored and how much stack space
1386 // they require.
1387 int out_arg_slots;
1388 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, NULL, total_c_args);
1389
1390 if (out_arg_slots < 0) {
1391 return NULL;
1392 }
1393
1394 // Compute framesize for the wrapper. We need to handlize all oops in
1395 // incoming registers
1396
1397 // Calculate the total number of stack slots we will need.
1398
1399 // First count the abi requirement plus all of the outgoing args
1400 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1401
1402 // Now the space for the inbound oop handle area
1403 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1404 if (is_critical_native) {
1405 // Critical natives may have to call out so they need a save area
1406 // for register arguments.
1407 int double_slots = 0;
1408 int single_slots = 0;
1409 for ( int i = 0; i < total_in_args; i++) {
1410 if (in_regs[i].first()->is_Register()) {
1411 const Register reg = in_regs[i].first()->as_Register();
1412 switch (in_sig_bt[i]) {
1413 case T_BOOLEAN:
1414 case T_BYTE:
1415 case T_SHORT:
1416 case T_CHAR:
1417 case T_INT: single_slots++; break;
1418 case T_ARRAY: // specific to LP64 (7145024)
1419 case T_LONG: double_slots++; break;
1420 default: ShouldNotReachHere();
1421 }
1422 } else if (in_regs[i].first()->is_FloatRegister()) {
1423 ShouldNotReachHere();
1424 }
1425 }
1426 total_save_slots = double_slots * 2 + single_slots;
1427 // align the save area
1428 if (double_slots != 0) {
1429 stack_slots = align_up(stack_slots, 2);
1430 }
1431 }
1432
1433 int oop_handle_offset = stack_slots;
1434 stack_slots += total_save_slots;
1435
1436 // Now any space we need for handlizing a klass if static method
1437
1438 int klass_slot_offset = 0;
1439 int klass_offset = -1;
1440 int lock_slot_offset = 0;
1441 bool is_static = false;
1442
1443 if (method->is_static()) {
1444 klass_slot_offset = stack_slots;
1445 stack_slots += VMRegImpl::slots_per_word;
1446 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1447 is_static = true;
1448 }
1449
1450 // Plus a lock if needed
1451
1452 if (method->is_synchronized()) {
1453 lock_slot_offset = stack_slots;
1454 stack_slots += VMRegImpl::slots_per_word;
1455 }
1456
1457 // Now a place (+2) to save return values or temp during shuffling
1458 // + 4 for return address (which we own) and saved rfp
1459 stack_slots += 6;
1460
1461 // Ok The space we have allocated will look like:
1462 //
1463 //
1464 // FP-> | |
1465 // |---------------------|
1466 // | 2 slots for moves |
1467 // |---------------------|
1468 // | lock box (if sync) |
1469 // |---------------------| <- lock_slot_offset
1470 // | klass (if static) |
1471 // |---------------------| <- klass_slot_offset
1472 // | oopHandle area |
1473 // |---------------------| <- oop_handle_offset (8 java arg registers)
1474 // | outbound memory |
1475 // | based arguments |
1476 // | |
1477 // |---------------------|
1478 // | |
1479 // SP-> | out_preserved_slots |
1480 //
1481 //
1482
1483
1484 // Now compute actual number of stack words we need rounding to make
1485 // stack properly aligned.
1486 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1487
1488 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1489
1490 // First thing make an ic check to see if we should even be here
1491
1492 // We are free to use all registers as temps without saving them and
1493 // restoring them except rfp. rfp is the only callee save register
1494 // as far as the interpreter and the compiler(s) are concerned.
1495
1496
1497 const Register ic_reg = rscratch2;
1498 const Register receiver = j_rarg0;
1499
1500 Label hit;
1501 Label exception_pending;
1502
1503 assert_different_registers(ic_reg, receiver, rscratch1);
1504 __ verify_oop(receiver);
1505 __ cmp_klass(receiver, ic_reg, rscratch1);
1506 __ br(Assembler::EQ, hit);
1507
1508 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1509
1510 // Verified entry point must be aligned
1511 __ align(8);
1512
1513 __ bind(hit);
1514
1515 int vep_offset = ((intptr_t)__ pc()) - start;
1516
1517 // If we have to make this method not-entrant we'll overwrite its
1518 // first instruction with a jump. For this action to be legal we
1519 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1520 // SVC, HVC, or SMC. Make it a NOP.
1521 __ nop();
1522
1523 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1524 Label L_skip_barrier;
1525 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1526 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1527 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1528
1529 __ bind(L_skip_barrier);
1530 }
1531
1532 // Generate stack overflow check
1533 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1534
1535 // Generate a new frame for the wrapper.
1536 __ enter();
1537 // -2 because return address is already present and so is saved rfp
1538 __ sub(sp, sp, stack_size - 2*wordSize);
1539
1540 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1541 bs->nmethod_entry_barrier(masm);
1542
1543 // Frame is now completed as far as size and linkage.
1544 int frame_complete = ((intptr_t)__ pc()) - start;
1545
1546 // We use r20 as the oop handle for the receiver/klass
1547 // It is callee save so it survives the call to native
1548
1549 const Register oop_handle_reg = r20;
1550
1551 //
1552 // We immediately shuffle the arguments so that any vm call we have to
1553 // make from here on out (sync slow path, jvmti, etc.) we will have
1554 // captured the oops from our caller and have a valid oopMap for
1555 // them.
1556
1557 // -----------------
1558 // The Grand Shuffle
1559
1560 // The Java calling convention is either equal (linux) or denser (win64) than the
1561 // c calling convention. However the because of the jni_env argument the c calling
1562 // convention always has at least one more (and two for static) arguments than Java.
1563 // Therefore if we move the args from java -> c backwards then we will never have
1564 // a register->register conflict and we don't have to build a dependency graph
1565 // and figure out how to break any cycles.
1566 //
1567
1568 // Record esp-based slot for receiver on stack for non-static methods
1569 int receiver_offset = -1;
1570
1571 // This is a trick. We double the stack slots so we can claim
1572 // the oops in the caller's frame. Since we are sure to have
1573 // more args than the caller doubling is enough to make
1574 // sure we can capture all the incoming oop args from the
1575 // caller.
1576 //
1577 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1578
1579 // Mark location of rfp (someday)
1580 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1581
1582
1583 int float_args = 0;
1584 int int_args = 0;
1585
1586 #ifdef ASSERT
1587 bool reg_destroyed[RegisterImpl::number_of_registers];
1588 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
1589 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
1590 reg_destroyed[r] = false;
1591 }
1592 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) {
1593 freg_destroyed[f] = false;
1594 }
1595
1596 #endif /* ASSERT */
1597
1598 // This may iterate in two different directions depending on the
1599 // kind of native it is. The reason is that for regular JNI natives
1600 // the incoming and outgoing registers are offset upwards and for
1601 // critical natives they are offset down.
1602 GrowableArray<int> arg_order(2 * total_in_args);
1603 VMRegPair tmp_vmreg;
1604 tmp_vmreg.set2(r19->as_VMReg());
1605
1606 if (!is_critical_native) {
1607 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1608 arg_order.push(i);
1609 arg_order.push(c_arg);
1610 }
1611 } else {
1612 // Compute a valid move order, using tmp_vmreg to break any cycles
1613 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
1614 }
1615
1616 int temploc = -1;
1617 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1618 int i = arg_order.at(ai);
1619 int c_arg = arg_order.at(ai + 1);
1620 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1621 if (c_arg == -1) {
1622 assert(is_critical_native, "should only be required for critical natives");
1623 // This arg needs to be moved to a temporary
1624 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
1625 in_regs[i] = tmp_vmreg;
1626 temploc = i;
1627 continue;
1628 } else if (i == -1) {
1629 assert(is_critical_native, "should only be required for critical natives");
1630 // Read from the temporary location
1631 assert(temploc != -1, "must be valid");
1632 i = temploc;
1633 temploc = -1;
1634 }
1635 #ifdef ASSERT
1636 if (in_regs[i].first()->is_Register()) {
1637 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1638 } else if (in_regs[i].first()->is_FloatRegister()) {
1639 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1640 }
1641 if (out_regs[c_arg].first()->is_Register()) {
1642 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1643 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1644 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1645 }
1646 #endif /* ASSERT */
1647 switch (in_sig_bt[i]) {
1648 case T_ARRAY:
1649 if (is_critical_native) {
1650 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1651 c_arg++;
1652 #ifdef ASSERT
1653 if (out_regs[c_arg].first()->is_Register()) {
1654 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1655 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1656 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1657 }
1658 #endif
1659 int_args++;
1660 break;
1661 }
1662 case T_OBJECT:
1663 assert(!is_critical_native, "no oop arguments");
1664 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1665 ((i == 0) && (!is_static)),
1666 &receiver_offset);
1667 int_args++;
1668 break;
1669 case T_VOID:
1670 break;
1671
1672 case T_FLOAT:
1673 float_move(masm, in_regs[i], out_regs[c_arg]);
1674 float_args++;
1675 break;
1676
1677 case T_DOUBLE:
1678 assert( i + 1 < total_in_args &&
1679 in_sig_bt[i + 1] == T_VOID &&
1680 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1681 double_move(masm, in_regs[i], out_regs[c_arg]);
1682 float_args++;
1683 break;
1684
1685 case T_LONG :
1686 long_move(masm, in_regs[i], out_regs[c_arg]);
1687 int_args++;
1688 break;
1689
1690 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1691
1692 default:
1693 move32_64(masm, in_regs[i], out_regs[c_arg]);
1694 int_args++;
1695 }
1696 }
1697
1698 // point c_arg at the first arg that is already loaded in case we
1699 // need to spill before we call out
1700 int c_arg = total_c_args - total_in_args;
1701
1702 // Pre-load a static method's oop into c_rarg1.
1703 if (method->is_static() && !is_critical_native) {
1704
1705 // load oop into a register
1706 __ movoop(c_rarg1,
1707 JNIHandles::make_local(method->method_holder()->java_mirror()),
1708 /*immediate*/true);
1709
1710 // Now handlize the static class mirror it's known not-null.
1711 __ str(c_rarg1, Address(sp, klass_offset));
1712 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1713
1714 // Now get the handle
1715 __ lea(c_rarg1, Address(sp, klass_offset));
1716 // and protect the arg if we must spill
1717 c_arg--;
1718 }
1719
1720 // Change state to native (we save the return address in the thread, since it might not
1721 // be pushed on the stack when we do a stack traversal).
1722 // We use the same pc/oopMap repeatedly when we call out
1723
1724 Label native_return;
1725 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1726
1727 Label dtrace_method_entry, dtrace_method_entry_done;
1728 {
1729 uint64_t offset;
1730 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1731 __ ldrb(rscratch1, Address(rscratch1, offset));
1732 __ cbnzw(rscratch1, dtrace_method_entry);
1733 __ bind(dtrace_method_entry_done);
1734 }
1735
1736 // RedefineClasses() tracing support for obsolete method entry
1737 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1738 // protect the args we've loaded
1739 save_args(masm, total_c_args, c_arg, out_regs);
1740 __ mov_metadata(c_rarg1, method());
1741 __ call_VM_leaf(
1742 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1743 rthread, c_rarg1);
1744 restore_args(masm, total_c_args, c_arg, out_regs);
1745 }
1746
1747 // Lock a synchronized method
1748
1749 // Register definitions used by locking and unlocking
1750
1751 const Register swap_reg = r0;
1752 const Register obj_reg = r19; // Will contain the oop
1753 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1754 const Register old_hdr = r13; // value of old header at unlock time
1755 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock
1756 const Register tmp = lr;
1757
1758 Label slow_path_lock;
1759 Label lock_done;
1760
1761 if (method->is_synchronized()) {
1762 assert(!is_critical_native, "unhandled");
1763
1764 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1765
1766 // Get the handle (the 2nd argument)
1767 __ mov(oop_handle_reg, c_rarg1);
1768
1769 // Get address of the box
1770
1771 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1772
1773 // Load the oop from the handle
1774 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1775
1776 if (LockingMode == LM_MONITOR) {
1777 __ b(slow_path_lock);
1778 } else if (LockingMode == LM_LEGACY) {
1779 if (UseBiasedLocking) {
1780 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, tmp, false, lock_done, &slow_path_lock);
1781 }
1782
1783 // Load (object->mark() | 1) into swap_reg %r0
1784 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1785 __ orr(swap_reg, rscratch1, 1);
1786
1787 // Save (object->mark() | 1) into BasicLock's displaced header
1788 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1789
1790 // src -> dest iff dest == r0 else r0 <- dest
1791 { Label here;
1792 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL);
1793 }
1794
1795 // Hmm should this move to the slow path code area???
1796
1797 // Test if the oopMark is an obvious stack pointer, i.e.,
1798 // 1) (mark & 3) == 0, and
1799 // 2) sp <= mark < mark + os::pagesize()
1800 // These 3 tests can be done by evaluating the following
1801 // expression: ((mark - sp) & (3 - os::vm_page_size())),
1802 // assuming both stack pointer and pagesize have their
1803 // least significant 2 bits clear.
1804 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
1805
1806 __ sub(swap_reg, sp, swap_reg);
1807 __ neg(swap_reg, swap_reg);
1808 __ ands(swap_reg, swap_reg, 3 - os::vm_page_size());
1809
1810 // Save the test result, for recursive case, the result is zero
1811 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1812 __ br(Assembler::NE, slow_path_lock);
1813 } else {
1814 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1815 __ lightweight_lock(obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1816 }
1817 // Slow path will re-enter here
1818
1819 __ bind(lock_done);
1820 }
1821
1822
1823 // Finally just about ready to make the JNI call
1824
1825 // get JNIEnv* which is first argument to native
1826 if (!is_critical_native) {
1827 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1828
1829 // Now set thread in native
1830 __ mov(rscratch1, _thread_in_native);
1831 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1832 __ stlrw(rscratch1, rscratch2);
1833 }
1834
1835 rt_call(masm, native_func);
1836
1837 __ bind(native_return);
1838
1839 intptr_t return_pc = (intptr_t) __ pc();
1840 oop_maps->add_gc_map(return_pc - start, map);
1841
1842 // Unpack native results.
1843 switch (ret_type) {
1844 case T_BOOLEAN: __ c2bool(r0); break;
1845 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
1846 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
1847 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
1848 case T_INT : __ sbfx(r0, r0, 0, 32); break;
1849 case T_DOUBLE :
1850 case T_FLOAT :
1851 // Result is in v0 we'll save as needed
1852 break;
1853 case T_ARRAY: // Really a handle
1854 case T_OBJECT: // Really a handle
1855 break; // can't de-handlize until after safepoint check
1856 case T_VOID: break;
1857 case T_LONG: break;
1858 default : ShouldNotReachHere();
1859 }
1860
1861 Label safepoint_in_progress, safepoint_in_progress_done;
1862 Label after_transition;
1863
1864 // If this is a critical native, check for a safepoint or suspend request after the call.
1865 // If a safepoint is needed, transition to native, then to native_trans to handle
1866 // safepoints like the native methods that are not critical natives.
1867 if (is_critical_native) {
1868 Label needs_safepoint;
1869 __ safepoint_poll(needs_safepoint, false /* at_return */, true /* acquire */, false /* in_nmethod */);
1870 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1871 __ cbnzw(rscratch1, needs_safepoint);
1872 __ b(after_transition);
1873 __ bind(needs_safepoint);
1874 }
1875
1876 // Switch thread to "native transition" state before reading the synchronization state.
1877 // This additional state is necessary because reading and testing the synchronization
1878 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1879 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1880 // VM thread changes sync state to synchronizing and suspends threads for GC.
1881 // Thread A is resumed to finish this native method, but doesn't block here since it
1882 // didn't see any synchronization is progress, and escapes.
1883 __ mov(rscratch1, _thread_in_native_trans);
1884
1885 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
1886
1887 // Force this write out before the read below
1888 __ dmb(Assembler::ISH);
1889
1890 __ verify_sve_vector_length();
1891
1892 // Check for safepoint operation in progress and/or pending suspend requests.
1893 {
1894 // We need an acquire here to ensure that any subsequent load of the
1895 // global SafepointSynchronize::_state flag is ordered after this load
1896 // of the thread-local polling word. We don't want this poll to
1897 // return false (i.e. not safepointing) and a later poll of the global
1898 // SafepointSynchronize::_state spuriously to return true.
1899 //
1900 // This is to avoid a race when we're in a native->Java transition
1901 // racing the code which wakes up from a safepoint.
1902
1903 __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
1904 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1905 __ cbnzw(rscratch1, safepoint_in_progress);
1906 __ bind(safepoint_in_progress_done);
1907 }
1908
1909 // change thread state
1910 __ mov(rscratch1, _thread_in_Java);
1911 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1912 __ stlrw(rscratch1, rscratch2);
1913 __ bind(after_transition);
1914
1915 Label reguard;
1916 Label reguard_done;
1917 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
1918 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
1919 __ br(Assembler::EQ, reguard);
1920 __ bind(reguard_done);
1921
1922 // native result if any is live
1923
1924 // Unlock
1925 Label unlock_done;
1926 Label slow_path_unlock;
1927 if (method->is_synchronized()) {
1928
1929 // Get locked oop from the handle we passed to jni
1930 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1931
1932 Label done;
1933
1934 if (UseBiasedLocking) {
1935 __ biased_locking_exit(obj_reg, old_hdr, done);
1936 }
1937
1938 if (LockingMode == LM_LEGACY) {
1939 // Simple recursive lock?
1940 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1941 __ cbz(rscratch1, done);
1942 }
1943
1944 // Must save r0 if if it is live now because cmpxchg must use it
1945 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1946 save_native_result(masm, ret_type, stack_slots);
1947 }
1948
1949
1950 if (LockingMode == LM_MONITOR) {
1951 __ b(slow_path_unlock);
1952 } else if (LockingMode == LM_LEGACY) {
1953 // get address of the stack lock
1954 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1955 // get old displaced header
1956 __ ldr(old_hdr, Address(r0, 0));
1957
1958 // Atomic swap old header if oop still contains the stack lock
1959 Label succeed;
1960 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock);
1961 __ bind(succeed);
1962 } else {
1963 assert(LockingMode == LM_LIGHTWEIGHT, "");
1964 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1965 }
1966
1967 // slow path re-enters here
1968 __ bind(unlock_done);
1969 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1970 restore_native_result(masm, ret_type, stack_slots);
1971 }
1972
1973 __ bind(done);
1974 }
1975
1976 Label dtrace_method_exit, dtrace_method_exit_done;
1977 {
1978 uint64_t offset;
1979 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1980 __ ldrb(rscratch1, Address(rscratch1, offset));
1981 __ cbnzw(rscratch1, dtrace_method_exit);
1982 __ bind(dtrace_method_exit_done);
1983 }
1984
1985 __ reset_last_Java_frame(false);
1986
1987 // Unbox oop result, e.g. JNIHandles::resolve result.
1988 if (is_reference_type(ret_type)) {
1989 __ resolve_jobject(r0, rthread, rscratch2);
1990 }
1991
1992 if (CheckJNICalls) {
1993 // clear_pending_jni_exception_check
1994 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
1995 }
1996
1997 if (!is_critical_native) {
1998 // reset handle block
1999 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
2000 __ str(zr, Address(r2, JNIHandleBlock::top_offset_in_bytes()));
2001 }
2002
2003 __ leave();
2004
2005 if (!is_critical_native) {
2006 // Any exception pending?
2007 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2008 __ cbnz(rscratch1, exception_pending);
2009 }
2010
2011 // We're done
2012 __ ret(lr);
2013
2014 // Unexpected paths are out of line and go here
2015
2016 if (!is_critical_native) {
2017 // forward the exception
2018 __ bind(exception_pending);
2019
2020 // and forward the exception
2021 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2022 }
2023
2024 // Slow path locking & unlocking
2025 if (method->is_synchronized()) {
2026
2027 __ block_comment("Slow path lock {");
2028 __ bind(slow_path_lock);
2029
2030 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2031 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2032
2033 // protect the args we've loaded
2034 save_args(masm, total_c_args, c_arg, out_regs);
2035
2036 __ mov(c_rarg0, obj_reg);
2037 __ mov(c_rarg1, lock_reg);
2038 __ mov(c_rarg2, rthread);
2039
2040 // Not a leaf but we have last_Java_frame setup as we want
2041 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2042 restore_args(masm, total_c_args, c_arg, out_regs);
2043
2044 #ifdef ASSERT
2045 { Label L;
2046 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2047 __ cbz(rscratch1, L);
2048 __ stop("no pending exception allowed on exit from monitorenter");
2049 __ bind(L);
2050 }
2051 #endif
2052 __ b(lock_done);
2053
2054 __ block_comment("} Slow path lock");
2055
2056 __ block_comment("Slow path unlock {");
2057 __ bind(slow_path_unlock);
2058
2059 // If we haven't already saved the native result we must save it now as xmm registers
2060 // are still exposed.
2061
2062 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2063 save_native_result(masm, ret_type, stack_slots);
2064 }
2065
2066 __ mov(c_rarg2, rthread);
2067 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2068 __ mov(c_rarg0, obj_reg);
2069
2070 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2071 // NOTE that obj_reg == r19 currently
2072 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2073 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2074
2075 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2076
2077 #ifdef ASSERT
2078 {
2079 Label L;
2080 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2081 __ cbz(rscratch1, L);
2082 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2083 __ bind(L);
2084 }
2085 #endif /* ASSERT */
2086
2087 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2088
2089 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2090 restore_native_result(masm, ret_type, stack_slots);
2091 }
2092 __ b(unlock_done);
2093
2094 __ block_comment("} Slow path unlock");
2095
2096 } // synchronized
2097
2098 // SLOW PATH Reguard the stack if needed
2099
2100 __ bind(reguard);
2101 save_native_result(masm, ret_type, stack_slots);
2102 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2103 restore_native_result(masm, ret_type, stack_slots);
2104 // and continue
2105 __ b(reguard_done);
2106
2107 // SLOW PATH safepoint
2108 {
2109 __ block_comment("safepoint {");
2110 __ bind(safepoint_in_progress);
2111
2112 // Don't use call_VM as it will see a possible pending exception and forward it
2113 // and never return here preventing us from clearing _last_native_pc down below.
2114 //
2115 save_native_result(masm, ret_type, stack_slots);
2116 __ mov(c_rarg0, rthread);
2117 #ifndef PRODUCT
2118 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2119 #endif
2120 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2121 __ blr(rscratch1);
2122
2123 // Restore any method result value
2124 restore_native_result(masm, ret_type, stack_slots);
2125
2126 __ b(safepoint_in_progress_done);
2127 __ block_comment("} safepoint");
2128 }
2129
2130 // SLOW PATH dtrace support
2131 {
2132 __ block_comment("dtrace entry {");
2133 __ bind(dtrace_method_entry);
2134
2135 // We have all of the arguments setup at this point. We must not touch any register
2136 // argument registers at this point (what if we save/restore them there are no oop?
2137
2138 save_args(masm, total_c_args, c_arg, out_regs);
2139 __ mov_metadata(c_rarg1, method());
2140 __ call_VM_leaf(
2141 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2142 rthread, c_rarg1);
2143 restore_args(masm, total_c_args, c_arg, out_regs);
2144 __ b(dtrace_method_entry_done);
2145 __ block_comment("} dtrace entry");
2146 }
2147
2148 {
2149 __ block_comment("dtrace exit {");
2150 __ bind(dtrace_method_exit);
2151 save_native_result(masm, ret_type, stack_slots);
2152 __ mov_metadata(c_rarg1, method());
2153 __ call_VM_leaf(
2154 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2155 rthread, c_rarg1);
2156 restore_native_result(masm, ret_type, stack_slots);
2157 __ b(dtrace_method_exit_done);
2158 __ block_comment("} dtrace exit");
2159 }
2160
2161
2162 __ flush();
2163
2164 nmethod *nm = nmethod::new_native_nmethod(method,
2165 compile_id,
2166 masm->code(),
2167 vep_offset,
2168 frame_complete,
2169 stack_slots / VMRegImpl::slots_per_word,
2170 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2171 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2172 oop_maps);
2173
2174 return nm;
2175 }
2176
2177 // this function returns the adjust size (in number of words) to a c2i adapter
2178 // activation for use during deoptimization
2179 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2180 assert(callee_locals >= callee_parameters,
2181 "test and remove; got more parms than locals");
2182 if (callee_locals < callee_parameters)
2183 return 0; // No adjustment for negative locals
2184 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2185 // diff is counted in stack words
2186 return align_up(diff, 2);
2187 }
2188
2189
2190 //------------------------------generate_deopt_blob----------------------------
2191 void SharedRuntime::generate_deopt_blob() {
2192 // Allocate space for the code
2193 ResourceMark rm;
2194 // Setup code generation tools
2195 int pad = 0;
2196 #if INCLUDE_JVMCI
2197 if (EnableJVMCI) {
2198 pad += 512; // Increase the buffer size when compiling for JVMCI
2199 }
2200 #endif
2201 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2202 MacroAssembler* masm = new MacroAssembler(&buffer);
2203 int frame_size_in_words;
2204 OopMap* map = NULL;
2205 OopMapSet *oop_maps = new OopMapSet();
2206 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2207
2208 // -------------
2209 // This code enters when returning to a de-optimized nmethod. A return
2210 // address has been pushed on the the stack, and return values are in
2211 // registers.
2212 // If we are doing a normal deopt then we were called from the patched
2213 // nmethod from the point we returned to the nmethod. So the return
2214 // address on the stack is wrong by NativeCall::instruction_size
2215 // We will adjust the value so it looks like we have the original return
2216 // address on the stack (like when we eagerly deoptimized).
2217 // In the case of an exception pending when deoptimizing, we enter
2218 // with a return address on the stack that points after the call we patched
2219 // into the exception handler. We have the following register state from,
2220 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2221 // r0: exception oop
2222 // r19: exception handler
2223 // r3: throwing pc
2224 // So in this case we simply jam r3 into the useless return address and
2225 // the stack looks just like we want.
2226 //
2227 // At this point we need to de-opt. We save the argument return
2228 // registers. We call the first C routine, fetch_unroll_info(). This
2229 // routine captures the return values and returns a structure which
2230 // describes the current frame size and the sizes of all replacement frames.
2231 // The current frame is compiled code and may contain many inlined
2232 // functions, each with their own JVM state. We pop the current frame, then
2233 // push all the new frames. Then we call the C routine unpack_frames() to
2234 // populate these frames. Finally unpack_frames() returns us the new target
2235 // address. Notice that callee-save registers are BLOWN here; they have
2236 // already been captured in the vframeArray at the time the return PC was
2237 // patched.
2238 address start = __ pc();
2239 Label cont;
2240
2241 // Prolog for non exception case!
2242
2243 // Save everything in sight.
2244 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2245
2246 // Normal deoptimization. Save exec mode for unpack_frames.
2247 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2248 __ b(cont);
2249
2250 int reexecute_offset = __ pc() - start;
2251 #if INCLUDE_JVMCI && !defined(COMPILER1)
2252 if (EnableJVMCI && UseJVMCICompiler) {
2253 // JVMCI does not use this kind of deoptimization
2254 __ should_not_reach_here();
2255 }
2256 #endif
2257
2258 // Reexecute case
2259 // return address is the pc describes what bci to do re-execute at
2260
2261 // No need to update map as each call to save_live_registers will produce identical oopmap
2262 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2263
2264 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2265 __ b(cont);
2266
2267 #if INCLUDE_JVMCI
2268 Label after_fetch_unroll_info_call;
2269 int implicit_exception_uncommon_trap_offset = 0;
2270 int uncommon_trap_offset = 0;
2271
2272 if (EnableJVMCI) {
2273 implicit_exception_uncommon_trap_offset = __ pc() - start;
2274
2275 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2276 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2277
2278 uncommon_trap_offset = __ pc() - start;
2279
2280 // Save everything in sight.
2281 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2282 // fetch_unroll_info needs to call last_java_frame()
2283 Label retaddr;
2284 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2285
2286 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2287 __ movw(rscratch1, -1);
2288 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2289
2290 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2291 __ mov(c_rarg0, rthread);
2292 __ movw(c_rarg2, rcpool); // exec mode
2293 __ lea(rscratch1,
2294 RuntimeAddress(CAST_FROM_FN_PTR(address,
2295 Deoptimization::uncommon_trap)));
2296 __ blr(rscratch1);
2297 __ bind(retaddr);
2298 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2299
2300 __ reset_last_Java_frame(false);
2301
2302 __ b(after_fetch_unroll_info_call);
2303 } // EnableJVMCI
2304 #endif // INCLUDE_JVMCI
2305
2306 int exception_offset = __ pc() - start;
2307
2308 // Prolog for exception case
2309
2310 // all registers are dead at this entry point, except for r0, and
2311 // r3 which contain the exception oop and exception pc
2312 // respectively. Set them in TLS and fall thru to the
2313 // unpack_with_exception_in_tls entry point.
2314
2315 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2316 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2317
2318 int exception_in_tls_offset = __ pc() - start;
2319
2320 // new implementation because exception oop is now passed in JavaThread
2321
2322 // Prolog for exception case
2323 // All registers must be preserved because they might be used by LinearScan
2324 // Exceptiop oop and throwing PC are passed in JavaThread
2325 // tos: stack at point of call to method that threw the exception (i.e. only
2326 // args are on the stack, no return address)
2327
2328 // The return address pushed by save_live_registers will be patched
2329 // later with the throwing pc. The correct value is not available
2330 // now because loading it from memory would destroy registers.
2331
2332 // NB: The SP at this point must be the SP of the method that is
2333 // being deoptimized. Deoptimization assumes that the frame created
2334 // here by save_live_registers is immediately below the method's SP.
2335 // This is a somewhat fragile mechanism.
2336
2337 // Save everything in sight.
2338 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2339
2340 // Now it is safe to overwrite any register
2341
2342 // Deopt during an exception. Save exec mode for unpack_frames.
2343 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2344
2345 // load throwing pc from JavaThread and patch it as the return address
2346 // of the current frame. Then clear the field in JavaThread
2347
2348 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2349 __ str(r3, Address(rfp, wordSize));
2350 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2351
2352 #ifdef ASSERT
2353 // verify that there is really an exception oop in JavaThread
2354 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2355 __ verify_oop(r0);
2356
2357 // verify that there is no pending exception
2358 Label no_pending_exception;
2359 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2360 __ cbz(rscratch1, no_pending_exception);
2361 __ stop("must not have pending exception here");
2362 __ bind(no_pending_exception);
2363 #endif
2364
2365 __ bind(cont);
2366
2367 // Call C code. Need thread and this frame, but NOT official VM entry
2368 // crud. We cannot block on this call, no GC can happen.
2369 //
2370 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2371
2372 // fetch_unroll_info needs to call last_java_frame().
2373
2374 Label retaddr;
2375 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2376 #ifdef ASSERT
2377 { Label L;
2378 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2379 __ cbz(rscratch1, L);
2380 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2381 __ bind(L);
2382 }
2383 #endif // ASSERT
2384 __ mov(c_rarg0, rthread);
2385 __ mov(c_rarg1, rcpool);
2386 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2387 __ blr(rscratch1);
2388 __ bind(retaddr);
2389
2390 // Need to have an oopmap that tells fetch_unroll_info where to
2391 // find any register it might need.
2392 oop_maps->add_gc_map(__ pc() - start, map);
2393
2394 __ reset_last_Java_frame(false);
2395
2396 #if INCLUDE_JVMCI
2397 if (EnableJVMCI) {
2398 __ bind(after_fetch_unroll_info_call);
2399 }
2400 #endif
2401
2402 // Load UnrollBlock* into r5
2403 __ mov(r5, r0);
2404
2405 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2406 Label noException;
2407 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2408 __ br(Assembler::NE, noException);
2409 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2410 // QQQ this is useless it was NULL above
2411 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2412 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2413 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2414
2415 __ verify_oop(r0);
2416
2417 // Overwrite the result registers with the exception results.
2418 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2419 // I think this is useless
2420 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2421
2422 __ bind(noException);
2423
2424 // Only register save data is on the stack.
2425 // Now restore the result registers. Everything else is either dead
2426 // or captured in the vframeArray.
2427
2428 // Restore fp result register
2429 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2430 // Restore integer result register
2431 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2432
2433 // Pop all of the register save area off the stack
2434 __ add(sp, sp, frame_size_in_words * wordSize);
2435
2436 // All of the register save area has been popped of the stack. Only the
2437 // return address remains.
2438
2439 // Pop all the frames we must move/replace.
2440 //
2441 // Frame picture (youngest to oldest)
2442 // 1: self-frame (no frame link)
2443 // 2: deopting frame (no frame link)
2444 // 3: caller of deopting frame (could be compiled/interpreted).
2445 //
2446 // Note: by leaving the return address of self-frame on the stack
2447 // and using the size of frame 2 to adjust the stack
2448 // when we are done the return to frame 3 will still be on the stack.
2449
2450 // Pop deoptimized frame
2451 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2452 __ sub(r2, r2, 2 * wordSize);
2453 __ add(sp, sp, r2);
2454 __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2455 // LR should now be the return address to the caller (3)
2456
2457 #ifdef ASSERT
2458 // Compilers generate code that bang the stack by as much as the
2459 // interpreter would need. So this stack banging should never
2460 // trigger a fault. Verify that it does not on non product builds.
2461 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2462 __ bang_stack_size(r19, r2);
2463 #endif
2464 // Load address of array of frame pcs into r2
2465 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2466
2467 // Trash the old pc
2468 // __ addptr(sp, wordSize); FIXME ????
2469
2470 // Load address of array of frame sizes into r4
2471 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2472
2473 // Load counter into r3
2474 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2475
2476 // Now adjust the caller's stack to make up for the extra locals
2477 // but record the original sp so that we can save it in the skeletal interpreter
2478 // frame and the stack walking of interpreter_sender will get the unextended sp
2479 // value and not the "real" sp value.
2480
2481 const Register sender_sp = r6;
2482
2483 __ mov(sender_sp, sp);
2484 __ ldrw(r19, Address(r5,
2485 Deoptimization::UnrollBlock::
2486 caller_adjustment_offset_in_bytes()));
2487 __ sub(sp, sp, r19);
2488
2489 // Push interpreter frames in a loop
2490 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2491 __ mov(rscratch2, rscratch1);
2492 Label loop;
2493 __ bind(loop);
2494 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2495 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2496 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2497 __ enter(); // Save old & set new fp
2498 __ sub(sp, sp, r19); // Prolog
2499 // This value is corrected by layout_activation_impl
2500 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2501 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2502 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2503 __ sub(r3, r3, 1); // Decrement counter
2504 __ cbnz(r3, loop);
2505
2506 // Re-push self-frame
2507 __ ldr(lr, Address(r2));
2508 __ enter();
2509
2510 // Allocate a full sized register save area. We subtract 2 because
2511 // enter() just pushed 2 words
2512 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2513
2514 // Restore frame locals after moving the frame
2515 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2516 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2517
2518 // Call C code. Need thread but NOT official VM entry
2519 // crud. We cannot block on this call, no GC can happen. Call should
2520 // restore return values to their stack-slots with the new SP.
2521 //
2522 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2523
2524 // Use rfp because the frames look interpreted now
2525 // Don't need the precise return PC here, just precise enough to point into this code blob.
2526 address the_pc = __ pc();
2527 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2528
2529 __ mov(c_rarg0, rthread);
2530 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2531 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2532 __ blr(rscratch1);
2533
2534 // Set an oopmap for the call site
2535 // Use the same PC we used for the last java frame
2536 oop_maps->add_gc_map(the_pc - start,
2537 new OopMap( frame_size_in_words, 0 ));
2538
2539 // Clear fp AND pc
2540 __ reset_last_Java_frame(true);
2541
2542 // Collect return values
2543 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2544 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2545 // I think this is useless (throwing pc?)
2546 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2547
2548 // Pop self-frame.
2549 __ leave(); // Epilog
2550
2551 // Jump to interpreter
2552 __ ret(lr);
2553
2554 // Make sure all code is generated
2555 masm->flush();
2556
2557 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2558 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2559 #if INCLUDE_JVMCI
2560 if (EnableJVMCI) {
2561 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2562 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2563 }
2564 #endif
2565 }
2566
2567 // Number of stack slots between incoming argument block and the start of
2568 // a new frame. The PROLOG must add this many slots to the stack. The
2569 // EPILOG must remove this many slots. aarch64 needs two slots for
2570 // return address and fp.
2571 // TODO think this is correct but check
2572 uint SharedRuntime::in_preserve_stack_slots() {
2573 return 4;
2574 }
2575
2576 uint SharedRuntime::out_preserve_stack_slots() {
2577 return 0;
2578 }
2579
2580 #ifdef COMPILER2
2581 //------------------------------generate_uncommon_trap_blob--------------------
2582 void SharedRuntime::generate_uncommon_trap_blob() {
2583 // Allocate space for the code
2584 ResourceMark rm;
2585 // Setup code generation tools
2586 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2587 MacroAssembler* masm = new MacroAssembler(&buffer);
2588
2589 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2590
2591 address start = __ pc();
2592
2593 // Push self-frame. We get here with a return address in LR
2594 // and sp should be 16 byte aligned
2595 // push rfp and retaddr by hand
2596 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2597 // we don't expect an arg reg save area
2598 #ifndef PRODUCT
2599 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2600 #endif
2601 // compiler left unloaded_class_index in j_rarg0 move to where the
2602 // runtime expects it.
2603 if (c_rarg1 != j_rarg0) {
2604 __ movw(c_rarg1, j_rarg0);
2605 }
2606
2607 // we need to set the past SP to the stack pointer of the stub frame
2608 // and the pc to the address where this runtime call will return
2609 // although actually any pc in this code blob will do).
2610 Label retaddr;
2611 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2612
2613 // Call C code. Need thread but NOT official VM entry
2614 // crud. We cannot block on this call, no GC can happen. Call should
2615 // capture callee-saved registers as well as return values.
2616 // Thread is in rdi already.
2617 //
2618 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2619 //
2620 // n.b. 2 gp args, 0 fp args, integral return type
2621
2622 __ mov(c_rarg0, rthread);
2623 __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2624 __ lea(rscratch1,
2625 RuntimeAddress(CAST_FROM_FN_PTR(address,
2626 Deoptimization::uncommon_trap)));
2627 __ blr(rscratch1);
2628 __ bind(retaddr);
2629
2630 // Set an oopmap for the call site
2631 OopMapSet* oop_maps = new OopMapSet();
2632 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2633
2634 // location of rfp is known implicitly by the frame sender code
2635
2636 oop_maps->add_gc_map(__ pc() - start, map);
2637
2638 __ reset_last_Java_frame(false);
2639
2640 // move UnrollBlock* into r4
2641 __ mov(r4, r0);
2642
2643 #ifdef ASSERT
2644 { Label L;
2645 __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2646 __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2647 __ br(Assembler::EQ, L);
2648 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2649 __ bind(L);
2650 }
2651 #endif
2652
2653 // Pop all the frames we must move/replace.
2654 //
2655 // Frame picture (youngest to oldest)
2656 // 1: self-frame (no frame link)
2657 // 2: deopting frame (no frame link)
2658 // 3: caller of deopting frame (could be compiled/interpreted).
2659
2660 // Pop self-frame. We have no frame, and must rely only on r0 and sp.
2661 __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2662
2663 // Pop deoptimized frame (int)
2664 __ ldrw(r2, Address(r4,
2665 Deoptimization::UnrollBlock::
2666 size_of_deoptimized_frame_offset_in_bytes()));
2667 __ sub(r2, r2, 2 * wordSize);
2668 __ add(sp, sp, r2);
2669 __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2670 // LR should now be the return address to the caller (3) frame
2671
2672 #ifdef ASSERT
2673 // Compilers generate code that bang the stack by as much as the
2674 // interpreter would need. So this stack banging should never
2675 // trigger a fault. Verify that it does not on non product builds.
2676 __ ldrw(r1, Address(r4,
2677 Deoptimization::UnrollBlock::
2678 total_frame_sizes_offset_in_bytes()));
2679 __ bang_stack_size(r1, r2);
2680 #endif
2681
2682 // Load address of array of frame pcs into r2 (address*)
2683 __ ldr(r2, Address(r4,
2684 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2685
2686 // Load address of array of frame sizes into r5 (intptr_t*)
2687 __ ldr(r5, Address(r4,
2688 Deoptimization::UnrollBlock::
2689 frame_sizes_offset_in_bytes()));
2690
2691 // Counter
2692 __ ldrw(r3, Address(r4,
2693 Deoptimization::UnrollBlock::
2694 number_of_frames_offset_in_bytes())); // (int)
2695
2696 // Now adjust the caller's stack to make up for the extra locals but
2697 // record the original sp so that we can save it in the skeletal
2698 // interpreter frame and the stack walking of interpreter_sender
2699 // will get the unextended sp value and not the "real" sp value.
2700
2701 const Register sender_sp = r8;
2702
2703 __ mov(sender_sp, sp);
2704 __ ldrw(r1, Address(r4,
2705 Deoptimization::UnrollBlock::
2706 caller_adjustment_offset_in_bytes())); // (int)
2707 __ sub(sp, sp, r1);
2708
2709 // Push interpreter frames in a loop
2710 Label loop;
2711 __ bind(loop);
2712 __ ldr(r1, Address(r5, 0)); // Load frame size
2713 __ sub(r1, r1, 2 * wordSize); // We'll push pc and rfp by hand
2714 __ ldr(lr, Address(r2, 0)); // Save return address
2715 __ enter(); // and old rfp & set new rfp
2716 __ sub(sp, sp, r1); // Prolog
2717 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2718 // This value is corrected by layout_activation_impl
2719 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2720 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2721 __ add(r5, r5, wordSize); // Bump array pointer (sizes)
2722 __ add(r2, r2, wordSize); // Bump array pointer (pcs)
2723 __ subsw(r3, r3, 1); // Decrement counter
2724 __ br(Assembler::GT, loop);
2725 __ ldr(lr, Address(r2, 0)); // save final return address
2726 // Re-push self-frame
2727 __ enter(); // & old rfp & set new rfp
2728
2729 // Use rfp because the frames look interpreted now
2730 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2731 // Don't need the precise return PC here, just precise enough to point into this code blob.
2732 address the_pc = __ pc();
2733 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2734
2735 // Call C code. Need thread but NOT official VM entry
2736 // crud. We cannot block on this call, no GC can happen. Call should
2737 // restore return values to their stack-slots with the new SP.
2738 // Thread is in rdi already.
2739 //
2740 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2741 //
2742 // n.b. 2 gp args, 0 fp args, integral return type
2743
2744 // sp should already be aligned
2745 __ mov(c_rarg0, rthread);
2746 __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2747 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2748 __ blr(rscratch1);
2749
2750 // Set an oopmap for the call site
2751 // Use the same PC we used for the last java frame
2752 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2753
2754 // Clear fp AND pc
2755 __ reset_last_Java_frame(true);
2756
2757 // Pop self-frame.
2758 __ leave(); // Epilog
2759
2760 // Jump to interpreter
2761 __ ret(lr);
2762
2763 // Make sure all code is generated
2764 masm->flush();
2765
2766 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
2767 SimpleRuntimeFrame::framesize >> 1);
2768 }
2769 #endif // COMPILER2
2770
2771
2772 //------------------------------generate_handler_blob------
2773 //
2774 // Generate a special Compile2Runtime blob that saves all registers,
2775 // and setup oopmap.
2776 //
2777 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2778 ResourceMark rm;
2779 OopMapSet *oop_maps = new OopMapSet();
2780 OopMap* map;
2781
2782 // Allocate space for the code. Setup code generation tools.
2783 CodeBuffer buffer("handler_blob", 2048, 1024);
2784 MacroAssembler* masm = new MacroAssembler(&buffer);
2785
2786 address start = __ pc();
2787 address call_pc = NULL;
2788 int frame_size_in_words;
2789 bool cause_return = (poll_type == POLL_AT_RETURN);
2790 RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2791
2792 // Save Integer and Float registers.
2793 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2794
2795 // The following is basically a call_VM. However, we need the precise
2796 // address of the call in order to generate an oopmap. Hence, we do all the
2797 // work outselves.
2798
2799 Label retaddr;
2800 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2801
2802 // The return address must always be correct so that frame constructor never
2803 // sees an invalid pc.
2804
2805 if (!cause_return) {
2806 // overwrite the return address pushed by save_live_registers
2807 // Additionally, r20 is a callee-saved register so we can look at
2808 // it later to determine if someone changed the return address for
2809 // us!
2810 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2811 __ str(r20, Address(rfp, wordSize));
2812 }
2813
2814 // Do the call
2815 __ mov(c_rarg0, rthread);
2816 __ lea(rscratch1, RuntimeAddress(call_ptr));
2817 __ blr(rscratch1);
2818 __ bind(retaddr);
2819
2820 // Set an oopmap for the call site. This oopmap will map all
2821 // oop-registers and debug-info registers as callee-saved. This
2822 // will allow deoptimization at this safepoint to find all possible
2823 // debug-info recordings, as well as let GC find all oops.
2824
2825 oop_maps->add_gc_map( __ pc() - start, map);
2826
2827 Label noException;
2828
2829 __ reset_last_Java_frame(false);
2830
2831 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2832
2833 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2834 __ cbz(rscratch1, noException);
2835
2836 // Exception pending
2837
2838 reg_save.restore_live_registers(masm);
2839
2840 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2841
2842 // No exception case
2843 __ bind(noException);
2844
2845 Label no_adjust, bail;
2846 if (!cause_return) {
2847 // If our stashed return pc was modified by the runtime we avoid touching it
2848 __ ldr(rscratch1, Address(rfp, wordSize));
2849 __ cmp(r20, rscratch1);
2850 __ br(Assembler::NE, no_adjust);
2851
2852 #ifdef ASSERT
2853 // Verify the correct encoding of the poll we're about to skip.
2854 // See NativeInstruction::is_ldrw_to_zr()
2855 __ ldrw(rscratch1, Address(r20));
2856 __ ubfx(rscratch2, rscratch1, 22, 10);
2857 __ cmpw(rscratch2, 0b1011100101);
2858 __ br(Assembler::NE, bail);
2859 __ ubfx(rscratch2, rscratch1, 0, 5);
2860 __ cmpw(rscratch2, 0b11111);
2861 __ br(Assembler::NE, bail);
2862 #endif
2863 // Adjust return pc forward to step over the safepoint poll instruction
2864 __ add(r20, r20, NativeInstruction::instruction_size);
2865 __ str(r20, Address(rfp, wordSize));
2866 }
2867
2868 __ bind(no_adjust);
2869 // Normal exit, restore registers and exit.
2870 reg_save.restore_live_registers(masm);
2871
2872 __ ret(lr);
2873
2874 #ifdef ASSERT
2875 __ bind(bail);
2876 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2877 #endif
2878
2879 // Make sure all code is generated
2880 masm->flush();
2881
2882 // Fill-out other meta info
2883 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2884 }
2885
2886 //
2887 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2888 //
2889 // Generate a stub that calls into vm to find out the proper destination
2890 // of a java call. All the argument registers are live at this point
2891 // but since this is generic code we don't know what they are and the caller
2892 // must do any gc of the args.
2893 //
2894 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2895 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2896
2897 // allocate space for the code
2898 ResourceMark rm;
2899
2900 CodeBuffer buffer(name, 1000, 512);
2901 MacroAssembler* masm = new MacroAssembler(&buffer);
2902
2903 int frame_size_in_words;
2904 RegisterSaver reg_save(false /* save_vectors */);
2905
2906 OopMapSet *oop_maps = new OopMapSet();
2907 OopMap* map = NULL;
2908
2909 int start = __ offset();
2910
2911 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2912
2913 int frame_complete = __ offset();
2914
2915 {
2916 Label retaddr;
2917 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2918
2919 __ mov(c_rarg0, rthread);
2920 __ lea(rscratch1, RuntimeAddress(destination));
2921
2922 __ blr(rscratch1);
2923 __ bind(retaddr);
2924 }
2925
2926 // Set an oopmap for the call site.
2927 // We need this not only for callee-saved registers, but also for volatile
2928 // registers that the compiler might be keeping live across a safepoint.
2929
2930 oop_maps->add_gc_map( __ offset() - start, map);
2931
2932 // r0 contains the address we are going to jump to assuming no exception got installed
2933
2934 // clear last_Java_sp
2935 __ reset_last_Java_frame(false);
2936 // check for pending exceptions
2937 Label pending;
2938 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2939 __ cbnz(rscratch1, pending);
2940
2941 // get the returned Method*
2942 __ get_vm_result_2(rmethod, rthread);
2943 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2944
2945 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2946 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2947 reg_save.restore_live_registers(masm);
2948
2949 // We are back the the original state on entry and ready to go.
2950
2951 __ br(rscratch1);
2952
2953 // Pending exception after the safepoint
2954
2955 __ bind(pending);
2956
2957 reg_save.restore_live_registers(masm);
2958
2959 // exception pending => remove activation and forward to exception handler
2960
2961 __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
2962
2963 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2964 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2965
2966 // -------------
2967 // make sure all code is generated
2968 masm->flush();
2969
2970 // return the blob
2971 // frame_size_words or bytes??
2972 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2973 }
2974
2975 #ifdef COMPILER2
2976 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
2977 //
2978 //------------------------------generate_exception_blob---------------------------
2979 // creates exception blob at the end
2980 // Using exception blob, this code is jumped from a compiled method.
2981 // (see emit_exception_handler in x86_64.ad file)
2982 //
2983 // Given an exception pc at a call we call into the runtime for the
2984 // handler in this method. This handler might merely restore state
2985 // (i.e. callee save registers) unwind the frame and jump to the
2986 // exception handler for the nmethod if there is no Java level handler
2987 // for the nmethod.
2988 //
2989 // This code is entered with a jmp.
2990 //
2991 // Arguments:
2992 // r0: exception oop
2993 // r3: exception pc
2994 //
2995 // Results:
2996 // r0: exception oop
2997 // r3: exception pc in caller or ???
2998 // destination: exception handler of caller
2999 //
3000 // Note: the exception pc MUST be at a call (precise debug information)
3001 // Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
3002 //
3003
3004 void OptoRuntime::generate_exception_blob() {
3005 assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
3006 assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
3007 assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
3008
3009 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3010
3011 // Allocate space for the code
3012 ResourceMark rm;
3013 // Setup code generation tools
3014 CodeBuffer buffer("exception_blob", 2048, 1024);
3015 MacroAssembler* masm = new MacroAssembler(&buffer);
3016
3017 // TODO check various assumptions made here
3018 //
3019 // make sure we do so before running this
3020
3021 address start = __ pc();
3022
3023 // push rfp and retaddr by hand
3024 // Exception pc is 'return address' for stack walker
3025 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3026 // there are no callee save registers and we don't expect an
3027 // arg reg save area
3028 #ifndef PRODUCT
3029 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3030 #endif
3031 // Store exception in Thread object. We cannot pass any arguments to the
3032 // handle_exception call, since we do not want to make any assumption
3033 // about the size of the frame where the exception happened in.
3034 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3035 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3036
3037 // This call does all the hard work. It checks if an exception handler
3038 // exists in the method.
3039 // If so, it returns the handler address.
3040 // If not, it prepares for stack-unwinding, restoring the callee-save
3041 // registers of the frame being removed.
3042 //
3043 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3044 //
3045 // n.b. 1 gp arg, 0 fp args, integral return type
3046
3047 // the stack should always be aligned
3048 address the_pc = __ pc();
3049 __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3050 __ mov(c_rarg0, rthread);
3051 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3052 __ blr(rscratch1);
3053 // handle_exception_C is a special VM call which does not require an explicit
3054 // instruction sync afterwards.
3055
3056 // May jump to SVE compiled code
3057 __ reinitialize_ptrue();
3058
3059 // Set an oopmap for the call site. This oopmap will only be used if we
3060 // are unwinding the stack. Hence, all locations will be dead.
3061 // Callee-saved registers will be the same as the frame above (i.e.,
3062 // handle_exception_stub), since they were restored when we got the
3063 // exception.
3064
3065 OopMapSet* oop_maps = new OopMapSet();
3066
3067 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3068
3069 __ reset_last_Java_frame(false);
3070
3071 // Restore callee-saved registers
3072
3073 // rfp is an implicitly saved callee saved register (i.e. the calling
3074 // convention will save restore it in prolog/epilog) Other than that
3075 // there are no callee save registers now that adapter frames are gone.
3076 // and we dont' expect an arg reg save area
3077 __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3078
3079 // r0: exception handler
3080
3081 // We have a handler in r0 (could be deopt blob).
3082 __ mov(r8, r0);
3083
3084 // Get the exception oop
3085 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3086 // Get the exception pc in case we are deoptimized
3087 __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3088 #ifdef ASSERT
3089 __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3090 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3091 #endif
3092 // Clear the exception oop so GC no longer processes it as a root.
3093 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3094
3095 // r0: exception oop
3096 // r8: exception handler
3097 // r4: exception pc
3098 // Jump to handler
3099
3100 __ br(r8);
3101
3102 // Make sure all code is generated
3103 masm->flush();
3104
3105 // Set exception blob
3106 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3107 }
3108
3109 // ---------------------------------------------------------------
3110
3111 class NativeInvokerGenerator : public StubCodeGenerator {
3112 address _call_target;
3113 int _shadow_space_bytes;
3114
3115 const GrowableArray<VMReg>& _input_registers;
3116 const GrowableArray<VMReg>& _output_registers;
3117
3118 int _frame_complete;
3119 int _framesize;
3120 OopMapSet* _oop_maps;
3121 public:
3122 NativeInvokerGenerator(CodeBuffer* buffer,
3123 address call_target,
3124 int shadow_space_bytes,
3125 const GrowableArray<VMReg>& input_registers,
3126 const GrowableArray<VMReg>& output_registers)
3127 : StubCodeGenerator(buffer, PrintMethodHandleStubs),
3128 _call_target(call_target),
3129 _shadow_space_bytes(shadow_space_bytes),
3130 _input_registers(input_registers),
3131 _output_registers(output_registers),
3132 _frame_complete(0),
3133 _framesize(0),
3134 _oop_maps(NULL) {
3135 assert(_output_registers.length() <= 1
3136 || (_output_registers.length() == 2 && !_output_registers.at(1)->is_valid()), "no multi-reg returns");
3137 }
3138
3139 void generate();
3140
3141 int spill_size_in_bytes() const {
3142 if (_output_registers.length() == 0) {
3143 return 0;
3144 }
3145 VMReg reg = _output_registers.at(0);
3146 assert(reg->is_reg(), "must be a register");
3147 if (reg->is_Register()) {
3148 return 8;
3149 } else if (reg->is_FloatRegister()) {
3150 bool use_sve = Matcher::supports_scalable_vector();
3151 if (use_sve) {
3152 return Matcher::scalable_vector_reg_size(T_BYTE);
3153 }
3154 return 16;
3155 } else {
3156 ShouldNotReachHere();
3157 }
3158 return 0;
3159 }
3160
3161 void spill_output_registers() {
3162 if (_output_registers.length() == 0) {
3163 return;
3164 }
3165 VMReg reg = _output_registers.at(0);
3166 assert(reg->is_reg(), "must be a register");
3167 MacroAssembler* masm = _masm;
3168 if (reg->is_Register()) {
3169 __ spill(reg->as_Register(), true, 0);
3170 } else if (reg->is_FloatRegister()) {
3171 bool use_sve = Matcher::supports_scalable_vector();
3172 if (use_sve) {
3173 __ spill_sve_vector(reg->as_FloatRegister(), 0, Matcher::scalable_vector_reg_size(T_BYTE));
3174 } else {
3175 __ spill(reg->as_FloatRegister(), __ Q, 0);
3176 }
3177 } else {
3178 ShouldNotReachHere();
3179 }
3180 }
3181
3182 void fill_output_registers() {
3183 if (_output_registers.length() == 0) {
3184 return;
3185 }
3186 VMReg reg = _output_registers.at(0);
3187 assert(reg->is_reg(), "must be a register");
3188 MacroAssembler* masm = _masm;
3189 if (reg->is_Register()) {
3190 __ unspill(reg->as_Register(), true, 0);
3191 } else if (reg->is_FloatRegister()) {
3192 bool use_sve = Matcher::supports_scalable_vector();
3193 if (use_sve) {
3194 __ unspill_sve_vector(reg->as_FloatRegister(), 0, Matcher::scalable_vector_reg_size(T_BYTE));
3195 } else {
3196 __ unspill(reg->as_FloatRegister(), __ Q, 0);
3197 }
3198 } else {
3199 ShouldNotReachHere();
3200 }
3201 }
3202
3203 int frame_complete() const {
3204 return _frame_complete;
3205 }
3206
3207 int framesize() const {
3208 return (_framesize >> (LogBytesPerWord - LogBytesPerInt));
3209 }
3210
3211 OopMapSet* oop_maps() const {
3212 return _oop_maps;
3213 }
3214
3215 private:
3216 #ifdef ASSERT
3217 bool target_uses_register(VMReg reg) {
3218 return _input_registers.contains(reg) || _output_registers.contains(reg);
3219 }
3220 #endif
3221 };
3222
3223 static const int native_invoker_code_size = 1024;
3224
3225 RuntimeStub* SharedRuntime::make_native_invoker(address call_target,
3226 int shadow_space_bytes,
3227 const GrowableArray<VMReg>& input_registers,
3228 const GrowableArray<VMReg>& output_registers) {
3229 int locs_size = 64;
3230 CodeBuffer code("nep_invoker_blob", native_invoker_code_size, locs_size);
3231 NativeInvokerGenerator g(&code, call_target, shadow_space_bytes, input_registers, output_registers);
3232 g.generate();
3233 code.log_section_sizes("nep_invoker_blob");
3234
3235 RuntimeStub* stub =
3236 RuntimeStub::new_runtime_stub("nep_invoker_blob",
3237 &code,
3238 g.frame_complete(),
3239 g.framesize(),
3240 g.oop_maps(), false);
3241 return stub;
3242 }
3243
3244 void NativeInvokerGenerator::generate() {
3245 assert(!(target_uses_register(rscratch1->as_VMReg())
3246 || target_uses_register(rscratch2->as_VMReg())
3247 || target_uses_register(rthread->as_VMReg())),
3248 "Register conflict");
3249
3250 enum layout {
3251 rbp_off,
3252 rbp_off2,
3253 return_off,
3254 return_off2,
3255 framesize // inclusive of return address
3256 };
3257
3258 assert(_shadow_space_bytes == 0, "not expecting shadow space on AArch64");
3259 _framesize = align_up(framesize + (spill_size_in_bytes() >> LogBytesPerInt), 4);
3260 assert(is_even(_framesize/2), "sp not 16-byte aligned");
3261
3262 _oop_maps = new OopMapSet();
3263 MacroAssembler* masm = _masm;
3264
3265 address start = __ pc();
3266
3267 __ enter();
3268
3269 // lr and fp are already in place
3270 __ sub(sp, rfp, ((unsigned)_framesize-4) << LogBytesPerInt); // prolog
3271
3272 _frame_complete = __ pc() - start;
3273
3274 address the_pc = __ pc();
3275 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3276 OopMap* map = new OopMap(_framesize, 0);
3277 _oop_maps->add_gc_map(the_pc - start, map);
3278
3279 // State transition
3280 __ mov(rscratch1, _thread_in_native);
3281 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
3282 __ stlrw(rscratch1, rscratch2);
3283
3284 rt_call(masm, _call_target);
3285
3286 __ mov(rscratch1, _thread_in_native_trans);
3287 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
3288
3289 // Force this write out before the read below
3290 __ membar(Assembler::LoadLoad | Assembler::LoadStore |
3291 Assembler::StoreLoad | Assembler::StoreStore);
3292
3293 __ verify_sve_vector_length();
3294
3295 Label L_after_safepoint_poll;
3296 Label L_safepoint_poll_slow_path;
3297
3298 __ safepoint_poll(L_safepoint_poll_slow_path, true /* at_return */, true /* acquire */, false /* in_nmethod */);
3299
3300 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
3301 __ cbnzw(rscratch1, L_safepoint_poll_slow_path);
3302
3303 __ bind(L_after_safepoint_poll);
3304
3305 // change thread state
3306 __ mov(rscratch1, _thread_in_Java);
3307 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
3308 __ stlrw(rscratch1, rscratch2);
3309
3310 __ block_comment("reguard stack check");
3311 Label L_reguard;
3312 Label L_after_reguard;
3313 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
3314 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
3315 __ br(Assembler::EQ, L_reguard);
3316 __ bind(L_after_reguard);
3317
3318 __ reset_last_Java_frame(true);
3319
3320 __ leave(); // required for proper stackwalking of RuntimeStub frame
3321 __ ret(lr);
3322
3323 //////////////////////////////////////////////////////////////////////////////
3324
3325 __ block_comment("{ L_safepoint_poll_slow_path");
3326 __ bind(L_safepoint_poll_slow_path);
3327
3328 // Need to save the native result registers around any runtime calls.
3329 spill_output_registers();
3330
3331 __ mov(c_rarg0, rthread);
3332 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3333 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
3334 __ blr(rscratch1);
3335
3336 fill_output_registers();
3337
3338 __ b(L_after_safepoint_poll);
3339 __ block_comment("} L_safepoint_poll_slow_path");
3340
3341 //////////////////////////////////////////////////////////////////////////////
3342
3343 __ block_comment("{ L_reguard");
3344 __ bind(L_reguard);
3345
3346 spill_output_registers();
3347
3348 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
3349
3350 fill_output_registers();
3351
3352 __ b(L_after_reguard);
3353
3354 __ block_comment("} L_reguard");
3355
3356 //////////////////////////////////////////////////////////////////////////////
3357
3358 __ flush();
3359 }
3360 #endif // COMPILER2