1 /*
2 * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "gc/shared/c1/barrierSetC1.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/powerOfTwo.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 #ifdef _LP64
97 case floatTag: opr = FrameMap::xmm0_float_opr; break;
98 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
99 #else
100 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
101 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
102 #endif // _LP64
103 case addressTag:
104 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
105 }
106
107 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
108 return opr;
109 }
110
111
112 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
113 LIR_Opr reg = new_register(T_INT);
114 set_vreg_flag(reg, LIRGenerator::byte_reg);
115 return reg;
116 }
117
118
119 //--------- loading items into registers --------------------------------
120
121
122 // i486 instructions can inline constants
123 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
124 if (type == T_SHORT || type == T_CHAR) {
125 // there is no immediate move of word values in asembler_i486.?pp
126 return false;
127 }
128 Constant* c = v->as_Constant();
129 if (c && c->state_before() == NULL) {
130 // constants of any type can be stored directly, except for
131 // unloaded object constants.
132 return true;
133 }
134 return false;
135 }
136
137
138 bool LIRGenerator::can_inline_as_constant(Value v) const {
139 if (v->type()->tag() == longTag) return false;
140 return v->type()->tag() != objectTag ||
141 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
142 }
143
144
145 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
146 if (c->type() == T_LONG) return false;
147 return c->type() != T_OBJECT || c->as_jobject() == NULL;
148 }
149
150
151 LIR_Opr LIRGenerator::safepoint_poll_register() {
152 NOT_LP64( return new_register(T_ADDRESS); )
153 return LIR_OprFact::illegalOpr;
154 }
155
156
157 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
158 int shift, int disp, BasicType type) {
159 assert(base->is_register(), "must be");
160 if (index->is_constant()) {
161 LIR_Const *constant = index->as_constant_ptr();
162 #ifdef _LP64
163 jlong c;
164 if (constant->type() == T_INT) {
165 c = (jlong(index->as_jint()) << shift) + disp;
166 } else {
167 assert(constant->type() == T_LONG, "should be");
168 c = (index->as_jlong() << shift) + disp;
169 }
170 if ((jlong)((jint)c) == c) {
171 return new LIR_Address(base, (jint)c, type);
172 } else {
173 LIR_Opr tmp = new_register(T_LONG);
174 __ move(index, tmp);
175 return new LIR_Address(base, tmp, type);
176 }
177 #else
178 return new LIR_Address(base,
179 ((intx)(constant->as_jint()) << shift) + disp,
180 type);
181 #endif
182 } else {
183 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
184 }
185 }
186
187
188 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
189 BasicType type) {
190 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
191
192 LIR_Address* addr;
193 if (index_opr->is_constant()) {
194 int elem_size = type2aelembytes(type);
195 #ifdef _LP64
196 jint index = index_opr->as_jint();
197 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
198 if (disp > max_jint) {
199 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
200 // Convert array index to long to do array offset computation with 64-bit values.
201 index_opr = new_register(T_LONG);
202 __ move(LIR_OprFact::longConst(index), index_opr);
203 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
204 } else {
205 addr = new LIR_Address(array_opr, (intx)disp, type);
206 }
207 #else
208 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range!
209 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will
210 // always be negative (i.e. underflows the 32-bit address range):
211 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N.
212 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then
213 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always
214 // underflows the 32-bit address range:
215 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N)
216 // = (a + disp - N) + N = a + disp
217 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address
218 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms.
219 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
220 #endif // _LP64
221 } else {
222 #ifdef _LP64
223 if (index_opr->type() == T_INT) {
224 LIR_Opr tmp = new_register(T_LONG);
225 __ convert(Bytecodes::_i2l, index_opr, tmp);
226 index_opr = tmp;
227 }
228 #endif // _LP64
229 addr = new LIR_Address(array_opr,
230 index_opr,
231 LIR_Address::scale(type),
232 offset_in_bytes, type);
233 }
234 return addr;
235 }
236
237
238 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
239 LIR_Opr r = NULL;
240 if (type == T_LONG) {
241 r = LIR_OprFact::longConst(x);
242 } else if (type == T_INT) {
243 r = LIR_OprFact::intConst(x);
244 } else {
245 ShouldNotReachHere();
246 }
247 return r;
248 }
249
250 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
251 LIR_Opr pointer = new_pointer_register();
252 __ move(LIR_OprFact::intptrConst(counter), pointer);
253 LIR_Address* addr = new LIR_Address(pointer, type);
254 increment_counter(addr, step);
255 }
256
257
258 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
259 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
260 }
261
262 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
263 __ cmp_mem_int(condition, base, disp, c, info);
264 }
265
266
267 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
268 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
269 }
270
271
272 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
273 if (tmp->is_valid() && c > 0 && c < max_jint) {
274 if (is_power_of_2(c + 1)) {
275 __ move(left, tmp);
276 __ shift_left(left, log2i_exact(c + 1), left);
277 __ sub(left, tmp, result);
278 return true;
279 } else if (is_power_of_2(c - 1)) {
280 __ move(left, tmp);
281 __ shift_left(left, log2i_exact(c - 1), left);
282 __ add(left, tmp, result);
283 return true;
284 }
285 }
286 return false;
287 }
288
289
290 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
291 BasicType type = item->type();
292 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
293 }
294
295 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
296 LIR_Opr tmp1 = new_register(objectType);
297 LIR_Opr tmp2 = new_register(objectType);
298 LIR_Opr tmp3 = new_register(objectType);
299 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
300 }
301
302 //----------------------------------------------------------------------
303 // visitor functions
304 //----------------------------------------------------------------------
305
306 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
307 assert(x->is_pinned(),"");
308 LIRItem obj(x->obj(), this);
309 obj.load_item();
310
311 set_no_result(x);
312
313 // "lock" stores the address of the monitor stack slot, so this is not an oop
314 LIR_Opr lock = new_register(T_INT);
315 // Need a scratch register for biased locking on x86
316 LIR_Opr scratch = LIR_OprFact::illegalOpr;
317 if (UseBiasedLocking || LockingMode == LM_LIGHTWEIGHT) {
318 scratch = new_register(T_INT);
319 }
320
321 CodeEmitInfo* info_for_exception = NULL;
322 if (x->needs_null_check()) {
323 info_for_exception = state_for(x);
324 }
325 // this CodeEmitInfo must not have the xhandlers because here the
326 // object is already locked (xhandlers expect object to be unlocked)
327 CodeEmitInfo* info = state_for(x, x->state(), true);
328 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
329 x->monitor_no(), info_for_exception, info);
330 }
331
332
333 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
334 assert(x->is_pinned(),"");
335
336 LIRItem obj(x->obj(), this);
337 obj.dont_load_item();
338
339 LIR_Opr lock = new_register(T_INT);
340 LIR_Opr obj_temp = new_register(T_INT);
341 set_no_result(x);
342 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
343 }
344
345
346 // _ineg, _lneg, _fneg, _dneg
347 void LIRGenerator::do_NegateOp(NegateOp* x) {
348 LIRItem value(x->x(), this);
349 value.set_destroys_register();
350 value.load_item();
351 LIR_Opr reg = rlock(x);
352
353 LIR_Opr tmp = LIR_OprFact::illegalOpr;
354 #ifdef _LP64
355 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
356 if (x->type()->tag() == doubleTag) {
357 tmp = new_register(T_DOUBLE);
358 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
359 }
360 else if (x->type()->tag() == floatTag) {
361 tmp = new_register(T_FLOAT);
362 __ move(LIR_OprFact::floatConst(-0.0), tmp);
363 }
364 }
365 #endif
366 __ negate(value.result(), reg, tmp);
367
368 set_result(x, round_item(reg));
369 }
370
371
372 // for _fadd, _fmul, _fsub, _fdiv, _frem
373 // _dadd, _dmul, _dsub, _ddiv, _drem
374 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
375 LIRItem left(x->x(), this);
376 LIRItem right(x->y(), this);
377 LIRItem* left_arg = &left;
378 LIRItem* right_arg = &right;
379 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
380 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
381 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
382 left.load_item();
383 } else {
384 left.dont_load_item();
385 }
386
387 #ifndef _LP64
388 // do not load right operand if it is a constant. only 0 and 1 are
389 // loaded because there are special instructions for loading them
390 // without memory access (not needed for SSE2 instructions)
391 bool must_load_right = false;
392 if (right.is_constant()) {
393 LIR_Const* c = right.result()->as_constant_ptr();
394 assert(c != NULL, "invalid constant");
395 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
396
397 if (c->type() == T_FLOAT) {
398 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
399 } else {
400 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
401 }
402 }
403 #endif // !LP64
404
405 if (must_load_both) {
406 // frem and drem destroy also right operand, so move it to a new register
407 right.set_destroys_register();
408 right.load_item();
409 } else if (right.is_register()) {
410 right.load_item();
411 #ifndef _LP64
412 } else if (must_load_right) {
413 right.load_item();
414 #endif // !LP64
415 } else {
416 right.dont_load_item();
417 }
418 LIR_Opr reg = rlock(x);
419 LIR_Opr tmp = LIR_OprFact::illegalOpr;
420 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
421 tmp = new_register(T_DOUBLE);
422 }
423
424 #ifdef _LP64
425 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
426 // frem and drem are implemented as a direct call into the runtime.
427 LIRItem left(x->x(), this);
428 LIRItem right(x->y(), this);
429
430 BasicType bt = as_BasicType(x->type());
431 BasicTypeList signature(2);
432 signature.append(bt);
433 signature.append(bt);
434 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
435
436 const LIR_Opr result_reg = result_register_for(x->type());
437 left.load_item_force(cc->at(0));
438 right.load_item_force(cc->at(1));
439
440 address entry = NULL;
441 switch (x->op()) {
442 case Bytecodes::_frem:
443 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
444 break;
445 case Bytecodes::_drem:
446 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
447 break;
448 default:
449 ShouldNotReachHere();
450 }
451
452 LIR_Opr result = rlock_result(x);
453 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
454 __ move(result_reg, result);
455 } else {
456 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
457 set_result(x, round_item(reg));
458 }
459 #else
460 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
461 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
462 LIR_Opr fpu0, fpu1;
463 if (x->op() == Bytecodes::_frem) {
464 fpu0 = LIR_OprFact::single_fpu(0);
465 fpu1 = LIR_OprFact::single_fpu(1);
466 } else {
467 fpu0 = LIR_OprFact::double_fpu(0);
468 fpu1 = LIR_OprFact::double_fpu(1);
469 }
470 __ move(right.result(), fpu1); // order of left and right operand is important!
471 __ move(left.result(), fpu0);
472 __ rem (fpu0, fpu1, fpu0);
473 __ move(fpu0, reg);
474
475 } else {
476 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
477 }
478 set_result(x, round_item(reg));
479 #endif // _LP64
480 }
481
482
483 // for _ladd, _lmul, _lsub, _ldiv, _lrem
484 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
485 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
486 // long division is implemented as a direct call into the runtime
487 LIRItem left(x->x(), this);
488 LIRItem right(x->y(), this);
489
490 // the check for division by zero destroys the right operand
491 right.set_destroys_register();
492
493 BasicTypeList signature(2);
494 signature.append(T_LONG);
495 signature.append(T_LONG);
496 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
497
498 // check for division by zero (destroys registers of right operand!)
499 CodeEmitInfo* info = state_for(x);
500
501 const LIR_Opr result_reg = result_register_for(x->type());
502 left.load_item_force(cc->at(1));
503 right.load_item();
504
505 __ move(right.result(), cc->at(0));
506
507 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
508 __ branch(lir_cond_equal, new DivByZeroStub(info));
509
510 address entry = NULL;
511 switch (x->op()) {
512 case Bytecodes::_lrem:
513 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
514 break; // check if dividend is 0 is done elsewhere
515 case Bytecodes::_ldiv:
516 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
517 break; // check if dividend is 0 is done elsewhere
518 default:
519 ShouldNotReachHere();
520 }
521
522 LIR_Opr result = rlock_result(x);
523 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
524 __ move(result_reg, result);
525 } else if (x->op() == Bytecodes::_lmul) {
526 // missing test if instr is commutative and if we should swap
527 LIRItem left(x->x(), this);
528 LIRItem right(x->y(), this);
529
530 // right register is destroyed by the long mul, so it must be
531 // copied to a new register.
532 right.set_destroys_register();
533
534 left.load_item();
535 right.load_item();
536
537 LIR_Opr reg = FrameMap::long0_opr;
538 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
539 LIR_Opr result = rlock_result(x);
540 __ move(reg, result);
541 } else {
542 // missing test if instr is commutative and if we should swap
543 LIRItem left(x->x(), this);
544 LIRItem right(x->y(), this);
545
546 left.load_item();
547 // don't load constants to save register
548 right.load_nonconstant();
549 rlock_result(x);
550 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
551 }
552 }
553
554
555
556 // for: _iadd, _imul, _isub, _idiv, _irem
557 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
558 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
559 // The requirements for division and modulo
560 // input : rax,: dividend min_int
561 // reg: divisor (may not be rax,/rdx) -1
562 //
563 // output: rax,: quotient (= rax, idiv reg) min_int
564 // rdx: remainder (= rax, irem reg) 0
565
566 // rax, and rdx will be destroyed
567
568 // Note: does this invalidate the spec ???
569 LIRItem right(x->y(), this);
570 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
571
572 // call state_for before load_item_force because state_for may
573 // force the evaluation of other instructions that are needed for
574 // correct debug info. Otherwise the live range of the fix
575 // register might be too long.
576 CodeEmitInfo* info = state_for(x);
577
578 left.load_item_force(divInOpr());
579
580 right.load_item();
581
582 LIR_Opr result = rlock_result(x);
583 LIR_Opr result_reg;
584 if (x->op() == Bytecodes::_idiv) {
585 result_reg = divOutOpr();
586 } else {
587 result_reg = remOutOpr();
588 }
589
590 if (!ImplicitDiv0Checks) {
591 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
592 __ branch(lir_cond_equal, new DivByZeroStub(info));
593 // Idiv/irem cannot trap (passing info would generate an assertion).
594 info = NULL;
595 }
596 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
597 if (x->op() == Bytecodes::_irem) {
598 __ irem(left.result(), right.result(), result_reg, tmp, info);
599 } else if (x->op() == Bytecodes::_idiv) {
600 __ idiv(left.result(), right.result(), result_reg, tmp, info);
601 } else {
602 ShouldNotReachHere();
603 }
604
605 __ move(result_reg, result);
606 } else {
607 // missing test if instr is commutative and if we should swap
608 LIRItem left(x->x(), this);
609 LIRItem right(x->y(), this);
610 LIRItem* left_arg = &left;
611 LIRItem* right_arg = &right;
612 if (x->is_commutative() && left.is_stack() && right.is_register()) {
613 // swap them if left is real stack (or cached) and right is real register(not cached)
614 left_arg = &right;
615 right_arg = &left;
616 }
617
618 left_arg->load_item();
619
620 // do not need to load right, as we can handle stack and constants
621 if (x->op() == Bytecodes::_imul ) {
622 // check if we can use shift instead
623 bool use_constant = false;
624 bool use_tmp = false;
625 if (right_arg->is_constant()) {
626 jint iconst = right_arg->get_jint_constant();
627 if (iconst > 0 && iconst < max_jint) {
628 if (is_power_of_2(iconst)) {
629 use_constant = true;
630 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
631 use_constant = true;
632 use_tmp = true;
633 }
634 }
635 }
636 if (use_constant) {
637 right_arg->dont_load_item();
638 } else {
639 right_arg->load_item();
640 }
641 LIR_Opr tmp = LIR_OprFact::illegalOpr;
642 if (use_tmp) {
643 tmp = new_register(T_INT);
644 }
645 rlock_result(x);
646
647 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
648 } else {
649 right_arg->dont_load_item();
650 rlock_result(x);
651 LIR_Opr tmp = LIR_OprFact::illegalOpr;
652 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
653 }
654 }
655 }
656
657
658 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
659 // when an operand with use count 1 is the left operand, then it is
660 // likely that no move for 2-operand-LIR-form is necessary
661 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
662 x->swap_operands();
663 }
664
665 ValueTag tag = x->type()->tag();
666 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
667 switch (tag) {
668 case floatTag:
669 case doubleTag: do_ArithmeticOp_FPU(x); return;
670 case longTag: do_ArithmeticOp_Long(x); return;
671 case intTag: do_ArithmeticOp_Int(x); return;
672 default: ShouldNotReachHere(); return;
673 }
674 }
675
676
677 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
678 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
679 // count must always be in rcx
680 LIRItem value(x->x(), this);
681 LIRItem count(x->y(), this);
682
683 ValueTag elemType = x->type()->tag();
684 bool must_load_count = !count.is_constant() || elemType == longTag;
685 if (must_load_count) {
686 // count for long must be in register
687 count.load_item_force(shiftCountOpr());
688 } else {
689 count.dont_load_item();
690 }
691 value.load_item();
692 LIR_Opr reg = rlock_result(x);
693
694 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
695 }
696
697
698 // _iand, _land, _ior, _lor, _ixor, _lxor
699 void LIRGenerator::do_LogicOp(LogicOp* x) {
700 // when an operand with use count 1 is the left operand, then it is
701 // likely that no move for 2-operand-LIR-form is necessary
702 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
703 x->swap_operands();
704 }
705
706 LIRItem left(x->x(), this);
707 LIRItem right(x->y(), this);
708
709 left.load_item();
710 right.load_nonconstant();
711 LIR_Opr reg = rlock_result(x);
712
713 logic_op(x->op(), reg, left.result(), right.result());
714 }
715
716
717
718 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
719 void LIRGenerator::do_CompareOp(CompareOp* x) {
720 LIRItem left(x->x(), this);
721 LIRItem right(x->y(), this);
722 ValueTag tag = x->x()->type()->tag();
723 if (tag == longTag) {
724 left.set_destroys_register();
725 }
726 left.load_item();
727 right.load_item();
728 LIR_Opr reg = rlock_result(x);
729
730 if (x->x()->type()->is_float_kind()) {
731 Bytecodes::Code code = x->op();
732 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
733 } else if (x->x()->type()->tag() == longTag) {
734 __ lcmp2int(left.result(), right.result(), reg);
735 } else {
736 Unimplemented();
737 }
738 }
739
740 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
741 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
742 if (is_reference_type(type)) {
743 cmp_value.load_item_force(FrameMap::rax_oop_opr);
744 new_value.load_item();
745 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
746 } else if (type == T_INT) {
747 cmp_value.load_item_force(FrameMap::rax_opr);
748 new_value.load_item();
749 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
750 } else if (type == T_LONG) {
751 cmp_value.load_item_force(FrameMap::long0_opr);
752 new_value.load_item_force(FrameMap::long1_opr);
753 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
754 } else {
755 Unimplemented();
756 }
757 LIR_Opr result = new_register(T_INT);
758 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
759 result, T_INT);
760 return result;
761 }
762
763 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
764 bool is_oop = is_reference_type(type);
765 LIR_Opr result = new_register(type);
766 value.load_item();
767 // Because we want a 2-arg form of xchg and xadd
768 __ move(value.result(), result);
769 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
770 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
771 return result;
772 }
773
774 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
775 LIR_Opr result = new_register(type);
776 value.load_item();
777 // Because we want a 2-arg form of xchg and xadd
778 __ move(value.result(), result);
779 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
780 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
781 return result;
782 }
783
784 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
785 assert(x->number_of_arguments() == 3, "wrong type");
786 assert(UseFMA, "Needs FMA instructions support.");
787 LIRItem value(x->argument_at(0), this);
788 LIRItem value1(x->argument_at(1), this);
789 LIRItem value2(x->argument_at(2), this);
790
791 value2.set_destroys_register();
792
793 value.load_item();
794 value1.load_item();
795 value2.load_item();
796
797 LIR_Opr calc_input = value.result();
798 LIR_Opr calc_input1 = value1.result();
799 LIR_Opr calc_input2 = value2.result();
800 LIR_Opr calc_result = rlock_result(x);
801
802 switch (x->id()) {
803 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
804 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
805 default: ShouldNotReachHere();
806 }
807
808 }
809
810
811 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
812 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
813
814 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
815 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
816 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
817 x->id() == vmIntrinsics::_dlog10) {
818 do_LibmIntrinsic(x);
819 return;
820 }
821
822 LIRItem value(x->argument_at(0), this);
823
824 bool use_fpu = false;
825 #ifndef _LP64
826 if (UseSSE < 2) {
827 value.set_destroys_register();
828 }
829 #endif // !LP64
830 value.load_item();
831
832 LIR_Opr calc_input = value.result();
833 LIR_Opr calc_result = rlock_result(x);
834
835 LIR_Opr tmp = LIR_OprFact::illegalOpr;
836 #ifdef _LP64
837 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
838 (x->id() == vmIntrinsics::_dabs)) {
839 tmp = new_register(T_DOUBLE);
840 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
841 }
842 #endif
843
844 switch(x->id()) {
845 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, tmp); break;
846 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
847 default: ShouldNotReachHere();
848 }
849
850 if (use_fpu) {
851 __ move(calc_result, x->operand());
852 }
853 }
854
855 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
856 LIRItem value(x->argument_at(0), this);
857 value.set_destroys_register();
858
859 LIR_Opr calc_result = rlock_result(x);
860 LIR_Opr result_reg = result_register_for(x->type());
861
862 CallingConvention* cc = NULL;
863
864 if (x->id() == vmIntrinsics::_dpow) {
865 LIRItem value1(x->argument_at(1), this);
866
867 value1.set_destroys_register();
868
869 BasicTypeList signature(2);
870 signature.append(T_DOUBLE);
871 signature.append(T_DOUBLE);
872 cc = frame_map()->c_calling_convention(&signature);
873 value.load_item_force(cc->at(0));
874 value1.load_item_force(cc->at(1));
875 } else {
876 BasicTypeList signature(1);
877 signature.append(T_DOUBLE);
878 cc = frame_map()->c_calling_convention(&signature);
879 value.load_item_force(cc->at(0));
880 }
881
882 #ifndef _LP64
883 LIR_Opr tmp = FrameMap::fpu0_double_opr;
884 result_reg = tmp;
885 switch(x->id()) {
886 case vmIntrinsics::_dexp:
887 if (StubRoutines::dexp() != NULL) {
888 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
889 } else {
890 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
891 }
892 break;
893 case vmIntrinsics::_dlog:
894 if (StubRoutines::dlog() != NULL) {
895 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
896 } else {
897 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
898 }
899 break;
900 case vmIntrinsics::_dlog10:
901 if (StubRoutines::dlog10() != NULL) {
902 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
903 } else {
904 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
905 }
906 break;
907 case vmIntrinsics::_dpow:
908 if (StubRoutines::dpow() != NULL) {
909 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
910 } else {
911 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
912 }
913 break;
914 case vmIntrinsics::_dsin:
915 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
916 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
917 } else {
918 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
919 }
920 break;
921 case vmIntrinsics::_dcos:
922 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
923 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
924 } else {
925 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
926 }
927 break;
928 case vmIntrinsics::_dtan:
929 if (StubRoutines::dtan() != NULL) {
930 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
931 } else {
932 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
933 }
934 break;
935 default: ShouldNotReachHere();
936 }
937 #else
938 switch (x->id()) {
939 case vmIntrinsics::_dexp:
940 if (StubRoutines::dexp() != NULL) {
941 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
942 } else {
943 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
944 }
945 break;
946 case vmIntrinsics::_dlog:
947 if (StubRoutines::dlog() != NULL) {
948 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
949 } else {
950 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
951 }
952 break;
953 case vmIntrinsics::_dlog10:
954 if (StubRoutines::dlog10() != NULL) {
955 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
956 } else {
957 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
958 }
959 break;
960 case vmIntrinsics::_dpow:
961 if (StubRoutines::dpow() != NULL) {
962 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
963 } else {
964 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
965 }
966 break;
967 case vmIntrinsics::_dsin:
968 if (StubRoutines::dsin() != NULL) {
969 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
970 } else {
971 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
972 }
973 break;
974 case vmIntrinsics::_dcos:
975 if (StubRoutines::dcos() != NULL) {
976 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
977 } else {
978 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
979 }
980 break;
981 case vmIntrinsics::_dtan:
982 if (StubRoutines::dtan() != NULL) {
983 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
984 } else {
985 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
986 }
987 break;
988 default: ShouldNotReachHere();
989 }
990 #endif // _LP64
991 __ move(result_reg, calc_result);
992 }
993
994 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
995 assert(x->number_of_arguments() == 5, "wrong type");
996
997 // Make all state_for calls early since they can emit code
998 CodeEmitInfo* info = state_for(x, x->state());
999
1000 LIRItem src(x->argument_at(0), this);
1001 LIRItem src_pos(x->argument_at(1), this);
1002 LIRItem dst(x->argument_at(2), this);
1003 LIRItem dst_pos(x->argument_at(3), this);
1004 LIRItem length(x->argument_at(4), this);
1005
1006 // operands for arraycopy must use fixed registers, otherwise
1007 // LinearScan will fail allocation (because arraycopy always needs a
1008 // call)
1009
1010 #ifndef _LP64
1011 src.load_item_force (FrameMap::rcx_oop_opr);
1012 src_pos.load_item_force (FrameMap::rdx_opr);
1013 dst.load_item_force (FrameMap::rax_oop_opr);
1014 dst_pos.load_item_force (FrameMap::rbx_opr);
1015 length.load_item_force (FrameMap::rdi_opr);
1016 LIR_Opr tmp = (FrameMap::rsi_opr);
1017 #else
1018
1019 // The java calling convention will give us enough registers
1020 // so that on the stub side the args will be perfect already.
1021 // On the other slow/special case side we call C and the arg
1022 // positions are not similar enough to pick one as the best.
1023 // Also because the java calling convention is a "shifted" version
1024 // of the C convention we can process the java args trivially into C
1025 // args without worry of overwriting during the xfer
1026
1027 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1028 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1029 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1030 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1031 length.load_item_force (FrameMap::as_opr(j_rarg4));
1032
1033 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1034 #endif // LP64
1035
1036 set_no_result(x);
1037
1038 int flags;
1039 ciArrayKlass* expected_type;
1040 arraycopy_helper(x, &flags, &expected_type);
1041
1042 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1043 }
1044
1045 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1046 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1047 // Make all state_for calls early since they can emit code
1048 LIR_Opr result = rlock_result(x);
1049 int flags = 0;
1050 switch (x->id()) {
1051 case vmIntrinsics::_updateCRC32: {
1052 LIRItem crc(x->argument_at(0), this);
1053 LIRItem val(x->argument_at(1), this);
1054 // val is destroyed by update_crc32
1055 val.set_destroys_register();
1056 crc.load_item();
1057 val.load_item();
1058 __ update_crc32(crc.result(), val.result(), result);
1059 break;
1060 }
1061 case vmIntrinsics::_updateBytesCRC32:
1062 case vmIntrinsics::_updateByteBufferCRC32: {
1063 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1064
1065 LIRItem crc(x->argument_at(0), this);
1066 LIRItem buf(x->argument_at(1), this);
1067 LIRItem off(x->argument_at(2), this);
1068 LIRItem len(x->argument_at(3), this);
1069 buf.load_item();
1070 off.load_nonconstant();
1071
1072 LIR_Opr index = off.result();
1073 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1074 if(off.result()->is_constant()) {
1075 index = LIR_OprFact::illegalOpr;
1076 offset += off.result()->as_jint();
1077 }
1078 LIR_Opr base_op = buf.result();
1079
1080 #ifndef _LP64
1081 if (!is_updateBytes) { // long b raw address
1082 base_op = new_register(T_INT);
1083 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1084 }
1085 #else
1086 if (index->is_valid()) {
1087 LIR_Opr tmp = new_register(T_LONG);
1088 __ convert(Bytecodes::_i2l, index, tmp);
1089 index = tmp;
1090 }
1091 #endif
1092
1093 LIR_Address* a = new LIR_Address(base_op,
1094 index,
1095 offset,
1096 T_BYTE);
1097 BasicTypeList signature(3);
1098 signature.append(T_INT);
1099 signature.append(T_ADDRESS);
1100 signature.append(T_INT);
1101 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1102 const LIR_Opr result_reg = result_register_for(x->type());
1103
1104 LIR_Opr addr = new_pointer_register();
1105 __ leal(LIR_OprFact::address(a), addr);
1106
1107 crc.load_item_force(cc->at(0));
1108 __ move(addr, cc->at(1));
1109 len.load_item_force(cc->at(2));
1110
1111 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1112 __ move(result_reg, result);
1113
1114 break;
1115 }
1116 default: {
1117 ShouldNotReachHere();
1118 }
1119 }
1120 }
1121
1122 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1123 Unimplemented();
1124 }
1125
1126 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1127 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1128
1129 // Make all state_for calls early since they can emit code
1130 LIR_Opr result = rlock_result(x);
1131
1132 LIRItem a(x->argument_at(0), this); // Object
1133 LIRItem aOffset(x->argument_at(1), this); // long
1134 LIRItem b(x->argument_at(2), this); // Object
1135 LIRItem bOffset(x->argument_at(3), this); // long
1136 LIRItem length(x->argument_at(4), this); // int
1137 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1138
1139 a.load_item();
1140 aOffset.load_nonconstant();
1141 b.load_item();
1142 bOffset.load_nonconstant();
1143
1144 long constant_aOffset = 0;
1145 LIR_Opr result_aOffset = aOffset.result();
1146 if (result_aOffset->is_constant()) {
1147 constant_aOffset = result_aOffset->as_jlong();
1148 result_aOffset = LIR_OprFact::illegalOpr;
1149 }
1150 LIR_Opr result_a = a.result();
1151
1152 long constant_bOffset = 0;
1153 LIR_Opr result_bOffset = bOffset.result();
1154 if (result_bOffset->is_constant()) {
1155 constant_bOffset = result_bOffset->as_jlong();
1156 result_bOffset = LIR_OprFact::illegalOpr;
1157 }
1158 LIR_Opr result_b = b.result();
1159
1160 #ifndef _LP64
1161 result_a = new_register(T_INT);
1162 __ convert(Bytecodes::_l2i, a.result(), result_a);
1163 result_b = new_register(T_INT);
1164 __ convert(Bytecodes::_l2i, b.result(), result_b);
1165 #endif
1166
1167
1168 LIR_Address* addr_a = new LIR_Address(result_a,
1169 result_aOffset,
1170 constant_aOffset,
1171 T_BYTE);
1172
1173 LIR_Address* addr_b = new LIR_Address(result_b,
1174 result_bOffset,
1175 constant_bOffset,
1176 T_BYTE);
1177
1178 BasicTypeList signature(4);
1179 signature.append(T_ADDRESS);
1180 signature.append(T_ADDRESS);
1181 signature.append(T_INT);
1182 signature.append(T_INT);
1183 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1184 const LIR_Opr result_reg = result_register_for(x->type());
1185
1186 LIR_Opr ptr_addr_a = new_pointer_register();
1187 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1188
1189 LIR_Opr ptr_addr_b = new_pointer_register();
1190 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1191
1192 __ move(ptr_addr_a, cc->at(0));
1193 __ move(ptr_addr_b, cc->at(1));
1194 length.load_item_force(cc->at(2));
1195 log2ArrayIndexScale.load_item_force(cc->at(3));
1196
1197 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1198 __ move(result_reg, result);
1199 }
1200
1201 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1202 // _i2b, _i2c, _i2s
1203 LIR_Opr fixed_register_for(BasicType type) {
1204 switch (type) {
1205 case T_FLOAT: return FrameMap::fpu0_float_opr;
1206 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1207 case T_INT: return FrameMap::rax_opr;
1208 case T_LONG: return FrameMap::long0_opr;
1209 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1210 }
1211 }
1212
1213 void LIRGenerator::do_Convert(Convert* x) {
1214 #ifdef _LP64
1215 LIRItem value(x->value(), this);
1216 value.load_item();
1217 LIR_Opr input = value.result();
1218 LIR_Opr result = rlock(x);
1219 __ convert(x->op(), input, result);
1220 assert(result->is_virtual(), "result must be virtual register");
1221 set_result(x, result);
1222 #else
1223 // flags that vary for the different operations and different SSE-settings
1224 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1225
1226 switch (x->op()) {
1227 case Bytecodes::_i2l: // fall through
1228 case Bytecodes::_l2i: // fall through
1229 case Bytecodes::_i2b: // fall through
1230 case Bytecodes::_i2c: // fall through
1231 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1232
1233 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1234 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1235 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1236 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1237 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1238 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1239 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1240 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1241 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1242 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1243 default: ShouldNotReachHere();
1244 }
1245
1246 LIRItem value(x->value(), this);
1247 value.load_item();
1248 LIR_Opr input = value.result();
1249 LIR_Opr result = rlock(x);
1250
1251 // arguments of lir_convert
1252 LIR_Opr conv_input = input;
1253 LIR_Opr conv_result = result;
1254 ConversionStub* stub = NULL;
1255
1256 if (fixed_input) {
1257 conv_input = fixed_register_for(input->type());
1258 __ move(input, conv_input);
1259 }
1260
1261 assert(fixed_result == false || round_result == false, "cannot set both");
1262 if (fixed_result) {
1263 conv_result = fixed_register_for(result->type());
1264 } else if (round_result) {
1265 result = new_register(result->type());
1266 set_vreg_flag(result, must_start_in_memory);
1267 }
1268
1269 if (needs_stub) {
1270 stub = new ConversionStub(x->op(), conv_input, conv_result);
1271 }
1272
1273 __ convert(x->op(), conv_input, conv_result, stub);
1274
1275 if (result != conv_result) {
1276 __ move(conv_result, result);
1277 }
1278
1279 assert(result->is_virtual(), "result must be virtual register");
1280 set_result(x, result);
1281 #endif // _LP64
1282 }
1283
1284
1285 void LIRGenerator::do_NewInstance(NewInstance* x) {
1286 print_if_not_loaded(x);
1287
1288 CodeEmitInfo* info = state_for(x, x->state());
1289 LIR_Opr reg = result_register_for(x->type());
1290 new_instance(reg, x->klass(), x->is_unresolved(),
1291 FrameMap::rcx_oop_opr,
1292 FrameMap::rdi_oop_opr,
1293 FrameMap::rsi_oop_opr,
1294 LIR_OprFact::illegalOpr,
1295 FrameMap::rdx_metadata_opr, info);
1296 LIR_Opr result = rlock_result(x);
1297 __ move(reg, result);
1298 }
1299
1300
1301 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1302 CodeEmitInfo* info = state_for(x, x->state());
1303
1304 LIRItem length(x->length(), this);
1305 length.load_item_force(FrameMap::rbx_opr);
1306
1307 LIR_Opr reg = result_register_for(x->type());
1308 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1309 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1310 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1311 LIR_Opr tmp4 = reg;
1312 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1313 LIR_Opr len = length.result();
1314 BasicType elem_type = x->elt_type();
1315
1316 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1317
1318 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1319 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1320
1321 LIR_Opr result = rlock_result(x);
1322 __ move(reg, result);
1323 }
1324
1325
1326 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1327 LIRItem length(x->length(), this);
1328 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1329 // and therefore provide the state before the parameters have been consumed
1330 CodeEmitInfo* patching_info = NULL;
1331 if (!x->klass()->is_loaded() || PatchALot) {
1332 patching_info = state_for(x, x->state_before());
1333 }
1334
1335 CodeEmitInfo* info = state_for(x, x->state());
1336
1337 const LIR_Opr reg = result_register_for(x->type());
1338 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1339 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1340 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1341 LIR_Opr tmp4 = reg;
1342 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1343
1344 length.load_item_force(FrameMap::rbx_opr);
1345 LIR_Opr len = length.result();
1346
1347 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1348 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1349 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1350 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1351 }
1352 klass2reg_with_patching(klass_reg, obj, patching_info);
1353 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1354
1355 LIR_Opr result = rlock_result(x);
1356 __ move(reg, result);
1357 }
1358
1359
1360 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1361 Values* dims = x->dims();
1362 int i = dims->length();
1363 LIRItemList* items = new LIRItemList(i, i, NULL);
1364 while (i-- > 0) {
1365 LIRItem* size = new LIRItem(dims->at(i), this);
1366 items->at_put(i, size);
1367 }
1368
1369 // Evaluate state_for early since it may emit code.
1370 CodeEmitInfo* patching_info = NULL;
1371 if (!x->klass()->is_loaded() || PatchALot) {
1372 patching_info = state_for(x, x->state_before());
1373
1374 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1375 // clone all handlers (NOTE: Usually this is handled transparently
1376 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1377 // is done explicitly here because a stub isn't being used).
1378 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1379 }
1380 CodeEmitInfo* info = state_for(x, x->state());
1381
1382 i = dims->length();
1383 while (i-- > 0) {
1384 LIRItem* size = items->at(i);
1385 size->load_nonconstant();
1386
1387 store_stack_parameter(size->result(), in_ByteSize(i*4));
1388 }
1389
1390 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1391 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1392
1393 LIR_Opr rank = FrameMap::rbx_opr;
1394 __ move(LIR_OprFact::intConst(x->rank()), rank);
1395 LIR_Opr varargs = FrameMap::rcx_opr;
1396 __ move(FrameMap::rsp_opr, varargs);
1397 LIR_OprList* args = new LIR_OprList(3);
1398 args->append(klass_reg);
1399 args->append(rank);
1400 args->append(varargs);
1401 LIR_Opr reg = result_register_for(x->type());
1402 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1403 LIR_OprFact::illegalOpr,
1404 reg, args, info);
1405
1406 LIR_Opr result = rlock_result(x);
1407 __ move(reg, result);
1408 }
1409
1410
1411 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1412 // nothing to do for now
1413 }
1414
1415
1416 void LIRGenerator::do_CheckCast(CheckCast* x) {
1417 LIRItem obj(x->obj(), this);
1418
1419 CodeEmitInfo* patching_info = NULL;
1420 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1421 // must do this before locking the destination register as an oop register,
1422 // and before the obj is loaded (the latter is for deoptimization)
1423 patching_info = state_for(x, x->state_before());
1424 }
1425 obj.load_item();
1426
1427 // info for exceptions
1428 CodeEmitInfo* info_for_exception =
1429 (x->needs_exception_state() ? state_for(x) :
1430 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1431
1432 CodeStub* stub;
1433 if (x->is_incompatible_class_change_check()) {
1434 assert(patching_info == NULL, "can't patch this");
1435 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1436 } else if (x->is_invokespecial_receiver_check()) {
1437 assert(patching_info == NULL, "can't patch this");
1438 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1439 } else {
1440 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1441 }
1442 LIR_Opr reg = rlock_result(x);
1443 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1444 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1445 tmp3 = new_register(objectType);
1446 }
1447 __ checkcast(reg, obj.result(), x->klass(),
1448 new_register(objectType), new_register(objectType), tmp3,
1449 x->direct_compare(), info_for_exception, patching_info, stub,
1450 x->profiled_method(), x->profiled_bci());
1451 }
1452
1453
1454 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1455 LIRItem obj(x->obj(), this);
1456
1457 // result and test object may not be in same register
1458 LIR_Opr reg = rlock_result(x);
1459 CodeEmitInfo* patching_info = NULL;
1460 if ((!x->klass()->is_loaded() || PatchALot)) {
1461 // must do this before locking the destination register as an oop register
1462 patching_info = state_for(x, x->state_before());
1463 }
1464 obj.load_item();
1465 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1466 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1467 tmp3 = new_register(objectType);
1468 }
1469 __ instanceof(reg, obj.result(), x->klass(),
1470 new_register(objectType), new_register(objectType), tmp3,
1471 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1472 }
1473
1474
1475 void LIRGenerator::do_If(If* x) {
1476 assert(x->number_of_sux() == 2, "inconsistency");
1477 ValueTag tag = x->x()->type()->tag();
1478 bool is_safepoint = x->is_safepoint();
1479
1480 If::Condition cond = x->cond();
1481
1482 LIRItem xitem(x->x(), this);
1483 LIRItem yitem(x->y(), this);
1484 LIRItem* xin = &xitem;
1485 LIRItem* yin = &yitem;
1486
1487 if (tag == longTag) {
1488 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1489 // mirror for other conditions
1490 if (cond == If::gtr || cond == If::leq) {
1491 cond = Instruction::mirror(cond);
1492 xin = &yitem;
1493 yin = &xitem;
1494 }
1495 xin->set_destroys_register();
1496 }
1497 xin->load_item();
1498 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1499 // inline long zero
1500 yin->dont_load_item();
1501 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1502 // longs cannot handle constants at right side
1503 yin->load_item();
1504 } else {
1505 yin->dont_load_item();
1506 }
1507
1508 LIR_Opr left = xin->result();
1509 LIR_Opr right = yin->result();
1510
1511 set_no_result(x);
1512
1513 // add safepoint before generating condition code so it can be recomputed
1514 if (x->is_safepoint()) {
1515 // increment backedge counter if needed
1516 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1517 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1518 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1519 }
1520
1521 __ cmp(lir_cond(cond), left, right);
1522 // Generate branch profiling. Profiling code doesn't kill flags.
1523 profile_branch(x, cond);
1524 move_to_phi(x->state());
1525 if (x->x()->type()->is_float_kind()) {
1526 __ branch(lir_cond(cond), x->tsux(), x->usux());
1527 } else {
1528 __ branch(lir_cond(cond), x->tsux());
1529 }
1530 assert(x->default_sux() == x->fsux(), "wrong destination above");
1531 __ jump(x->default_sux());
1532 }
1533
1534
1535 LIR_Opr LIRGenerator::getThreadPointer() {
1536 #ifdef _LP64
1537 return FrameMap::as_pointer_opr(r15_thread);
1538 #else
1539 LIR_Opr result = new_register(T_INT);
1540 __ get_thread(result);
1541 return result;
1542 #endif //
1543 }
1544
1545 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1546 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1547 LIR_OprList* args = new LIR_OprList();
1548 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1549 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1550 }
1551
1552
1553 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1554 CodeEmitInfo* info) {
1555 if (address->type() == T_LONG) {
1556 address = new LIR_Address(address->base(),
1557 address->index(), address->scale(),
1558 address->disp(), T_DOUBLE);
1559 // Transfer the value atomically by using FP moves. This means
1560 // the value has to be moved between CPU and FPU registers. It
1561 // always has to be moved through spill slot since there's no
1562 // quick way to pack the value into an SSE register.
1563 LIR_Opr temp_double = new_register(T_DOUBLE);
1564 LIR_Opr spill = new_register(T_LONG);
1565 set_vreg_flag(spill, must_start_in_memory);
1566 __ move(value, spill);
1567 __ volatile_move(spill, temp_double, T_LONG);
1568 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1569 } else {
1570 __ store(value, address, info);
1571 }
1572 }
1573
1574 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1575 CodeEmitInfo* info) {
1576 if (address->type() == T_LONG) {
1577 address = new LIR_Address(address->base(),
1578 address->index(), address->scale(),
1579 address->disp(), T_DOUBLE);
1580 // Transfer the value atomically by using FP moves. This means
1581 // the value has to be moved between CPU and FPU registers. In
1582 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1583 // SSE2+ mode it can be moved directly.
1584 LIR_Opr temp_double = new_register(T_DOUBLE);
1585 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1586 __ volatile_move(temp_double, result, T_LONG);
1587 #ifndef _LP64
1588 if (UseSSE < 2) {
1589 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1590 set_vreg_flag(result, must_start_in_memory);
1591 }
1592 #endif // !LP64
1593 } else {
1594 __ load(address, result, info);
1595 }
1596 }