1 /*
2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/nativeInst.hpp"
31 #include "code/vtableStubs.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/gcLocker.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "logging/log.hpp"
38 #include "memory/resourceArea.hpp"
39 #include "oops/compiledICHolder.hpp"
40 #include "oops/klass.inline.hpp"
41 #include "prims/methodHandles.hpp"
42 #include "runtime/jniHandles.hpp"
43 #include "runtime/safepointMechanism.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "runtime/vm_version.hpp"
49 #include "utilities/align.hpp"
50 #include "vmreg_x86.inline.hpp"
51 #ifdef COMPILER1
52 #include "c1/c1_Runtime1.hpp"
53 #endif
54 #ifdef COMPILER2
55 #include "opto/runtime.hpp"
56 #endif
57
58 #define __ masm->
59
60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
61
62 class RegisterSaver {
63 // Capture info about frame layout
64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
65 enum layout {
66 fpu_state_off = 0,
67 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
68 st0_off, st0H_off,
69 st1_off, st1H_off,
70 st2_off, st2H_off,
71 st3_off, st3H_off,
72 st4_off, st4H_off,
73 st5_off, st5H_off,
74 st6_off, st6H_off,
75 st7_off, st7H_off,
76 xmm_off,
77 DEF_XMM_OFFS(0),
78 DEF_XMM_OFFS(1),
79 DEF_XMM_OFFS(2),
80 DEF_XMM_OFFS(3),
81 DEF_XMM_OFFS(4),
82 DEF_XMM_OFFS(5),
83 DEF_XMM_OFFS(6),
84 DEF_XMM_OFFS(7),
85 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
86 rdi_off,
87 rsi_off,
88 ignore_off, // extra copy of rbp,
89 rsp_off,
90 rbx_off,
91 rdx_off,
92 rcx_off,
93 rax_off,
94 // The frame sender code expects that rbp will be in the "natural" place and
95 // will override any oopMap setting for it. We must therefore force the layout
96 // so that it agrees with the frame sender code.
97 rbp_off,
98 return_off, // slot for return address
99 reg_save_size };
100 enum { FPU_regs_live = flags_off - fpu_state_end };
101
102 public:
103
104 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
105 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
106 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
107
108 static int rax_offset() { return rax_off; }
109 static int rbx_offset() { return rbx_off; }
110
111 // Offsets into the register save area
112 // Used by deoptimization when it is managing result register
113 // values on its own
114
115 static int raxOffset(void) { return rax_off; }
116 static int rdxOffset(void) { return rdx_off; }
117 static int rbxOffset(void) { return rbx_off; }
118 static int xmm0Offset(void) { return xmm0_off; }
119 // This really returns a slot in the fp save area, which one is not important
120 static int fpResultOffset(void) { return st0_off; }
121
122 // During deoptimization only the result register need to be restored
123 // all the other values have already been extracted.
124
125 static void restore_result_registers(MacroAssembler* masm);
126
127 };
128
129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
130 int* total_frame_words, bool verify_fpu, bool save_vectors) {
131 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
132 int ymm_bytes = num_xmm_regs * 16;
133 int zmm_bytes = num_xmm_regs * 32;
134 #ifdef COMPILER2
135 int opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
136 if (save_vectors) {
137 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
138 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
139 // Save upper half of YMM registers
140 int vect_bytes = ymm_bytes;
141 if (UseAVX > 2) {
142 // Save upper half of ZMM registers as well
143 vect_bytes += zmm_bytes;
144 additional_frame_words += opmask_state_bytes / wordSize;
145 }
146 additional_frame_words += vect_bytes / wordSize;
147 }
148 #else
149 assert(!save_vectors, "vectors are generated only by C2");
150 #endif
151 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
152 int frame_words = frame_size_in_bytes / wordSize;
153 *total_frame_words = frame_words;
154
155 assert(FPUStateSizeInWords == 27, "update stack layout");
156
157 // save registers, fpu state, and flags
158 // We assume caller has already has return address slot on the stack
159 // We push epb twice in this sequence because we want the real rbp,
160 // to be under the return like a normal enter and we want to use pusha
161 // We push by hand instead of using push.
162 __ enter();
163 __ pusha();
164 __ pushf();
165 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
166 __ push_FPU_state(); // Save FPU state & init
167
168 if (verify_fpu) {
169 // Some stubs may have non standard FPU control word settings so
170 // only check and reset the value when it required to be the
171 // standard value. The safepoint blob in particular can be used
172 // in methods which are using the 24 bit control word for
173 // optimized float math.
174
175 #ifdef ASSERT
176 // Make sure the control word has the expected value
177 Label ok;
178 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
179 __ jccb(Assembler::equal, ok);
180 __ stop("corrupted control word detected");
181 __ bind(ok);
182 #endif
183
184 // Reset the control word to guard against exceptions being unmasked
185 // since fstp_d can cause FPU stack underflow exceptions. Write it
186 // into the on stack copy and then reload that to make sure that the
187 // current and future values are correct.
188 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
189 }
190
191 __ frstor(Address(rsp, 0));
192 if (!verify_fpu) {
193 // Set the control word so that exceptions are masked for the
194 // following code.
195 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
196 }
197
198 int off = st0_off;
199 int delta = st1_off - off;
200
201 // Save the FPU registers in de-opt-able form
202 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
203 __ fstp_d(Address(rsp, off*wordSize));
204 off += delta;
205 }
206
207 off = xmm0_off;
208 delta = xmm1_off - off;
209 if(UseSSE == 1) {
210 // Save the XMM state
211 for (int n = 0; n < num_xmm_regs; n++) {
212 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
213 off += delta;
214 }
215 } else if(UseSSE >= 2) {
216 // Save whole 128bit (16 bytes) XMM registers
217 for (int n = 0; n < num_xmm_regs; n++) {
218 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
219 off += delta;
220 }
221 }
222
223 #ifdef COMPILER2
224 if (save_vectors) {
225 __ subptr(rsp, ymm_bytes);
226 // Save upper half of YMM registers
227 for (int n = 0; n < num_xmm_regs; n++) {
228 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
229 }
230 if (UseAVX > 2) {
231 __ subptr(rsp, zmm_bytes);
232 // Save upper half of ZMM registers
233 for (int n = 0; n < num_xmm_regs; n++) {
234 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
235 }
236 __ subptr(rsp, opmask_state_bytes);
237 // Save opmask registers
238 for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
239 __ kmov(Address(rsp, n*8), as_KRegister(n));
240 }
241 }
242 }
243 #else
244 assert(!save_vectors, "vectors are generated only by C2");
245 #endif
246
247 __ vzeroupper();
248
249 // Set an oopmap for the call site. This oopmap will map all
250 // oop-registers and debug-info registers as callee-saved. This
251 // will allow deoptimization at this safepoint to find all possible
252 // debug-info recordings, as well as let GC find all oops.
253
254 OopMapSet *oop_maps = new OopMapSet();
255 OopMap* map = new OopMap( frame_words, 0 );
256
257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
258 #define NEXTREG(x) (x)->as_VMReg()->next()
259
260 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
261 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
262 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
263 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
264 // rbp, location is known implicitly, no oopMap
265 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
266 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
267
268 // %%% This is really a waste but we'll keep things as they were for now for the upper component
269 off = st0_off;
270 delta = st1_off - off;
271 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
272 FloatRegister freg_name = as_FloatRegister(n);
273 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
274 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
275 off += delta;
276 }
277 off = xmm0_off;
278 delta = xmm1_off - off;
279 for (int n = 0; n < num_xmm_regs; n++) {
280 XMMRegister xmm_name = as_XMMRegister(n);
281 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
282 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
283 off += delta;
284 }
285 #undef NEXTREG
286 #undef STACK_OFFSET
287
288 return map;
289 }
290
291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
292 int opmask_state_bytes = 0;
293 int additional_frame_bytes = 0;
294 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
295 int ymm_bytes = num_xmm_regs * 16;
296 int zmm_bytes = num_xmm_regs * 32;
297 // Recover XMM & FPU state
298 #ifdef COMPILER2
299 if (restore_vectors) {
300 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
301 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
302 // Save upper half of YMM registers
303 additional_frame_bytes = ymm_bytes;
304 if (UseAVX > 2) {
305 // Save upper half of ZMM registers as well
306 additional_frame_bytes += zmm_bytes;
307 opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
308 additional_frame_bytes += opmask_state_bytes;
309 }
310 }
311 #else
312 assert(!restore_vectors, "vectors are generated only by C2");
313 #endif
314
315 int off = xmm0_off;
316 int delta = xmm1_off - off;
317
318 __ vzeroupper();
319
320 if (UseSSE == 1) {
321 // Restore XMM registers
322 assert(additional_frame_bytes == 0, "");
323 for (int n = 0; n < num_xmm_regs; n++) {
324 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
325 off += delta;
326 }
327 } else if (UseSSE >= 2) {
328 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
329 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
330 for (int n = 0; n < num_xmm_regs; n++) {
331 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
332 off += delta;
333 }
334 }
335
336 if (restore_vectors) {
337 off = additional_frame_bytes - ymm_bytes;
338 // Restore upper half of YMM registers.
339 for (int n = 0; n < num_xmm_regs; n++) {
340 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
341 }
342 if (UseAVX > 2) {
343 // Restore upper half of ZMM registers.
344 off = opmask_state_bytes;
345 for (int n = 0; n < num_xmm_regs; n++) {
346 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
347 }
348 for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
349 __ kmov(as_KRegister(n), Address(rsp, n*8));
350 }
351 }
352 __ addptr(rsp, additional_frame_bytes);
353 }
354
355 __ pop_FPU_state();
356 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
357
358 __ popf();
359 __ popa();
360 // Get the rbp, described implicitly by the frame sender code (no oopMap)
361 __ pop(rbp);
362 }
363
364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
365
366 // Just restore result register. Only used by deoptimization. By
367 // now any callee save register that needs to be restore to a c2
368 // caller of the deoptee has been extracted into the vframeArray
369 // and will be stuffed into the c2i adapter we create for later
370 // restoration so only result registers need to be restored here.
371 //
372
373 __ frstor(Address(rsp, 0)); // Restore fpu state
374
375 // Recover XMM & FPU state
376 if( UseSSE == 1 ) {
377 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
378 } else if( UseSSE >= 2 ) {
379 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
380 }
381 __ movptr(rax, Address(rsp, rax_off*wordSize));
382 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
383 // Pop all of the register save are off the stack except the return address
384 __ addptr(rsp, return_off * wordSize);
385 }
386
387 // Is vector's size (in bytes) bigger than a size saved by default?
388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
390 bool SharedRuntime::is_wide_vector(int size) {
391 return size > 16;
392 }
393
394 // The java_calling_convention describes stack locations as ideal slots on
395 // a frame with no abi restrictions. Since we must observe abi restrictions
396 // (like the placement of the register window) the slots must be biased by
397 // the following value.
398 static int reg2offset_in(VMReg r) {
399 // Account for saved rbp, and return address
400 // This should really be in_preserve_stack_slots
401 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
402 }
403
404 static int reg2offset_out(VMReg r) {
405 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
406 }
407
408 // ---------------------------------------------------------------------------
409 // Read the array of BasicTypes from a signature, and compute where the
410 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
411 // quantities. Values less than SharedInfo::stack0 are registers, those above
412 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
413 // as framesizes are fixed.
414 // VMRegImpl::stack0 refers to the first slot 0(sp).
415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
416 // up to RegisterImpl::number_of_registers) are the 32-bit
417 // integer registers.
418
419 // Pass first two oop/int args in registers ECX and EDX.
420 // Pass first two float/double args in registers XMM0 and XMM1.
421 // Doubles have precedence, so if you pass a mix of floats and doubles
422 // the doubles will grab the registers before the floats will.
423
424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
425 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
426 // units regardless of build. Of course for i486 there is no 64 bit build
427
428
429 // ---------------------------------------------------------------------------
430 // The compiled Java calling convention.
431 // Pass first two oop/int args in registers ECX and EDX.
432 // Pass first two float/double args in registers XMM0 and XMM1.
433 // Doubles have precedence, so if you pass a mix of floats and doubles
434 // the doubles will grab the registers before the floats will.
435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
436 VMRegPair *regs,
437 int total_args_passed) {
438 uint stack = 0; // Starting stack position for args on stack
439
440
441 // Pass first two oop/int args in registers ECX and EDX.
442 uint reg_arg0 = 9999;
443 uint reg_arg1 = 9999;
444
445 // Pass first two float/double args in registers XMM0 and XMM1.
446 // Doubles have precedence, so if you pass a mix of floats and doubles
447 // the doubles will grab the registers before the floats will.
448 // CNC - TURNED OFF FOR non-SSE.
449 // On Intel we have to round all doubles (and most floats) at
450 // call sites by storing to the stack in any case.
451 // UseSSE=0 ==> Don't Use ==> 9999+0
452 // UseSSE=1 ==> Floats only ==> 9999+1
453 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
454 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
455 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
456 uint freg_arg0 = 9999+fargs;
457 uint freg_arg1 = 9999+fargs;
458
459 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
460 int i;
461 for( i = 0; i < total_args_passed; i++) {
462 if( sig_bt[i] == T_DOUBLE ) {
463 // first 2 doubles go in registers
464 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
465 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
466 else // Else double is passed low on the stack to be aligned.
467 stack += 2;
468 } else if( sig_bt[i] == T_LONG ) {
469 stack += 2;
470 }
471 }
472 int dstack = 0; // Separate counter for placing doubles
473
474 // Now pick where all else goes.
475 for( i = 0; i < total_args_passed; i++) {
476 // From the type and the argument number (count) compute the location
477 switch( sig_bt[i] ) {
478 case T_SHORT:
479 case T_CHAR:
480 case T_BYTE:
481 case T_BOOLEAN:
482 case T_INT:
483 case T_ARRAY:
484 case T_OBJECT:
485 case T_ADDRESS:
486 if( reg_arg0 == 9999 ) {
487 reg_arg0 = i;
488 regs[i].set1(rcx->as_VMReg());
489 } else if( reg_arg1 == 9999 ) {
490 reg_arg1 = i;
491 regs[i].set1(rdx->as_VMReg());
492 } else {
493 regs[i].set1(VMRegImpl::stack2reg(stack++));
494 }
495 break;
496 case T_FLOAT:
497 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
498 freg_arg0 = i;
499 regs[i].set1(xmm0->as_VMReg());
500 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
501 freg_arg1 = i;
502 regs[i].set1(xmm1->as_VMReg());
503 } else {
504 regs[i].set1(VMRegImpl::stack2reg(stack++));
505 }
506 break;
507 case T_LONG:
508 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
509 regs[i].set2(VMRegImpl::stack2reg(dstack));
510 dstack += 2;
511 break;
512 case T_DOUBLE:
513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
514 if( freg_arg0 == (uint)i ) {
515 regs[i].set2(xmm0->as_VMReg());
516 } else if( freg_arg1 == (uint)i ) {
517 regs[i].set2(xmm1->as_VMReg());
518 } else {
519 regs[i].set2(VMRegImpl::stack2reg(dstack));
520 dstack += 2;
521 }
522 break;
523 case T_VOID: regs[i].set_bad(); break;
524 break;
525 default:
526 ShouldNotReachHere();
527 break;
528 }
529 }
530
531 // return value can be odd number of VMRegImpl stack slots make multiple of 2
532 return align_up(stack, 2);
533 }
534
535 // Patch the callers callsite with entry to compiled code if it exists.
536 static void patch_callers_callsite(MacroAssembler *masm) {
537 Label L;
538 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
539 __ jcc(Assembler::equal, L);
540 // Schedule the branch target address early.
541 // Call into the VM to patch the caller, then jump to compiled callee
542 // rax, isn't live so capture return address while we easily can
543 __ movptr(rax, Address(rsp, 0));
544 __ pusha();
545 __ pushf();
546
547 if (UseSSE == 1) {
548 __ subptr(rsp, 2*wordSize);
549 __ movflt(Address(rsp, 0), xmm0);
550 __ movflt(Address(rsp, wordSize), xmm1);
551 }
552 if (UseSSE >= 2) {
553 __ subptr(rsp, 4*wordSize);
554 __ movdbl(Address(rsp, 0), xmm0);
555 __ movdbl(Address(rsp, 2*wordSize), xmm1);
556 }
557 #ifdef COMPILER2
558 // C2 may leave the stack dirty if not in SSE2+ mode
559 if (UseSSE >= 2) {
560 __ verify_FPU(0, "c2i transition should have clean FPU stack");
561 } else {
562 __ empty_FPU_stack();
563 }
564 #endif /* COMPILER2 */
565
566 // VM needs caller's callsite
567 __ push(rax);
568 // VM needs target method
569 __ push(rbx);
570 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
571 __ addptr(rsp, 2*wordSize);
572
573 if (UseSSE == 1) {
574 __ movflt(xmm0, Address(rsp, 0));
575 __ movflt(xmm1, Address(rsp, wordSize));
576 __ addptr(rsp, 2*wordSize);
577 }
578 if (UseSSE >= 2) {
579 __ movdbl(xmm0, Address(rsp, 0));
580 __ movdbl(xmm1, Address(rsp, 2*wordSize));
581 __ addptr(rsp, 4*wordSize);
582 }
583
584 __ popf();
585 __ popa();
586 __ bind(L);
587 }
588
589
590 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
591 int next_off = st_off - Interpreter::stackElementSize;
592 __ movdbl(Address(rsp, next_off), r);
593 }
594
595 static void gen_c2i_adapter(MacroAssembler *masm,
596 int total_args_passed,
597 int comp_args_on_stack,
598 const BasicType *sig_bt,
599 const VMRegPair *regs,
600 Label& skip_fixup) {
601 // Before we get into the guts of the C2I adapter, see if we should be here
602 // at all. We've come from compiled code and are attempting to jump to the
603 // interpreter, which means the caller made a static call to get here
604 // (vcalls always get a compiled target if there is one). Check for a
605 // compiled target. If there is one, we need to patch the caller's call.
606 patch_callers_callsite(masm);
607
608 __ bind(skip_fixup);
609
610 #ifdef COMPILER2
611 // C2 may leave the stack dirty if not in SSE2+ mode
612 if (UseSSE >= 2) {
613 __ verify_FPU(0, "c2i transition should have clean FPU stack");
614 } else {
615 __ empty_FPU_stack();
616 }
617 #endif /* COMPILER2 */
618
619 // Since all args are passed on the stack, total_args_passed * interpreter_
620 // stack_element_size is the
621 // space we need.
622 int extraspace = total_args_passed * Interpreter::stackElementSize;
623
624 // Get return address
625 __ pop(rax);
626
627 // set senderSP value
628 __ movptr(rsi, rsp);
629
630 __ subptr(rsp, extraspace);
631
632 // Now write the args into the outgoing interpreter space
633 for (int i = 0; i < total_args_passed; i++) {
634 if (sig_bt[i] == T_VOID) {
635 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
636 continue;
637 }
638
639 // st_off points to lowest address on stack.
640 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
641 int next_off = st_off - Interpreter::stackElementSize;
642
643 // Say 4 args:
644 // i st_off
645 // 0 12 T_LONG
646 // 1 8 T_VOID
647 // 2 4 T_OBJECT
648 // 3 0 T_BOOL
649 VMReg r_1 = regs[i].first();
650 VMReg r_2 = regs[i].second();
651 if (!r_1->is_valid()) {
652 assert(!r_2->is_valid(), "");
653 continue;
654 }
655
656 if (r_1->is_stack()) {
657 // memory to memory use fpu stack top
658 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
659
660 if (!r_2->is_valid()) {
661 __ movl(rdi, Address(rsp, ld_off));
662 __ movptr(Address(rsp, st_off), rdi);
663 } else {
664
665 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
666 // st_off == MSW, st_off-wordSize == LSW
667
668 __ movptr(rdi, Address(rsp, ld_off));
669 __ movptr(Address(rsp, next_off), rdi);
670 #ifndef _LP64
671 __ movptr(rdi, Address(rsp, ld_off + wordSize));
672 __ movptr(Address(rsp, st_off), rdi);
673 #else
674 #ifdef ASSERT
675 // Overwrite the unused slot with known junk
676 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
677 __ movptr(Address(rsp, st_off), rax);
678 #endif /* ASSERT */
679 #endif // _LP64
680 }
681 } else if (r_1->is_Register()) {
682 Register r = r_1->as_Register();
683 if (!r_2->is_valid()) {
684 __ movl(Address(rsp, st_off), r);
685 } else {
686 // long/double in gpr
687 NOT_LP64(ShouldNotReachHere());
688 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
689 // T_DOUBLE and T_LONG use two slots in the interpreter
690 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
691 // long/double in gpr
692 #ifdef ASSERT
693 // Overwrite the unused slot with known junk
694 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
695 __ movptr(Address(rsp, st_off), rax);
696 #endif /* ASSERT */
697 __ movptr(Address(rsp, next_off), r);
698 } else {
699 __ movptr(Address(rsp, st_off), r);
700 }
701 }
702 } else {
703 assert(r_1->is_XMMRegister(), "");
704 if (!r_2->is_valid()) {
705 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
706 } else {
707 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
708 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
709 }
710 }
711 }
712
713 // Schedule the branch target address early.
714 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
715 // And repush original return address
716 __ push(rax);
717 __ jmp(rcx);
718 }
719
720
721 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
722 int next_val_off = ld_off - Interpreter::stackElementSize;
723 __ movdbl(r, Address(saved_sp, next_val_off));
724 }
725
726 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
727 address code_start, address code_end,
728 Label& L_ok) {
729 Label L_fail;
730 __ lea(temp_reg, ExternalAddress(code_start));
731 __ cmpptr(pc_reg, temp_reg);
732 __ jcc(Assembler::belowEqual, L_fail);
733 __ lea(temp_reg, ExternalAddress(code_end));
734 __ cmpptr(pc_reg, temp_reg);
735 __ jcc(Assembler::below, L_ok);
736 __ bind(L_fail);
737 }
738
739 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
740 int total_args_passed,
741 int comp_args_on_stack,
742 const BasicType *sig_bt,
743 const VMRegPair *regs) {
744 // Note: rsi contains the senderSP on entry. We must preserve it since
745 // we may do a i2c -> c2i transition if we lose a race where compiled
746 // code goes non-entrant while we get args ready.
747
748 // Adapters can be frameless because they do not require the caller
749 // to perform additional cleanup work, such as correcting the stack pointer.
750 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
751 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
752 // even if a callee has modified the stack pointer.
753 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
754 // routinely repairs its caller's stack pointer (from sender_sp, which is set
755 // up via the senderSP register).
756 // In other words, if *either* the caller or callee is interpreted, we can
757 // get the stack pointer repaired after a call.
758 // This is why c2i and i2c adapters cannot be indefinitely composed.
759 // In particular, if a c2i adapter were to somehow call an i2c adapter,
760 // both caller and callee would be compiled methods, and neither would
761 // clean up the stack pointer changes performed by the two adapters.
762 // If this happens, control eventually transfers back to the compiled
763 // caller, but with an uncorrected stack, causing delayed havoc.
764
765 // Pick up the return address
766 __ movptr(rax, Address(rsp, 0));
767
768 if (VerifyAdapterCalls &&
769 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
770 // So, let's test for cascading c2i/i2c adapters right now.
771 // assert(Interpreter::contains($return_addr) ||
772 // StubRoutines::contains($return_addr),
773 // "i2c adapter must return to an interpreter frame");
774 __ block_comment("verify_i2c { ");
775 Label L_ok;
776 if (Interpreter::code() != NULL)
777 range_check(masm, rax, rdi,
778 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
779 L_ok);
780 if (StubRoutines::code1() != NULL)
781 range_check(masm, rax, rdi,
782 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
783 L_ok);
784 if (StubRoutines::code2() != NULL)
785 range_check(masm, rax, rdi,
786 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
787 L_ok);
788 const char* msg = "i2c adapter must return to an interpreter frame";
789 __ block_comment(msg);
790 __ stop(msg);
791 __ bind(L_ok);
792 __ block_comment("} verify_i2ce ");
793 }
794
795 // Must preserve original SP for loading incoming arguments because
796 // we need to align the outgoing SP for compiled code.
797 __ movptr(rdi, rsp);
798
799 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
800 // in registers, we will occasionally have no stack args.
801 int comp_words_on_stack = 0;
802 if (comp_args_on_stack) {
803 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
804 // registers are below. By subtracting stack0, we either get a negative
805 // number (all values in registers) or the maximum stack slot accessed.
806 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
807 // Convert 4-byte stack slots to words.
808 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
809 // Round up to miminum stack alignment, in wordSize
810 comp_words_on_stack = align_up(comp_words_on_stack, 2);
811 __ subptr(rsp, comp_words_on_stack * wordSize);
812 }
813
814 // Align the outgoing SP
815 __ andptr(rsp, -(StackAlignmentInBytes));
816
817 // push the return address on the stack (note that pushing, rather
818 // than storing it, yields the correct frame alignment for the callee)
819 __ push(rax);
820
821 // Put saved SP in another register
822 const Register saved_sp = rax;
823 __ movptr(saved_sp, rdi);
824
825
826 // Will jump to the compiled code just as if compiled code was doing it.
827 // Pre-load the register-jump target early, to schedule it better.
828 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
829
830 // Now generate the shuffle code. Pick up all register args and move the
831 // rest through the floating point stack top.
832 for (int i = 0; i < total_args_passed; i++) {
833 if (sig_bt[i] == T_VOID) {
834 // Longs and doubles are passed in native word order, but misaligned
835 // in the 32-bit build.
836 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
837 continue;
838 }
839
840 // Pick up 0, 1 or 2 words from SP+offset.
841
842 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
843 "scrambled load targets?");
844 // Load in argument order going down.
845 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
846 // Point to interpreter value (vs. tag)
847 int next_off = ld_off - Interpreter::stackElementSize;
848 //
849 //
850 //
851 VMReg r_1 = regs[i].first();
852 VMReg r_2 = regs[i].second();
853 if (!r_1->is_valid()) {
854 assert(!r_2->is_valid(), "");
855 continue;
856 }
857 if (r_1->is_stack()) {
858 // Convert stack slot to an SP offset (+ wordSize to account for return address )
859 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
860
861 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
862 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
863 // we be generated.
864 if (!r_2->is_valid()) {
865 // __ fld_s(Address(saved_sp, ld_off));
866 // __ fstp_s(Address(rsp, st_off));
867 __ movl(rsi, Address(saved_sp, ld_off));
868 __ movptr(Address(rsp, st_off), rsi);
869 } else {
870 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
871 // are accessed as negative so LSW is at LOW address
872
873 // ld_off is MSW so get LSW
874 // st_off is LSW (i.e. reg.first())
875 // __ fld_d(Address(saved_sp, next_off));
876 // __ fstp_d(Address(rsp, st_off));
877 //
878 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
879 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
880 // So we must adjust where to pick up the data to match the interpreter.
881 //
882 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
883 // are accessed as negative so LSW is at LOW address
884
885 // ld_off is MSW so get LSW
886 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
887 next_off : ld_off;
888 __ movptr(rsi, Address(saved_sp, offset));
889 __ movptr(Address(rsp, st_off), rsi);
890 #ifndef _LP64
891 __ movptr(rsi, Address(saved_sp, ld_off));
892 __ movptr(Address(rsp, st_off + wordSize), rsi);
893 #endif // _LP64
894 }
895 } else if (r_1->is_Register()) { // Register argument
896 Register r = r_1->as_Register();
897 assert(r != rax, "must be different");
898 if (r_2->is_valid()) {
899 //
900 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
901 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
902 // So we must adjust where to pick up the data to match the interpreter.
903
904 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
905 next_off : ld_off;
906
907 // this can be a misaligned move
908 __ movptr(r, Address(saved_sp, offset));
909 #ifndef _LP64
910 assert(r_2->as_Register() != rax, "need another temporary register");
911 // Remember r_1 is low address (and LSB on x86)
912 // So r_2 gets loaded from high address regardless of the platform
913 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
914 #endif // _LP64
915 } else {
916 __ movl(r, Address(saved_sp, ld_off));
917 }
918 } else {
919 assert(r_1->is_XMMRegister(), "");
920 if (!r_2->is_valid()) {
921 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
922 } else {
923 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
924 }
925 }
926 }
927
928 // 6243940 We might end up in handle_wrong_method if
929 // the callee is deoptimized as we race thru here. If that
930 // happens we don't want to take a safepoint because the
931 // caller frame will look interpreted and arguments are now
932 // "compiled" so it is much better to make this transition
933 // invisible to the stack walking code. Unfortunately if
934 // we try and find the callee by normal means a safepoint
935 // is possible. So we stash the desired callee in the thread
936 // and the vm will find there should this case occur.
937
938 __ get_thread(rax);
939 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
940
941 // move Method* to rax, in case we end up in an c2i adapter.
942 // the c2i adapters expect Method* in rax, (c2) because c2's
943 // resolve stubs return the result (the method) in rax,.
944 // I'd love to fix this.
945 __ mov(rax, rbx);
946
947 __ jmp(rdi);
948 }
949
950 // ---------------------------------------------------------------
951 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
952 int total_args_passed,
953 int comp_args_on_stack,
954 const BasicType *sig_bt,
955 const VMRegPair *regs,
956 AdapterFingerPrint* fingerprint) {
957 address i2c_entry = __ pc();
958
959 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
960
961 // -------------------------------------------------------------------------
962 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
963 // to the interpreter. The args start out packed in the compiled layout. They
964 // need to be unpacked into the interpreter layout. This will almost always
965 // require some stack space. We grow the current (compiled) stack, then repack
966 // the args. We finally end in a jump to the generic interpreter entry point.
967 // On exit from the interpreter, the interpreter will restore our SP (lest the
968 // compiled code, which relys solely on SP and not EBP, get sick).
969
970 address c2i_unverified_entry = __ pc();
971 Label skip_fixup;
972
973 Register holder = rax;
974 Register receiver = rcx;
975 Register temp = rbx;
976
977 {
978
979 Label missed;
980 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
981 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
982 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
983 __ jcc(Assembler::notEqual, missed);
984 // Method might have been compiled since the call site was patched to
985 // interpreted if that is the case treat it as a miss so we can get
986 // the call site corrected.
987 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
988 __ jcc(Assembler::equal, skip_fixup);
989
990 __ bind(missed);
991 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
992 }
993
994 address c2i_entry = __ pc();
995
996 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
997 bs->c2i_entry_barrier(masm);
998
999 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
1000
1001 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1002 }
1003
1004 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1005 VMRegPair *regs,
1006 VMRegPair *regs2,
1007 int total_args_passed) {
1008 assert(regs2 == NULL, "not needed on x86");
1009 // We return the amount of VMRegImpl stack slots we need to reserve for all
1010 // the arguments NOT counting out_preserve_stack_slots.
1011
1012 uint stack = 0; // All arguments on stack
1013
1014 for( int i = 0; i < total_args_passed; i++) {
1015 // From the type and the argument number (count) compute the location
1016 switch( sig_bt[i] ) {
1017 case T_BOOLEAN:
1018 case T_CHAR:
1019 case T_FLOAT:
1020 case T_BYTE:
1021 case T_SHORT:
1022 case T_INT:
1023 case T_OBJECT:
1024 case T_ARRAY:
1025 case T_ADDRESS:
1026 case T_METADATA:
1027 regs[i].set1(VMRegImpl::stack2reg(stack++));
1028 break;
1029 case T_LONG:
1030 case T_DOUBLE: // The stack numbering is reversed from Java
1031 // Since C arguments do not get reversed, the ordering for
1032 // doubles on the stack must be opposite the Java convention
1033 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1034 regs[i].set2(VMRegImpl::stack2reg(stack));
1035 stack += 2;
1036 break;
1037 case T_VOID: regs[i].set_bad(); break;
1038 default:
1039 ShouldNotReachHere();
1040 break;
1041 }
1042 }
1043 return stack;
1044 }
1045
1046 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1047 uint num_bits,
1048 uint total_args_passed) {
1049 Unimplemented();
1050 return 0;
1051 }
1052
1053 // A simple move of integer like type
1054 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1055 if (src.first()->is_stack()) {
1056 if (dst.first()->is_stack()) {
1057 // stack to stack
1058 // __ ld(FP, reg2offset(src.first()), L5);
1059 // __ st(L5, SP, reg2offset(dst.first()));
1060 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1061 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1062 } else {
1063 // stack to reg
1064 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1065 }
1066 } else if (dst.first()->is_stack()) {
1067 // reg to stack
1068 // no need to sign extend on 64bit
1069 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1070 } else {
1071 if (dst.first() != src.first()) {
1072 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1073 }
1074 }
1075 }
1076
1077 // An oop arg. Must pass a handle not the oop itself
1078 static void object_move(MacroAssembler* masm,
1079 OopMap* map,
1080 int oop_handle_offset,
1081 int framesize_in_slots,
1082 VMRegPair src,
1083 VMRegPair dst,
1084 bool is_receiver,
1085 int* receiver_offset) {
1086
1087 // Because of the calling conventions we know that src can be a
1088 // register or a stack location. dst can only be a stack location.
1089
1090 assert(dst.first()->is_stack(), "must be stack");
1091 // must pass a handle. First figure out the location we use as a handle
1092
1093 if (src.first()->is_stack()) {
1094 // Oop is already on the stack as an argument
1095 Register rHandle = rax;
1096 Label nil;
1097 __ xorptr(rHandle, rHandle);
1098 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1099 __ jcc(Assembler::equal, nil);
1100 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1101 __ bind(nil);
1102 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1103
1104 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1105 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1106 if (is_receiver) {
1107 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1108 }
1109 } else {
1110 // Oop is in an a register we must store it to the space we reserve
1111 // on the stack for oop_handles
1112 const Register rOop = src.first()->as_Register();
1113 const Register rHandle = rax;
1114 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1115 int offset = oop_slot*VMRegImpl::stack_slot_size;
1116 Label skip;
1117 __ movptr(Address(rsp, offset), rOop);
1118 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1119 __ xorptr(rHandle, rHandle);
1120 __ cmpptr(rOop, (int32_t)NULL_WORD);
1121 __ jcc(Assembler::equal, skip);
1122 __ lea(rHandle, Address(rsp, offset));
1123 __ bind(skip);
1124 // Store the handle parameter
1125 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1126 if (is_receiver) {
1127 *receiver_offset = offset;
1128 }
1129 }
1130 }
1131
1132 // A float arg may have to do float reg int reg conversion
1133 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1134 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1135
1136 // Because of the calling convention we know that src is either a stack location
1137 // or an xmm register. dst can only be a stack location.
1138
1139 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1140
1141 if (src.first()->is_stack()) {
1142 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1143 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1144 } else {
1145 // reg to stack
1146 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1147 }
1148 }
1149
1150 // A long move
1151 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1152
1153 // The only legal possibility for a long_move VMRegPair is:
1154 // 1: two stack slots (possibly unaligned)
1155 // as neither the java or C calling convention will use registers
1156 // for longs.
1157
1158 if (src.first()->is_stack() && dst.first()->is_stack()) {
1159 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1160 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1161 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1162 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1163 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1164 } else {
1165 ShouldNotReachHere();
1166 }
1167 }
1168
1169 // A double move
1170 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1171
1172 // The only legal possibilities for a double_move VMRegPair are:
1173 // The painful thing here is that like long_move a VMRegPair might be
1174
1175 // Because of the calling convention we know that src is either
1176 // 1: a single physical register (xmm registers only)
1177 // 2: two stack slots (possibly unaligned)
1178 // dst can only be a pair of stack slots.
1179
1180 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1181
1182 if (src.first()->is_stack()) {
1183 // source is all stack
1184 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1185 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1186 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1187 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1188 } else {
1189 // reg to stack
1190 // No worries about stack alignment
1191 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1192 }
1193 }
1194
1195
1196 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1197 // We always ignore the frame_slots arg and just use the space just below frame pointer
1198 // which by this time is free to use
1199 switch (ret_type) {
1200 case T_FLOAT:
1201 __ fstp_s(Address(rbp, -wordSize));
1202 break;
1203 case T_DOUBLE:
1204 __ fstp_d(Address(rbp, -2*wordSize));
1205 break;
1206 case T_VOID: break;
1207 case T_LONG:
1208 __ movptr(Address(rbp, -wordSize), rax);
1209 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1210 break;
1211 default: {
1212 __ movptr(Address(rbp, -wordSize), rax);
1213 }
1214 }
1215 }
1216
1217 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1218 // We always ignore the frame_slots arg and just use the space just below frame pointer
1219 // which by this time is free to use
1220 switch (ret_type) {
1221 case T_FLOAT:
1222 __ fld_s(Address(rbp, -wordSize));
1223 break;
1224 case T_DOUBLE:
1225 __ fld_d(Address(rbp, -2*wordSize));
1226 break;
1227 case T_LONG:
1228 __ movptr(rax, Address(rbp, -wordSize));
1229 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1230 break;
1231 case T_VOID: break;
1232 default: {
1233 __ movptr(rax, Address(rbp, -wordSize));
1234 }
1235 }
1236 }
1237
1238 // Unpack an array argument into a pointer to the body and the length
1239 // if the array is non-null, otherwise pass 0 for both.
1240 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1241 Register tmp_reg = rax;
1242 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1243 "possible collision");
1244 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1245 "possible collision");
1246
1247 // Pass the length, ptr pair
1248 Label is_null, done;
1249 VMRegPair tmp(tmp_reg->as_VMReg());
1250 if (reg.first()->is_stack()) {
1251 // Load the arg up from the stack
1252 simple_move32(masm, reg, tmp);
1253 reg = tmp;
1254 }
1255 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1256 __ jccb(Assembler::equal, is_null);
1257 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1258 simple_move32(masm, tmp, body_arg);
1259 // load the length relative to the body.
1260 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1261 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1262 simple_move32(masm, tmp, length_arg);
1263 __ jmpb(done);
1264 __ bind(is_null);
1265 // Pass zeros
1266 __ xorptr(tmp_reg, tmp_reg);
1267 simple_move32(masm, tmp, body_arg);
1268 simple_move32(masm, tmp, length_arg);
1269 __ bind(done);
1270 }
1271
1272 static void verify_oop_args(MacroAssembler* masm,
1273 const methodHandle& method,
1274 const BasicType* sig_bt,
1275 const VMRegPair* regs) {
1276 Register temp_reg = rbx; // not part of any compiled calling seq
1277 if (VerifyOops) {
1278 for (int i = 0; i < method->size_of_parameters(); i++) {
1279 if (is_reference_type(sig_bt[i])) {
1280 VMReg r = regs[i].first();
1281 assert(r->is_valid(), "bad oop arg");
1282 if (r->is_stack()) {
1283 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1284 __ verify_oop(temp_reg);
1285 } else {
1286 __ verify_oop(r->as_Register());
1287 }
1288 }
1289 }
1290 }
1291 }
1292
1293 static void gen_special_dispatch(MacroAssembler* masm,
1294 const methodHandle& method,
1295 const BasicType* sig_bt,
1296 const VMRegPair* regs) {
1297 verify_oop_args(masm, method, sig_bt, regs);
1298 vmIntrinsics::ID iid = method->intrinsic_id();
1299
1300 // Now write the args into the outgoing interpreter space
1301 bool has_receiver = false;
1302 Register receiver_reg = noreg;
1303 int member_arg_pos = -1;
1304 Register member_reg = noreg;
1305 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1306 if (ref_kind != 0) {
1307 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1308 member_reg = rbx; // known to be free at this point
1309 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1310 } else if (iid == vmIntrinsics::_invokeBasic) {
1311 has_receiver = true;
1312 } else {
1313 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1314 }
1315
1316 if (member_reg != noreg) {
1317 // Load the member_arg into register, if necessary.
1318 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1319 VMReg r = regs[member_arg_pos].first();
1320 if (r->is_stack()) {
1321 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1322 } else {
1323 // no data motion is needed
1324 member_reg = r->as_Register();
1325 }
1326 }
1327
1328 if (has_receiver) {
1329 // Make sure the receiver is loaded into a register.
1330 assert(method->size_of_parameters() > 0, "oob");
1331 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1332 VMReg r = regs[0].first();
1333 assert(r->is_valid(), "bad receiver arg");
1334 if (r->is_stack()) {
1335 // Porting note: This assumes that compiled calling conventions always
1336 // pass the receiver oop in a register. If this is not true on some
1337 // platform, pick a temp and load the receiver from stack.
1338 fatal("receiver always in a register");
1339 receiver_reg = rcx; // known to be free at this point
1340 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1341 } else {
1342 // no data motion is needed
1343 receiver_reg = r->as_Register();
1344 }
1345 }
1346
1347 // Figure out which address we are really jumping to:
1348 MethodHandles::generate_method_handle_dispatch(masm, iid,
1349 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1350 }
1351
1352 // ---------------------------------------------------------------------------
1353 // Generate a native wrapper for a given method. The method takes arguments
1354 // in the Java compiled code convention, marshals them to the native
1355 // convention (handlizes oops, etc), transitions to native, makes the call,
1356 // returns to java state (possibly blocking), unhandlizes any result and
1357 // returns.
1358 //
1359 // Critical native functions are a shorthand for the use of
1360 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1361 // functions. The wrapper is expected to unpack the arguments before
1362 // passing them to the callee. Critical native functions leave the state _in_Java,
1363 // since they cannot stop for GC.
1364 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1365 // block and the check for pending exceptions it's impossible for them
1366 // to be thrown.
1367 //
1368 //
1369 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1370 const methodHandle& method,
1371 int compile_id,
1372 BasicType* in_sig_bt,
1373 VMRegPair* in_regs,
1374 BasicType ret_type,
1375 address critical_entry) {
1376 if (method->is_method_handle_intrinsic()) {
1377 vmIntrinsics::ID iid = method->intrinsic_id();
1378 intptr_t start = (intptr_t)__ pc();
1379 int vep_offset = ((intptr_t)__ pc()) - start;
1380 gen_special_dispatch(masm,
1381 method,
1382 in_sig_bt,
1383 in_regs);
1384 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1385 __ flush();
1386 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1387 return nmethod::new_native_nmethod(method,
1388 compile_id,
1389 masm->code(),
1390 vep_offset,
1391 frame_complete,
1392 stack_slots / VMRegImpl::slots_per_word,
1393 in_ByteSize(-1),
1394 in_ByteSize(-1),
1395 (OopMapSet*)NULL);
1396 }
1397 bool is_critical_native = true;
1398 address native_func = critical_entry;
1399 if (native_func == NULL) {
1400 native_func = method->native_function();
1401 is_critical_native = false;
1402 }
1403 assert(native_func != NULL, "must have function");
1404
1405 // An OopMap for lock (and class if static)
1406 OopMapSet *oop_maps = new OopMapSet();
1407
1408 // We have received a description of where all the java arg are located
1409 // on entry to the wrapper. We need to convert these args to where
1410 // the jni function will expect them. To figure out where they go
1411 // we convert the java signature to a C signature by inserting
1412 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1413
1414 const int total_in_args = method->size_of_parameters();
1415 int total_c_args = total_in_args;
1416 if (!is_critical_native) {
1417 total_c_args += 1;
1418 if (method->is_static()) {
1419 total_c_args++;
1420 }
1421 } else {
1422 for (int i = 0; i < total_in_args; i++) {
1423 if (in_sig_bt[i] == T_ARRAY) {
1424 total_c_args++;
1425 }
1426 }
1427 }
1428
1429 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1430 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1431 BasicType* in_elem_bt = NULL;
1432
1433 int argc = 0;
1434 if (!is_critical_native) {
1435 out_sig_bt[argc++] = T_ADDRESS;
1436 if (method->is_static()) {
1437 out_sig_bt[argc++] = T_OBJECT;
1438 }
1439
1440 for (int i = 0; i < total_in_args ; i++ ) {
1441 out_sig_bt[argc++] = in_sig_bt[i];
1442 }
1443 } else {
1444 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1445 SignatureStream ss(method->signature());
1446 for (int i = 0; i < total_in_args ; i++ ) {
1447 if (in_sig_bt[i] == T_ARRAY) {
1448 // Arrays are passed as int, elem* pair
1449 out_sig_bt[argc++] = T_INT;
1450 out_sig_bt[argc++] = T_ADDRESS;
1451 ss.skip_array_prefix(1); // skip one '['
1452 assert(ss.is_primitive(), "primitive type expected");
1453 in_elem_bt[i] = ss.type();
1454 } else {
1455 out_sig_bt[argc++] = in_sig_bt[i];
1456 in_elem_bt[i] = T_VOID;
1457 }
1458 if (in_sig_bt[i] != T_VOID) {
1459 assert(in_sig_bt[i] == ss.type() ||
1460 in_sig_bt[i] == T_ARRAY, "must match");
1461 ss.next();
1462 }
1463 }
1464 }
1465
1466 // Now figure out where the args must be stored and how much stack space
1467 // they require.
1468 int out_arg_slots;
1469 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1470
1471 // Compute framesize for the wrapper. We need to handlize all oops in
1472 // registers a max of 2 on x86.
1473
1474 // Calculate the total number of stack slots we will need.
1475
1476 // First count the abi requirement plus all of the outgoing args
1477 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1478
1479 // Now the space for the inbound oop handle area
1480 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1481 if (is_critical_native) {
1482 // Critical natives may have to call out so they need a save area
1483 // for register arguments.
1484 int double_slots = 0;
1485 int single_slots = 0;
1486 for ( int i = 0; i < total_in_args; i++) {
1487 if (in_regs[i].first()->is_Register()) {
1488 const Register reg = in_regs[i].first()->as_Register();
1489 switch (in_sig_bt[i]) {
1490 case T_ARRAY: // critical array (uses 2 slots on LP64)
1491 case T_BOOLEAN:
1492 case T_BYTE:
1493 case T_SHORT:
1494 case T_CHAR:
1495 case T_INT: single_slots++; break;
1496 case T_LONG: double_slots++; break;
1497 default: ShouldNotReachHere();
1498 }
1499 } else if (in_regs[i].first()->is_XMMRegister()) {
1500 switch (in_sig_bt[i]) {
1501 case T_FLOAT: single_slots++; break;
1502 case T_DOUBLE: double_slots++; break;
1503 default: ShouldNotReachHere();
1504 }
1505 } else if (in_regs[i].first()->is_FloatRegister()) {
1506 ShouldNotReachHere();
1507 }
1508 }
1509 total_save_slots = double_slots * 2 + single_slots;
1510 // align the save area
1511 if (double_slots != 0) {
1512 stack_slots = align_up(stack_slots, 2);
1513 }
1514 }
1515
1516 int oop_handle_offset = stack_slots;
1517 stack_slots += total_save_slots;
1518
1519 // Now any space we need for handlizing a klass if static method
1520
1521 int klass_slot_offset = 0;
1522 int klass_offset = -1;
1523 int lock_slot_offset = 0;
1524 bool is_static = false;
1525
1526 if (method->is_static()) {
1527 klass_slot_offset = stack_slots;
1528 stack_slots += VMRegImpl::slots_per_word;
1529 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1530 is_static = true;
1531 }
1532
1533 // Plus a lock if needed
1534
1535 if (method->is_synchronized()) {
1536 lock_slot_offset = stack_slots;
1537 stack_slots += VMRegImpl::slots_per_word;
1538 }
1539
1540 // Now a place (+2) to save return values or temp during shuffling
1541 // + 2 for return address (which we own) and saved rbp,
1542 stack_slots += 4;
1543
1544 // Ok The space we have allocated will look like:
1545 //
1546 //
1547 // FP-> | |
1548 // |---------------------|
1549 // | 2 slots for moves |
1550 // |---------------------|
1551 // | lock box (if sync) |
1552 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1553 // | klass (if static) |
1554 // |---------------------| <- klass_slot_offset
1555 // | oopHandle area |
1556 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1557 // | outbound memory |
1558 // | based arguments |
1559 // | |
1560 // |---------------------|
1561 // | |
1562 // SP-> | out_preserved_slots |
1563 //
1564 //
1565 // ****************************************************************************
1566 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1567 // arguments off of the stack after the jni call. Before the call we can use
1568 // instructions that are SP relative. After the jni call we switch to FP
1569 // relative instructions instead of re-adjusting the stack on windows.
1570 // ****************************************************************************
1571
1572
1573 // Now compute actual number of stack words we need rounding to make
1574 // stack properly aligned.
1575 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1576
1577 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1578
1579 intptr_t start = (intptr_t)__ pc();
1580
1581 // First thing make an ic check to see if we should even be here
1582
1583 // We are free to use all registers as temps without saving them and
1584 // restoring them except rbp. rbp is the only callee save register
1585 // as far as the interpreter and the compiler(s) are concerned.
1586
1587
1588 const Register ic_reg = rax;
1589 const Register receiver = rcx;
1590 Label hit;
1591 Label exception_pending;
1592
1593 __ verify_oop(receiver);
1594 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1595 __ jcc(Assembler::equal, hit);
1596
1597 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1598
1599 // verified entry must be aligned for code patching.
1600 // and the first 5 bytes must be in the same cache line
1601 // if we align at 8 then we will be sure 5 bytes are in the same line
1602 __ align(8);
1603
1604 __ bind(hit);
1605
1606 int vep_offset = ((intptr_t)__ pc()) - start;
1607
1608 #ifdef COMPILER1
1609 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1610 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1611 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1612 }
1613 #endif // COMPILER1
1614
1615 // The instruction at the verified entry point must be 5 bytes or longer
1616 // because it can be patched on the fly by make_non_entrant. The stack bang
1617 // instruction fits that requirement.
1618
1619 // Generate stack overflow check
1620 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1621
1622 // Generate a new frame for the wrapper.
1623 __ enter();
1624 // -2 because return address is already present and so is saved rbp
1625 __ subptr(rsp, stack_size - 2*wordSize);
1626
1627
1628 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1629 bs->nmethod_entry_barrier(masm);
1630
1631 // Frame is now completed as far as size and linkage.
1632 int frame_complete = ((intptr_t)__ pc()) - start;
1633
1634 if (UseRTMLocking) {
1635 // Abort RTM transaction before calling JNI
1636 // because critical section will be large and will be
1637 // aborted anyway. Also nmethod could be deoptimized.
1638 __ xabort(0);
1639 }
1640
1641 // Calculate the difference between rsp and rbp,. We need to know it
1642 // after the native call because on windows Java Natives will pop
1643 // the arguments and it is painful to do rsp relative addressing
1644 // in a platform independent way. So after the call we switch to
1645 // rbp, relative addressing.
1646
1647 int fp_adjustment = stack_size - 2*wordSize;
1648
1649 #ifdef COMPILER2
1650 // C2 may leave the stack dirty if not in SSE2+ mode
1651 if (UseSSE >= 2) {
1652 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1653 } else {
1654 __ empty_FPU_stack();
1655 }
1656 #endif /* COMPILER2 */
1657
1658 // Compute the rbp, offset for any slots used after the jni call
1659
1660 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1661
1662 // We use rdi as a thread pointer because it is callee save and
1663 // if we load it once it is usable thru the entire wrapper
1664 const Register thread = rdi;
1665
1666 // We use rsi as the oop handle for the receiver/klass
1667 // It is callee save so it survives the call to native
1668
1669 const Register oop_handle_reg = rsi;
1670
1671 __ get_thread(thread);
1672
1673 //
1674 // We immediately shuffle the arguments so that any vm call we have to
1675 // make from here on out (sync slow path, jvmti, etc.) we will have
1676 // captured the oops from our caller and have a valid oopMap for
1677 // them.
1678
1679 // -----------------
1680 // The Grand Shuffle
1681 //
1682 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1683 // and, if static, the class mirror instead of a receiver. This pretty much
1684 // guarantees that register layout will not match (and x86 doesn't use reg
1685 // parms though amd does). Since the native abi doesn't use register args
1686 // and the java conventions does we don't have to worry about collisions.
1687 // All of our moved are reg->stack or stack->stack.
1688 // We ignore the extra arguments during the shuffle and handle them at the
1689 // last moment. The shuffle is described by the two calling convention
1690 // vectors we have in our possession. We simply walk the java vector to
1691 // get the source locations and the c vector to get the destinations.
1692
1693 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1694
1695 // Record rsp-based slot for receiver on stack for non-static methods
1696 int receiver_offset = -1;
1697
1698 // This is a trick. We double the stack slots so we can claim
1699 // the oops in the caller's frame. Since we are sure to have
1700 // more args than the caller doubling is enough to make
1701 // sure we can capture all the incoming oop args from the
1702 // caller.
1703 //
1704 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1705
1706 // Mark location of rbp,
1707 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1708
1709 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1710 // Are free to temporaries if we have to do stack to steck moves.
1711 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1712
1713 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1714 switch (in_sig_bt[i]) {
1715 case T_ARRAY:
1716 if (is_critical_native) {
1717 VMRegPair in_arg = in_regs[i];
1718 unpack_array_argument(masm, in_arg, in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1719 c_arg++;
1720 break;
1721 }
1722 case T_OBJECT:
1723 assert(!is_critical_native, "no oop arguments");
1724 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1725 ((i == 0) && (!is_static)),
1726 &receiver_offset);
1727 break;
1728 case T_VOID:
1729 break;
1730
1731 case T_FLOAT:
1732 float_move(masm, in_regs[i], out_regs[c_arg]);
1733 break;
1734
1735 case T_DOUBLE:
1736 assert( i + 1 < total_in_args &&
1737 in_sig_bt[i + 1] == T_VOID &&
1738 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1739 double_move(masm, in_regs[i], out_regs[c_arg]);
1740 break;
1741
1742 case T_LONG :
1743 long_move(masm, in_regs[i], out_regs[c_arg]);
1744 break;
1745
1746 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1747
1748 default:
1749 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1750 }
1751 }
1752
1753 // Pre-load a static method's oop into rsi. Used both by locking code and
1754 // the normal JNI call code.
1755 if (method->is_static() && !is_critical_native) {
1756
1757 // load opp into a register
1758 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1759
1760 // Now handlize the static class mirror it's known not-null.
1761 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1762 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1763
1764 // Now get the handle
1765 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1766 // store the klass handle as second argument
1767 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1768 }
1769
1770 // Change state to native (we save the return address in the thread, since it might not
1771 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1772 // points into the right code segment. It does not have to be the correct return pc.
1773 // We use the same pc/oopMap repeatedly when we call out
1774
1775 intptr_t the_pc = (intptr_t) __ pc();
1776 oop_maps->add_gc_map(the_pc - start, map);
1777
1778 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1779
1780
1781 // We have all of the arguments setup at this point. We must not touch any register
1782 // argument registers at this point (what if we save/restore them there are no oop?
1783
1784 {
1785 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1786 __ mov_metadata(rax, method());
1787 __ call_VM_leaf(
1788 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1789 thread, rax);
1790 }
1791
1792 // RedefineClasses() tracing support for obsolete method entry
1793 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1794 __ mov_metadata(rax, method());
1795 __ call_VM_leaf(
1796 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1797 thread, rax);
1798 }
1799
1800 // These are register definitions we need for locking/unlocking
1801 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1802 const Register obj_reg = rcx; // Will contain the oop
1803 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1804
1805 Label slow_path_lock;
1806 Label lock_done;
1807
1808 // Lock a synchronized method
1809 if (method->is_synchronized()) {
1810 assert(!is_critical_native, "unhandled");
1811
1812
1813 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1814
1815 // Get the handle (the 2nd argument)
1816 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1817
1818 // Get address of the box
1819
1820 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1821
1822 // Load the oop from the handle
1823 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1824
1825 if (LockingMode == LM_MONITOR) {
1826 __ jmp(slow_path_lock);
1827 } else if (LockingMode == LM_LEGACY) {
1828 if (UseBiasedLocking) {
1829 // Note that oop_handle_reg is trashed during this call
1830 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, noreg, false, lock_done, &slow_path_lock);
1831 }
1832
1833 // Load immediate 1 into swap_reg %rax,
1834 __ movptr(swap_reg, 1);
1835
1836 // Load (object->mark() | 1) into swap_reg %rax,
1837 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1838
1839 // Save (object->mark() | 1) into BasicLock's displaced header
1840 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1841
1842 // src -> dest iff dest == rax, else rax, <- dest
1843 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1844 __ lock();
1845 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1846 __ jcc(Assembler::equal, lock_done);
1847
1848 // Test if the oopMark is an obvious stack pointer, i.e.,
1849 // 1) (mark & 3) == 0, and
1850 // 2) rsp <= mark < mark + os::pagesize()
1851 // These 3 tests can be done by evaluating the following
1852 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1853 // assuming both stack pointer and pagesize have their
1854 // least significant 2 bits clear.
1855 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1856
1857 __ subptr(swap_reg, rsp);
1858 __ andptr(swap_reg, 3 - os::vm_page_size());
1859
1860 // Save the test result, for recursive case, the result is zero
1861 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1862 __ jcc(Assembler::notEqual, slow_path_lock);
1863 } else {
1864 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1865 __ lightweight_lock(obj_reg, swap_reg, thread, lock_reg, slow_path_lock);
1866 }
1867 // Slow path will re-enter here
1868 __ bind(lock_done);
1869
1870 if (UseBiasedLocking) {
1871 // Re-fetch oop_handle_reg as we trashed it above
1872 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1873 }
1874 }
1875
1876
1877 // Finally just about ready to make the JNI call
1878
1879 // get JNIEnv* which is first argument to native
1880 if (!is_critical_native) {
1881 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1882 __ movptr(Address(rsp, 0), rdx);
1883
1884 // Now set thread in native
1885 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1886 }
1887
1888 __ call(RuntimeAddress(native_func));
1889
1890 // Verify or restore cpu control state after JNI call
1891 __ restore_cpu_control_state_after_jni();
1892
1893 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1894 // arguments off of the stack. We could just re-adjust the stack pointer here
1895 // and continue to do SP relative addressing but we instead switch to FP
1896 // relative addressing.
1897
1898 // Unpack native results.
1899 switch (ret_type) {
1900 case T_BOOLEAN: __ c2bool(rax); break;
1901 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1902 case T_BYTE : __ sign_extend_byte (rax); break;
1903 case T_SHORT : __ sign_extend_short(rax); break;
1904 case T_INT : /* nothing to do */ break;
1905 case T_DOUBLE :
1906 case T_FLOAT :
1907 // Result is in st0 we'll save as needed
1908 break;
1909 case T_ARRAY: // Really a handle
1910 case T_OBJECT: // Really a handle
1911 break; // can't de-handlize until after safepoint check
1912 case T_VOID: break;
1913 case T_LONG: break;
1914 default : ShouldNotReachHere();
1915 }
1916
1917 Label after_transition;
1918
1919 // If this is a critical native, check for a safepoint or suspend request after the call.
1920 // If a safepoint is needed, transition to native, then to native_trans to handle
1921 // safepoints like the native methods that are not critical natives.
1922 if (is_critical_native) {
1923 Label needs_safepoint;
1924 __ safepoint_poll(needs_safepoint, thread, false /* at_return */, false /* in_nmethod */);
1925 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1926 __ jcc(Assembler::equal, after_transition);
1927 __ bind(needs_safepoint);
1928 }
1929
1930 // Switch thread to "native transition" state before reading the synchronization state.
1931 // This additional state is necessary because reading and testing the synchronization
1932 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1933 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1934 // VM thread changes sync state to synchronizing and suspends threads for GC.
1935 // Thread A is resumed to finish this native method, but doesn't block here since it
1936 // didn't see any synchronization is progress, and escapes.
1937 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1938
1939 // Force this write out before the read below
1940 __ membar(Assembler::Membar_mask_bits(
1941 Assembler::LoadLoad | Assembler::LoadStore |
1942 Assembler::StoreLoad | Assembler::StoreStore));
1943
1944 if (AlwaysRestoreFPU) {
1945 // Make sure the control word is correct.
1946 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1947 }
1948
1949 // check for safepoint operation in progress and/or pending suspend requests
1950 { Label Continue, slow_path;
1951
1952 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1953
1954 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1955 __ jcc(Assembler::equal, Continue);
1956 __ bind(slow_path);
1957
1958 // Don't use call_VM as it will see a possible pending exception and forward it
1959 // and never return here preventing us from clearing _last_native_pc down below.
1960 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1961 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1962 // by hand.
1963 //
1964 __ vzeroupper();
1965
1966 save_native_result(masm, ret_type, stack_slots);
1967 __ push(thread);
1968 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1969 JavaThread::check_special_condition_for_native_trans)));
1970 __ increment(rsp, wordSize);
1971 // Restore any method result value
1972 restore_native_result(masm, ret_type, stack_slots);
1973 __ bind(Continue);
1974 }
1975
1976 // change thread state
1977 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1978 __ bind(after_transition);
1979
1980 Label reguard;
1981 Label reguard_done;
1982 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1983 __ jcc(Assembler::equal, reguard);
1984
1985 // slow path reguard re-enters here
1986 __ bind(reguard_done);
1987
1988 // Handle possible exception (will unlock if necessary)
1989
1990 // native result if any is live
1991
1992 // Unlock
1993 Label slow_path_unlock;
1994 Label unlock_done;
1995 if (method->is_synchronized()) {
1996
1997 Label done;
1998
1999 // Get locked oop from the handle we passed to jni
2000 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2001
2002 if (UseBiasedLocking) {
2003 __ biased_locking_exit(obj_reg, rbx, done);
2004 }
2005
2006 if (LockingMode == LM_LEGACY) {
2007 // Simple recursive lock?
2008
2009 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2010 __ jcc(Assembler::equal, done);
2011 }
2012
2013 // Must save rax, if if it is live now because cmpxchg must use it
2014 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2015 save_native_result(masm, ret_type, stack_slots);
2016 }
2017
2018 if (LockingMode == LM_MONITOR) {
2019 __ jmp(slow_path_unlock);
2020 } else if (LockingMode == LM_LEGACY) {
2021 // get old displaced header
2022 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2023
2024 // get address of the stack lock
2025 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2026
2027 // Atomic swap old header if oop still contains the stack lock
2028 // src -> dest iff dest == rax, else rax, <- dest
2029 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2030 __ lock();
2031 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2032 __ jcc(Assembler::notEqual, slow_path_unlock);
2033 } else {
2034 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
2035 __ lightweight_unlock(obj_reg, swap_reg, thread, lock_reg, slow_path_unlock);
2036 }
2037
2038 // slow path re-enters here
2039 __ bind(unlock_done);
2040 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2041 restore_native_result(masm, ret_type, stack_slots);
2042 }
2043
2044 __ bind(done);
2045
2046 }
2047
2048 {
2049 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2050 // Tell dtrace about this method exit
2051 save_native_result(masm, ret_type, stack_slots);
2052 __ mov_metadata(rax, method());
2053 __ call_VM_leaf(
2054 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2055 thread, rax);
2056 restore_native_result(masm, ret_type, stack_slots);
2057 }
2058
2059 // We can finally stop using that last_Java_frame we setup ages ago
2060
2061 __ reset_last_Java_frame(thread, false);
2062
2063 // Unbox oop result, e.g. JNIHandles::resolve value.
2064 if (is_reference_type(ret_type)) {
2065 __ resolve_jobject(rax /* value */,
2066 thread /* thread */,
2067 rcx /* tmp */);
2068 }
2069
2070 if (CheckJNICalls) {
2071 // clear_pending_jni_exception_check
2072 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2073 }
2074
2075 if (!is_critical_native) {
2076 // reset handle block
2077 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2078 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2079
2080 // Any exception pending?
2081 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2082 __ jcc(Assembler::notEqual, exception_pending);
2083 }
2084
2085 // no exception, we're almost done
2086
2087 // check that only result value is on FPU stack
2088 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2089
2090 // Fixup floating pointer results so that result looks like a return from a compiled method
2091 if (ret_type == T_FLOAT) {
2092 if (UseSSE >= 1) {
2093 // Pop st0 and store as float and reload into xmm register
2094 __ fstp_s(Address(rbp, -4));
2095 __ movflt(xmm0, Address(rbp, -4));
2096 }
2097 } else if (ret_type == T_DOUBLE) {
2098 if (UseSSE >= 2) {
2099 // Pop st0 and store as double and reload into xmm register
2100 __ fstp_d(Address(rbp, -8));
2101 __ movdbl(xmm0, Address(rbp, -8));
2102 }
2103 }
2104
2105 // Return
2106
2107 __ leave();
2108 __ ret(0);
2109
2110 // Unexpected paths are out of line and go here
2111
2112 // Slow path locking & unlocking
2113 if (method->is_synchronized()) {
2114
2115 // BEGIN Slow path lock
2116
2117 __ bind(slow_path_lock);
2118
2119 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2120 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2121 __ push(thread);
2122 __ push(lock_reg);
2123 __ push(obj_reg);
2124 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2125 __ addptr(rsp, 3*wordSize);
2126
2127 #ifdef ASSERT
2128 { Label L;
2129 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2130 __ jcc(Assembler::equal, L);
2131 __ stop("no pending exception allowed on exit from monitorenter");
2132 __ bind(L);
2133 }
2134 #endif
2135 __ jmp(lock_done);
2136
2137 // END Slow path lock
2138
2139 // BEGIN Slow path unlock
2140 __ bind(slow_path_unlock);
2141 __ vzeroupper();
2142 // Slow path unlock
2143
2144 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2145 save_native_result(masm, ret_type, stack_slots);
2146 }
2147 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2148
2149 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2150 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2151
2152
2153 // should be a peal
2154 // +wordSize because of the push above
2155 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2156 __ push(thread);
2157 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2158 __ push(rax);
2159
2160 __ push(obj_reg);
2161 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2162 __ addptr(rsp, 3*wordSize);
2163 #ifdef ASSERT
2164 {
2165 Label L;
2166 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2167 __ jcc(Assembler::equal, L);
2168 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2169 __ bind(L);
2170 }
2171 #endif /* ASSERT */
2172
2173 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2174
2175 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2176 restore_native_result(masm, ret_type, stack_slots);
2177 }
2178 __ jmp(unlock_done);
2179 // END Slow path unlock
2180
2181 }
2182
2183 // SLOW PATH Reguard the stack if needed
2184
2185 __ bind(reguard);
2186 __ vzeroupper();
2187 save_native_result(masm, ret_type, stack_slots);
2188 {
2189 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2190 }
2191 restore_native_result(masm, ret_type, stack_slots);
2192 __ jmp(reguard_done);
2193
2194
2195 // BEGIN EXCEPTION PROCESSING
2196
2197 if (!is_critical_native) {
2198 // Forward the exception
2199 __ bind(exception_pending);
2200
2201 // remove possible return value from FPU register stack
2202 __ empty_FPU_stack();
2203
2204 // pop our frame
2205 __ leave();
2206 // and forward the exception
2207 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2208 }
2209
2210 __ flush();
2211
2212 nmethod *nm = nmethod::new_native_nmethod(method,
2213 compile_id,
2214 masm->code(),
2215 vep_offset,
2216 frame_complete,
2217 stack_slots / VMRegImpl::slots_per_word,
2218 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2219 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2220 oop_maps);
2221
2222 return nm;
2223
2224 }
2225
2226 // this function returns the adjust size (in number of words) to a c2i adapter
2227 // activation for use during deoptimization
2228 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2229 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2230 }
2231
2232
2233 // Number of stack slots between incoming argument block and the start of
2234 // a new frame. The PROLOG must add this many slots to the stack. The
2235 // EPILOG must remove this many slots. Intel needs one slot for
2236 // return address and one for rbp, (must save rbp)
2237 uint SharedRuntime::in_preserve_stack_slots() {
2238 return 2+VerifyStackAtCalls;
2239 }
2240
2241 uint SharedRuntime::out_preserve_stack_slots() {
2242 return 0;
2243 }
2244
2245 //------------------------------generate_deopt_blob----------------------------
2246 void SharedRuntime::generate_deopt_blob() {
2247 // allocate space for the code
2248 ResourceMark rm;
2249 // setup code generation tools
2250 // note: the buffer code size must account for StackShadowPages=50
2251 CodeBuffer buffer("deopt_blob", 1536, 1024);
2252 MacroAssembler* masm = new MacroAssembler(&buffer);
2253 int frame_size_in_words;
2254 OopMap* map = NULL;
2255 // Account for the extra args we place on the stack
2256 // by the time we call fetch_unroll_info
2257 const int additional_words = 2; // deopt kind, thread
2258
2259 OopMapSet *oop_maps = new OopMapSet();
2260
2261 // -------------
2262 // This code enters when returning to a de-optimized nmethod. A return
2263 // address has been pushed on the the stack, and return values are in
2264 // registers.
2265 // If we are doing a normal deopt then we were called from the patched
2266 // nmethod from the point we returned to the nmethod. So the return
2267 // address on the stack is wrong by NativeCall::instruction_size
2268 // We will adjust the value to it looks like we have the original return
2269 // address on the stack (like when we eagerly deoptimized).
2270 // In the case of an exception pending with deoptimized then we enter
2271 // with a return address on the stack that points after the call we patched
2272 // into the exception handler. We have the following register state:
2273 // rax,: exception
2274 // rbx,: exception handler
2275 // rdx: throwing pc
2276 // So in this case we simply jam rdx into the useless return address and
2277 // the stack looks just like we want.
2278 //
2279 // At this point we need to de-opt. We save the argument return
2280 // registers. We call the first C routine, fetch_unroll_info(). This
2281 // routine captures the return values and returns a structure which
2282 // describes the current frame size and the sizes of all replacement frames.
2283 // The current frame is compiled code and may contain many inlined
2284 // functions, each with their own JVM state. We pop the current frame, then
2285 // push all the new frames. Then we call the C routine unpack_frames() to
2286 // populate these frames. Finally unpack_frames() returns us the new target
2287 // address. Notice that callee-save registers are BLOWN here; they have
2288 // already been captured in the vframeArray at the time the return PC was
2289 // patched.
2290 address start = __ pc();
2291 Label cont;
2292
2293 // Prolog for non exception case!
2294
2295 // Save everything in sight.
2296
2297 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2298 // Normal deoptimization
2299 __ push(Deoptimization::Unpack_deopt);
2300 __ jmp(cont);
2301
2302 int reexecute_offset = __ pc() - start;
2303
2304 // Reexecute case
2305 // return address is the pc describes what bci to do re-execute at
2306
2307 // No need to update map as each call to save_live_registers will produce identical oopmap
2308 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2309
2310 __ push(Deoptimization::Unpack_reexecute);
2311 __ jmp(cont);
2312
2313 int exception_offset = __ pc() - start;
2314
2315 // Prolog for exception case
2316
2317 // all registers are dead at this entry point, except for rax, and
2318 // rdx which contain the exception oop and exception pc
2319 // respectively. Set them in TLS and fall thru to the
2320 // unpack_with_exception_in_tls entry point.
2321
2322 __ get_thread(rdi);
2323 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2324 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2325
2326 int exception_in_tls_offset = __ pc() - start;
2327
2328 // new implementation because exception oop is now passed in JavaThread
2329
2330 // Prolog for exception case
2331 // All registers must be preserved because they might be used by LinearScan
2332 // Exceptiop oop and throwing PC are passed in JavaThread
2333 // tos: stack at point of call to method that threw the exception (i.e. only
2334 // args are on the stack, no return address)
2335
2336 // make room on stack for the return address
2337 // It will be patched later with the throwing pc. The correct value is not
2338 // available now because loading it from memory would destroy registers.
2339 __ push(0);
2340
2341 // Save everything in sight.
2342
2343 // No need to update map as each call to save_live_registers will produce identical oopmap
2344 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2345
2346 // Now it is safe to overwrite any register
2347
2348 // store the correct deoptimization type
2349 __ push(Deoptimization::Unpack_exception);
2350
2351 // load throwing pc from JavaThread and patch it as the return address
2352 // of the current frame. Then clear the field in JavaThread
2353 __ get_thread(rdi);
2354 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2355 __ movptr(Address(rbp, wordSize), rdx);
2356 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2357
2358 #ifdef ASSERT
2359 // verify that there is really an exception oop in JavaThread
2360 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2361 __ verify_oop(rax);
2362
2363 // verify that there is no pending exception
2364 Label no_pending_exception;
2365 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2366 __ testptr(rax, rax);
2367 __ jcc(Assembler::zero, no_pending_exception);
2368 __ stop("must not have pending exception here");
2369 __ bind(no_pending_exception);
2370 #endif
2371
2372 __ bind(cont);
2373
2374 // Compiled code leaves the floating point stack dirty, empty it.
2375 __ empty_FPU_stack();
2376
2377
2378 // Call C code. Need thread and this frame, but NOT official VM entry
2379 // crud. We cannot block on this call, no GC can happen.
2380 __ get_thread(rcx);
2381 __ push(rcx);
2382 // fetch_unroll_info needs to call last_java_frame()
2383 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2384
2385 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2386
2387 // Need to have an oopmap that tells fetch_unroll_info where to
2388 // find any register it might need.
2389
2390 oop_maps->add_gc_map( __ pc()-start, map);
2391
2392 // Discard args to fetch_unroll_info
2393 __ pop(rcx);
2394 __ pop(rcx);
2395
2396 __ get_thread(rcx);
2397 __ reset_last_Java_frame(rcx, false);
2398
2399 // Load UnrollBlock into EDI
2400 __ mov(rdi, rax);
2401
2402 // Move the unpack kind to a safe place in the UnrollBlock because
2403 // we are very short of registers
2404
2405 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2406 // retrieve the deopt kind from the UnrollBlock.
2407 __ movl(rax, unpack_kind);
2408
2409 Label noException;
2410 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2411 __ jcc(Assembler::notEqual, noException);
2412 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2413 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2414 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2415 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2416
2417 __ verify_oop(rax);
2418
2419 // Overwrite the result registers with the exception results.
2420 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2421 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2422
2423 __ bind(noException);
2424
2425 // Stack is back to only having register save data on the stack.
2426 // Now restore the result registers. Everything else is either dead or captured
2427 // in the vframeArray.
2428
2429 RegisterSaver::restore_result_registers(masm);
2430
2431 // Non standard control word may be leaked out through a safepoint blob, and we can
2432 // deopt at a poll point with the non standard control word. However, we should make
2433 // sure the control word is correct after restore_result_registers.
2434 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2435
2436 // All of the register save area has been popped of the stack. Only the
2437 // return address remains.
2438
2439 // Pop all the frames we must move/replace.
2440 //
2441 // Frame picture (youngest to oldest)
2442 // 1: self-frame (no frame link)
2443 // 2: deopting frame (no frame link)
2444 // 3: caller of deopting frame (could be compiled/interpreted).
2445 //
2446 // Note: by leaving the return address of self-frame on the stack
2447 // and using the size of frame 2 to adjust the stack
2448 // when we are done the return to frame 3 will still be on the stack.
2449
2450 // Pop deoptimized frame
2451 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2452
2453 // sp should be pointing at the return address to the caller (3)
2454
2455 // Pick up the initial fp we should save
2456 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2457 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2458
2459 #ifdef ASSERT
2460 // Compilers generate code that bang the stack by as much as the
2461 // interpreter would need. So this stack banging should never
2462 // trigger a fault. Verify that it does not on non product builds.
2463 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2464 __ bang_stack_size(rbx, rcx);
2465 #endif
2466
2467 // Load array of frame pcs into ECX
2468 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2469
2470 __ pop(rsi); // trash the old pc
2471
2472 // Load array of frame sizes into ESI
2473 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2474
2475 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2476
2477 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2478 __ movl(counter, rbx);
2479
2480 // Now adjust the caller's stack to make up for the extra locals
2481 // but record the original sp so that we can save it in the skeletal interpreter
2482 // frame and the stack walking of interpreter_sender will get the unextended sp
2483 // value and not the "real" sp value.
2484
2485 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2486 __ movptr(sp_temp, rsp);
2487 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2488 __ subptr(rsp, rbx);
2489
2490 // Push interpreter frames in a loop
2491 Label loop;
2492 __ bind(loop);
2493 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2494 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2495 __ pushptr(Address(rcx, 0)); // save return address
2496 __ enter(); // save old & set new rbp,
2497 __ subptr(rsp, rbx); // Prolog!
2498 __ movptr(rbx, sp_temp); // sender's sp
2499 // This value is corrected by layout_activation_impl
2500 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2501 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2502 __ movptr(sp_temp, rsp); // pass to next frame
2503 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2504 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2505 __ decrementl(counter); // decrement counter
2506 __ jcc(Assembler::notZero, loop);
2507 __ pushptr(Address(rcx, 0)); // save final return address
2508
2509 // Re-push self-frame
2510 __ enter(); // save old & set new rbp,
2511
2512 // Return address and rbp, are in place
2513 // We'll push additional args later. Just allocate a full sized
2514 // register save area
2515 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2516
2517 // Restore frame locals after moving the frame
2518 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2519 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2520 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2521 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2522 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2523
2524 // Set up the args to unpack_frame
2525
2526 __ pushl(unpack_kind); // get the unpack_kind value
2527 __ get_thread(rcx);
2528 __ push(rcx);
2529
2530 // set last_Java_sp, last_Java_fp
2531 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2532
2533 // Call C code. Need thread but NOT official VM entry
2534 // crud. We cannot block on this call, no GC can happen. Call should
2535 // restore return values to their stack-slots with the new SP.
2536 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2537 // Set an oopmap for the call site
2538 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2539
2540 // rax, contains the return result type
2541 __ push(rax);
2542
2543 __ get_thread(rcx);
2544 __ reset_last_Java_frame(rcx, false);
2545
2546 // Collect return values
2547 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2548 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2549
2550 // Clear floating point stack before returning to interpreter
2551 __ empty_FPU_stack();
2552
2553 // Check if we should push the float or double return value.
2554 Label results_done, yes_double_value;
2555 __ cmpl(Address(rsp, 0), T_DOUBLE);
2556 __ jcc (Assembler::zero, yes_double_value);
2557 __ cmpl(Address(rsp, 0), T_FLOAT);
2558 __ jcc (Assembler::notZero, results_done);
2559
2560 // return float value as expected by interpreter
2561 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2562 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2563 __ jmp(results_done);
2564
2565 // return double value as expected by interpreter
2566 __ bind(yes_double_value);
2567 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2568 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2569
2570 __ bind(results_done);
2571
2572 // Pop self-frame.
2573 __ leave(); // Epilog!
2574
2575 // Jump to interpreter
2576 __ ret(0);
2577
2578 // -------------
2579 // make sure all code is generated
2580 masm->flush();
2581
2582 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2583 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2584 }
2585
2586
2587 #ifdef COMPILER2
2588 //------------------------------generate_uncommon_trap_blob--------------------
2589 void SharedRuntime::generate_uncommon_trap_blob() {
2590 // allocate space for the code
2591 ResourceMark rm;
2592 // setup code generation tools
2593 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2594 MacroAssembler* masm = new MacroAssembler(&buffer);
2595
2596 enum frame_layout {
2597 arg0_off, // thread sp + 0 // Arg location for
2598 arg1_off, // unloaded_class_index sp + 1 // calling C
2599 arg2_off, // exec_mode sp + 2
2600 // The frame sender code expects that rbp will be in the "natural" place and
2601 // will override any oopMap setting for it. We must therefore force the layout
2602 // so that it agrees with the frame sender code.
2603 rbp_off, // callee saved register sp + 3
2604 return_off, // slot for return address sp + 4
2605 framesize
2606 };
2607
2608 address start = __ pc();
2609
2610 if (UseRTMLocking) {
2611 // Abort RTM transaction before possible nmethod deoptimization.
2612 __ xabort(0);
2613 }
2614
2615 // Push self-frame.
2616 __ subptr(rsp, return_off*wordSize); // Epilog!
2617
2618 // rbp, is an implicitly saved callee saved register (i.e. the calling
2619 // convention will save restore it in prolog/epilog) Other than that
2620 // there are no callee save registers no that adapter frames are gone.
2621 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2622
2623 // Clear the floating point exception stack
2624 __ empty_FPU_stack();
2625
2626 // set last_Java_sp
2627 __ get_thread(rdx);
2628 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2629
2630 // Call C code. Need thread but NOT official VM entry
2631 // crud. We cannot block on this call, no GC can happen. Call should
2632 // capture callee-saved registers as well as return values.
2633 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2634 // argument already in ECX
2635 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2636 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2637 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2638
2639 // Set an oopmap for the call site
2640 OopMapSet *oop_maps = new OopMapSet();
2641 OopMap* map = new OopMap( framesize, 0 );
2642 // No oopMap for rbp, it is known implicitly
2643
2644 oop_maps->add_gc_map( __ pc()-start, map);
2645
2646 __ get_thread(rcx);
2647
2648 __ reset_last_Java_frame(rcx, false);
2649
2650 // Load UnrollBlock into EDI
2651 __ movptr(rdi, rax);
2652
2653 #ifdef ASSERT
2654 { Label L;
2655 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2656 (int32_t)Deoptimization::Unpack_uncommon_trap);
2657 __ jcc(Assembler::equal, L);
2658 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2659 __ bind(L);
2660 }
2661 #endif
2662
2663 // Pop all the frames we must move/replace.
2664 //
2665 // Frame picture (youngest to oldest)
2666 // 1: self-frame (no frame link)
2667 // 2: deopting frame (no frame link)
2668 // 3: caller of deopting frame (could be compiled/interpreted).
2669
2670 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2671 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2672
2673 // Pop deoptimized frame
2674 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2675 __ addptr(rsp, rcx);
2676
2677 // sp should be pointing at the return address to the caller (3)
2678
2679 // Pick up the initial fp we should save
2680 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2681 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2682
2683 #ifdef ASSERT
2684 // Compilers generate code that bang the stack by as much as the
2685 // interpreter would need. So this stack banging should never
2686 // trigger a fault. Verify that it does not on non product builds.
2687 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2688 __ bang_stack_size(rbx, rcx);
2689 #endif
2690
2691 // Load array of frame pcs into ECX
2692 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2693
2694 __ pop(rsi); // trash the pc
2695
2696 // Load array of frame sizes into ESI
2697 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2698
2699 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2700
2701 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2702 __ movl(counter, rbx);
2703
2704 // Now adjust the caller's stack to make up for the extra locals
2705 // but record the original sp so that we can save it in the skeletal interpreter
2706 // frame and the stack walking of interpreter_sender will get the unextended sp
2707 // value and not the "real" sp value.
2708
2709 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2710 __ movptr(sp_temp, rsp);
2711 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2712 __ subptr(rsp, rbx);
2713
2714 // Push interpreter frames in a loop
2715 Label loop;
2716 __ bind(loop);
2717 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2718 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2719 __ pushptr(Address(rcx, 0)); // save return address
2720 __ enter(); // save old & set new rbp,
2721 __ subptr(rsp, rbx); // Prolog!
2722 __ movptr(rbx, sp_temp); // sender's sp
2723 // This value is corrected by layout_activation_impl
2724 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2725 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2726 __ movptr(sp_temp, rsp); // pass to next frame
2727 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2728 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2729 __ decrementl(counter); // decrement counter
2730 __ jcc(Assembler::notZero, loop);
2731 __ pushptr(Address(rcx, 0)); // save final return address
2732
2733 // Re-push self-frame
2734 __ enter(); // save old & set new rbp,
2735 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2736
2737
2738 // set last_Java_sp, last_Java_fp
2739 __ get_thread(rdi);
2740 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2741
2742 // Call C code. Need thread but NOT official VM entry
2743 // crud. We cannot block on this call, no GC can happen. Call should
2744 // restore return values to their stack-slots with the new SP.
2745 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2746 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2747 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2748 // Set an oopmap for the call site
2749 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2750
2751 __ get_thread(rdi);
2752 __ reset_last_Java_frame(rdi, true);
2753
2754 // Pop self-frame.
2755 __ leave(); // Epilog!
2756
2757 // Jump to interpreter
2758 __ ret(0);
2759
2760 // -------------
2761 // make sure all code is generated
2762 masm->flush();
2763
2764 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2765 }
2766 #endif // COMPILER2
2767
2768 //------------------------------generate_handler_blob------
2769 //
2770 // Generate a special Compile2Runtime blob that saves all registers,
2771 // setup oopmap, and calls safepoint code to stop the compiled code for
2772 // a safepoint.
2773 //
2774 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2775
2776 // Account for thread arg in our frame
2777 const int additional_words = 1;
2778 int frame_size_in_words;
2779
2780 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2781
2782 ResourceMark rm;
2783 OopMapSet *oop_maps = new OopMapSet();
2784 OopMap* map;
2785
2786 // allocate space for the code
2787 // setup code generation tools
2788 CodeBuffer buffer("handler_blob", 1024, 512);
2789 MacroAssembler* masm = new MacroAssembler(&buffer);
2790
2791 const Register java_thread = rdi; // callee-saved for VC++
2792 address start = __ pc();
2793 address call_pc = NULL;
2794 bool cause_return = (poll_type == POLL_AT_RETURN);
2795 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2796
2797 if (UseRTMLocking) {
2798 // Abort RTM transaction before calling runtime
2799 // because critical section will be large and will be
2800 // aborted anyway. Also nmethod could be deoptimized.
2801 __ xabort(0);
2802 }
2803
2804 // If cause_return is true we are at a poll_return and there is
2805 // the return address on the stack to the caller on the nmethod
2806 // that is safepoint. We can leave this return on the stack and
2807 // effectively complete the return and safepoint in the caller.
2808 // Otherwise we push space for a return address that the safepoint
2809 // handler will install later to make the stack walking sensible.
2810 if (!cause_return)
2811 __ push(rbx); // Make room for return address (or push it again)
2812
2813 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2814
2815 // The following is basically a call_VM. However, we need the precise
2816 // address of the call in order to generate an oopmap. Hence, we do all the
2817 // work ourselves.
2818
2819 // Push thread argument and setup last_Java_sp
2820 __ get_thread(java_thread);
2821 __ push(java_thread);
2822 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2823
2824 // if this was not a poll_return then we need to correct the return address now.
2825 if (!cause_return) {
2826 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2827 // Additionally, rbx is a callee saved register and we can look at it later to determine
2828 // if someone changed the return address for us!
2829 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2830 __ movptr(Address(rbp, wordSize), rbx);
2831 }
2832
2833 // do the call
2834 __ call(RuntimeAddress(call_ptr));
2835
2836 // Set an oopmap for the call site. This oopmap will map all
2837 // oop-registers and debug-info registers as callee-saved. This
2838 // will allow deoptimization at this safepoint to find all possible
2839 // debug-info recordings, as well as let GC find all oops.
2840
2841 oop_maps->add_gc_map( __ pc() - start, map);
2842
2843 // Discard arg
2844 __ pop(rcx);
2845
2846 Label noException;
2847
2848 // Clear last_Java_sp again
2849 __ get_thread(java_thread);
2850 __ reset_last_Java_frame(java_thread, false);
2851
2852 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2853 __ jcc(Assembler::equal, noException);
2854
2855 // Exception pending
2856 RegisterSaver::restore_live_registers(masm, save_vectors);
2857
2858 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2859
2860 __ bind(noException);
2861
2862 Label no_adjust, bail, not_special;
2863 if (!cause_return) {
2864 // If our stashed return pc was modified by the runtime we avoid touching it
2865 __ cmpptr(rbx, Address(rbp, wordSize));
2866 __ jccb(Assembler::notEqual, no_adjust);
2867
2868 // Skip over the poll instruction.
2869 // See NativeInstruction::is_safepoint_poll()
2870 // Possible encodings:
2871 // 85 00 test %eax,(%rax)
2872 // 85 01 test %eax,(%rcx)
2873 // 85 02 test %eax,(%rdx)
2874 // 85 03 test %eax,(%rbx)
2875 // 85 06 test %eax,(%rsi)
2876 // 85 07 test %eax,(%rdi)
2877 //
2878 // 85 04 24 test %eax,(%rsp)
2879 // 85 45 00 test %eax,0x0(%rbp)
2880
2881 #ifdef ASSERT
2882 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2883 #endif
2884 // rsp/rbp base encoding takes 3 bytes with the following register values:
2885 // rsp 0x04
2886 // rbp 0x05
2887 __ movzbl(rcx, Address(rbx, 1));
2888 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2889 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
2890 __ cmpptr(rcx, 1);
2891 __ jcc(Assembler::above, not_special);
2892 __ addptr(rbx, 1);
2893 __ bind(not_special);
2894 #ifdef ASSERT
2895 // Verify the correct encoding of the poll we're about to skip.
2896 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2897 __ jcc(Assembler::notEqual, bail);
2898 // Mask out the modrm bits
2899 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2900 // rax encodes to 0, so if the bits are nonzero it's incorrect
2901 __ jcc(Assembler::notZero, bail);
2902 #endif
2903 // Adjust return pc forward to step over the safepoint poll instruction
2904 __ addptr(rbx, 2);
2905 __ movptr(Address(rbp, wordSize), rbx);
2906 }
2907
2908 __ bind(no_adjust);
2909 // Normal exit, register restoring and exit
2910 RegisterSaver::restore_live_registers(masm, save_vectors);
2911
2912 __ ret(0);
2913
2914 #ifdef ASSERT
2915 __ bind(bail);
2916 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2917 #endif
2918
2919 // make sure all code is generated
2920 masm->flush();
2921
2922 // Fill-out other meta info
2923 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2924 }
2925
2926 //
2927 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2928 //
2929 // Generate a stub that calls into vm to find out the proper destination
2930 // of a java call. All the argument registers are live at this point
2931 // but since this is generic code we don't know what they are and the caller
2932 // must do any gc of the args.
2933 //
2934 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2935 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2936
2937 // allocate space for the code
2938 ResourceMark rm;
2939
2940 CodeBuffer buffer(name, 1000, 512);
2941 MacroAssembler* masm = new MacroAssembler(&buffer);
2942
2943 int frame_size_words;
2944 enum frame_layout {
2945 thread_off,
2946 extra_words };
2947
2948 OopMapSet *oop_maps = new OopMapSet();
2949 OopMap* map = NULL;
2950
2951 int start = __ offset();
2952
2953 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2954
2955 int frame_complete = __ offset();
2956
2957 const Register thread = rdi;
2958 __ get_thread(rdi);
2959
2960 __ push(thread);
2961 __ set_last_Java_frame(thread, noreg, rbp, NULL);
2962
2963 __ call(RuntimeAddress(destination));
2964
2965
2966 // Set an oopmap for the call site.
2967 // We need this not only for callee-saved registers, but also for volatile
2968 // registers that the compiler might be keeping live across a safepoint.
2969
2970 oop_maps->add_gc_map( __ offset() - start, map);
2971
2972 // rax, contains the address we are going to jump to assuming no exception got installed
2973
2974 __ addptr(rsp, wordSize);
2975
2976 // clear last_Java_sp
2977 __ reset_last_Java_frame(thread, true);
2978 // check for pending exceptions
2979 Label pending;
2980 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2981 __ jcc(Assembler::notEqual, pending);
2982
2983 // get the returned Method*
2984 __ get_vm_result_2(rbx, thread);
2985 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2986
2987 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2988
2989 RegisterSaver::restore_live_registers(masm);
2990
2991 // We are back the the original state on entry and ready to go.
2992
2993 __ jmp(rax);
2994
2995 // Pending exception after the safepoint
2996
2997 __ bind(pending);
2998
2999 RegisterSaver::restore_live_registers(masm);
3000
3001 // exception pending => remove activation and forward to exception handler
3002
3003 __ get_thread(thread);
3004 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3005 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3006 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3007
3008 // -------------
3009 // make sure all code is generated
3010 masm->flush();
3011
3012 // return the blob
3013 // frame_size_words or bytes??
3014 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3015 }
3016
3017 #ifdef COMPILER2
3018 RuntimeStub* SharedRuntime::make_native_invoker(address call_target,
3019 int shadow_space_bytes,
3020 const GrowableArray<VMReg>& input_registers,
3021 const GrowableArray<VMReg>& output_registers) {
3022 ShouldNotCallThis();
3023 return nullptr;
3024 }
3025 #endif