1 /* 2 * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_CodeStubs.hpp" 27 #include "c1/c1_InstructionPrinter.hpp" 28 #include "c1/c1_LIR.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_ValueStack.hpp" 31 #include "ci/ciInstance.hpp" 32 #include "runtime/safepointMechanism.inline.hpp" 33 #include "runtime/sharedRuntime.hpp" 34 #include "runtime/vm_version.hpp" 35 36 Register LIR_OprDesc::as_register() const { 37 return FrameMap::cpu_rnr2reg(cpu_regnr()); 38 } 39 40 Register LIR_OprDesc::as_register_lo() const { 41 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 42 } 43 44 Register LIR_OprDesc::as_register_hi() const { 45 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 46 } 47 48 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 49 50 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 51 ValueTag tag = type->tag(); 52 switch (tag) { 53 case metaDataTag : { 54 ClassConstant* c = type->as_ClassConstant(); 55 if (c != NULL && !c->value()->is_loaded()) { 56 return LIR_OprFact::metadataConst(NULL); 57 } else if (c != NULL) { 58 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 59 } else { 60 MethodConstant* m = type->as_MethodConstant(); 61 assert (m != NULL, "not a class or a method?"); 62 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 63 } 64 } 65 case objectTag : { 66 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 67 } 68 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 69 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 70 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 71 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 72 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 73 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 74 } 75 } 76 77 78 //--------------------------------------------------- 79 80 81 LIR_Address::Scale LIR_Address::scale(BasicType type) { 82 int elem_size = type2aelembytes(type); 83 switch (elem_size) { 84 case 1: return LIR_Address::times_1; 85 case 2: return LIR_Address::times_2; 86 case 4: return LIR_Address::times_4; 87 case 8: return LIR_Address::times_8; 88 } 89 ShouldNotReachHere(); 90 return LIR_Address::times_1; 91 } 92 93 //--------------------------------------------------- 94 95 char LIR_OprDesc::type_char(BasicType t) { 96 switch (t) { 97 case T_ARRAY: 98 t = T_OBJECT; 99 case T_BOOLEAN: 100 case T_CHAR: 101 case T_FLOAT: 102 case T_DOUBLE: 103 case T_BYTE: 104 case T_SHORT: 105 case T_INT: 106 case T_LONG: 107 case T_OBJECT: 108 case T_ADDRESS: 109 case T_VOID: 110 return ::type2char(t); 111 case T_METADATA: 112 return 'M'; 113 case T_ILLEGAL: 114 return '?'; 115 116 default: 117 ShouldNotReachHere(); 118 return '?'; 119 } 120 } 121 122 #ifndef PRODUCT 123 void LIR_OprDesc::validate_type() const { 124 125 #ifdef ASSERT 126 if (!is_pointer() && !is_illegal()) { 127 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 128 switch (as_BasicType(type_field())) { 129 case T_LONG: 130 assert((kindfield == cpu_register || kindfield == stack_value) && 131 size_field() == double_size, "must match"); 132 break; 133 case T_FLOAT: 134 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 135 assert((kindfield == fpu_register || kindfield == stack_value 136 ARM_ONLY(|| kindfield == cpu_register) 137 PPC32_ONLY(|| kindfield == cpu_register) ) && 138 size_field() == single_size, "must match"); 139 break; 140 case T_DOUBLE: 141 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 142 assert((kindfield == fpu_register || kindfield == stack_value 143 ARM_ONLY(|| kindfield == cpu_register) 144 PPC32_ONLY(|| kindfield == cpu_register) ) && 145 size_field() == double_size, "must match"); 146 break; 147 case T_BOOLEAN: 148 case T_CHAR: 149 case T_BYTE: 150 case T_SHORT: 151 case T_INT: 152 case T_ADDRESS: 153 case T_OBJECT: 154 case T_METADATA: 155 case T_ARRAY: 156 assert((kindfield == cpu_register || kindfield == stack_value) && 157 size_field() == single_size, "must match"); 158 break; 159 160 case T_ILLEGAL: 161 // XXX TKR also means unknown right now 162 // assert(is_illegal(), "must match"); 163 break; 164 165 default: 166 ShouldNotReachHere(); 167 } 168 } 169 #endif 170 171 } 172 #endif // PRODUCT 173 174 175 bool LIR_OprDesc::is_oop() const { 176 if (is_pointer()) { 177 return pointer()->is_oop_pointer(); 178 } else { 179 OprType t= type_field(); 180 assert(t != unknown_type, "not set"); 181 return t == object_type; 182 } 183 } 184 185 186 187 void LIR_Op2::verify() const { 188 #ifdef ASSERT 189 switch (code()) { 190 case lir_cmove: 191 case lir_xchg: 192 break; 193 194 default: 195 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 196 "can't produce oops from arith"); 197 } 198 199 if (TwoOperandLIRForm) { 200 201 #ifdef ASSERT 202 bool threeOperandForm = false; 203 #ifdef S390 204 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()). 205 threeOperandForm = 206 code() == lir_shl || 207 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT)); 208 #endif 209 #endif 210 211 switch (code()) { 212 case lir_add: 213 case lir_sub: 214 case lir_mul: 215 case lir_div: 216 case lir_rem: 217 case lir_logic_and: 218 case lir_logic_or: 219 case lir_logic_xor: 220 case lir_shl: 221 case lir_shr: 222 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match"); 223 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 224 break; 225 226 // special handling for lir_ushr because of write barriers 227 case lir_ushr: 228 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant"); 229 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 230 break; 231 232 default: 233 break; 234 } 235 } 236 #endif 237 } 238 239 240 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block) 241 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 242 , _cond(cond) 243 , _label(block->label()) 244 , _block(block) 245 , _ublock(NULL) 246 , _stub(NULL) { 247 } 248 249 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) : 250 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 251 , _cond(cond) 252 , _label(stub->entry()) 253 , _block(NULL) 254 , _ublock(NULL) 255 , _stub(stub) { 256 } 257 258 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock) 259 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 260 , _cond(cond) 261 , _label(block->label()) 262 , _block(block) 263 , _ublock(ublock) 264 , _stub(NULL) 265 { 266 } 267 268 void LIR_OpBranch::change_block(BlockBegin* b) { 269 assert(_block != NULL, "must have old block"); 270 assert(_block->label() == label(), "must be equal"); 271 272 _block = b; 273 _label = b->label(); 274 } 275 276 void LIR_OpBranch::change_ublock(BlockBegin* b) { 277 assert(_ublock != NULL, "must have old block"); 278 _ublock = b; 279 } 280 281 void LIR_OpBranch::negate_cond() { 282 switch (_cond) { 283 case lir_cond_equal: _cond = lir_cond_notEqual; break; 284 case lir_cond_notEqual: _cond = lir_cond_equal; break; 285 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 286 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 287 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 288 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 289 default: ShouldNotReachHere(); 290 } 291 } 292 293 294 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 295 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 296 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 297 CodeStub* stub) 298 299 : LIR_Op(code, result, NULL) 300 , _object(object) 301 , _array(LIR_OprFact::illegalOpr) 302 , _klass(klass) 303 , _tmp1(tmp1) 304 , _tmp2(tmp2) 305 , _tmp3(tmp3) 306 , _fast_check(fast_check) 307 , _info_for_patch(info_for_patch) 308 , _info_for_exception(info_for_exception) 309 , _stub(stub) 310 , _profiled_method(NULL) 311 , _profiled_bci(-1) 312 , _should_profile(false) 313 { 314 if (code == lir_checkcast) { 315 assert(info_for_exception != NULL, "checkcast throws exceptions"); 316 } else if (code == lir_instanceof) { 317 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 318 } else { 319 ShouldNotReachHere(); 320 } 321 } 322 323 324 325 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 326 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 327 , _object(object) 328 , _array(array) 329 , _klass(NULL) 330 , _tmp1(tmp1) 331 , _tmp2(tmp2) 332 , _tmp3(tmp3) 333 , _fast_check(false) 334 , _info_for_patch(NULL) 335 , _info_for_exception(info_for_exception) 336 , _stub(NULL) 337 , _profiled_method(NULL) 338 , _profiled_bci(-1) 339 , _should_profile(false) 340 { 341 if (code == lir_store_check) { 342 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 343 assert(info_for_exception != NULL, "store_check throws exceptions"); 344 } else { 345 ShouldNotReachHere(); 346 } 347 } 348 349 350 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 351 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 352 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 353 , _src(src) 354 , _src_pos(src_pos) 355 , _dst(dst) 356 , _dst_pos(dst_pos) 357 , _length(length) 358 , _tmp(tmp) 359 , _expected_type(expected_type) 360 , _flags(flags) { 361 _stub = new ArrayCopyStub(this); 362 } 363 364 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 365 : LIR_Op(lir_updatecrc32, res, NULL) 366 , _crc(crc) 367 , _val(val) { 368 } 369 370 //-------------------verify-------------------------- 371 372 void LIR_Op1::verify() const { 373 switch(code()) { 374 case lir_move: 375 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 376 break; 377 case lir_null_check: 378 assert(in_opr()->is_register(), "must be"); 379 break; 380 case lir_return: 381 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 382 break; 383 default: 384 break; 385 } 386 } 387 388 void LIR_OpRTCall::verify() const { 389 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 390 } 391 392 //-------------------visits-------------------------- 393 394 // complete rework of LIR instruction visitor. 395 // The virtual call for each instruction type is replaced by a big 396 // switch that adds the operands for each instruction 397 398 void LIR_OpVisitState::visit(LIR_Op* op) { 399 // copy information from the LIR_Op 400 reset(); 401 set_op(op); 402 403 switch (op->code()) { 404 405 // LIR_Op0 406 case lir_backwardbranch_target: // result and info always invalid 407 case lir_fpop_raw: // result and info always invalid 408 case lir_breakpoint: // result and info always invalid 409 case lir_membar: // result and info always invalid 410 case lir_membar_acquire: // result and info always invalid 411 case lir_membar_release: // result and info always invalid 412 case lir_membar_loadload: // result and info always invalid 413 case lir_membar_storestore: // result and info always invalid 414 case lir_membar_loadstore: // result and info always invalid 415 case lir_membar_storeload: // result and info always invalid 416 case lir_on_spin_wait: 417 { 418 assert(op->as_Op0() != NULL, "must be"); 419 assert(op->_info == NULL, "info not used by this instruction"); 420 assert(op->_result->is_illegal(), "not used"); 421 break; 422 } 423 424 case lir_nop: // may have info, result always invalid 425 case lir_std_entry: // may have result, info always invalid 426 case lir_osr_entry: // may have result, info always invalid 427 case lir_get_thread: // may have result, info always invalid 428 { 429 assert(op->as_Op0() != NULL, "must be"); 430 if (op->_info != NULL) do_info(op->_info); 431 if (op->_result->is_valid()) do_output(op->_result); 432 break; 433 } 434 435 436 // LIR_OpLabel 437 case lir_label: // result and info always invalid 438 { 439 assert(op->as_OpLabel() != NULL, "must be"); 440 assert(op->_info == NULL, "info not used by this instruction"); 441 assert(op->_result->is_illegal(), "not used"); 442 break; 443 } 444 445 446 // LIR_Op1 447 case lir_fxch: // input always valid, result and info always invalid 448 case lir_fld: // input always valid, result and info always invalid 449 case lir_push: // input always valid, result and info always invalid 450 case lir_pop: // input always valid, result and info always invalid 451 case lir_leal: // input and result always valid, info always invalid 452 case lir_monaddr: // input and result always valid, info always invalid 453 case lir_null_check: // input and info always valid, result always invalid 454 case lir_move: // input and result always valid, may have info 455 { 456 assert(op->as_Op1() != NULL, "must be"); 457 LIR_Op1* op1 = (LIR_Op1*)op; 458 459 if (op1->_info) do_info(op1->_info); 460 if (op1->_opr->is_valid()) do_input(op1->_opr); 461 if (op1->_result->is_valid()) do_output(op1->_result); 462 463 break; 464 } 465 466 case lir_return: 467 { 468 assert(op->as_OpReturn() != NULL, "must be"); 469 LIR_OpReturn* op_ret = (LIR_OpReturn*)op; 470 471 if (op_ret->_info) do_info(op_ret->_info); 472 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr); 473 if (op_ret->_result->is_valid()) do_output(op_ret->_result); 474 if (op_ret->stub() != NULL) do_stub(op_ret->stub()); 475 476 break; 477 } 478 479 case lir_safepoint: 480 { 481 assert(op->as_Op1() != NULL, "must be"); 482 LIR_Op1* op1 = (LIR_Op1*)op; 483 484 assert(op1->_info != NULL, ""); do_info(op1->_info); 485 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 486 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 487 488 break; 489 } 490 491 // LIR_OpConvert; 492 case lir_convert: // input and result always valid, info always invalid 493 { 494 assert(op->as_OpConvert() != NULL, "must be"); 495 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 496 497 assert(opConvert->_info == NULL, "must be"); 498 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 499 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 500 #ifdef PPC32 501 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 502 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 503 #endif 504 do_stub(opConvert->_stub); 505 506 break; 507 } 508 509 // LIR_OpBranch; 510 case lir_branch: // may have info, input and result register always invalid 511 case lir_cond_float_branch: // may have info, input and result register always invalid 512 { 513 assert(op->as_OpBranch() != NULL, "must be"); 514 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 515 516 if (opBranch->_info != NULL) do_info(opBranch->_info); 517 assert(opBranch->_result->is_illegal(), "not used"); 518 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 519 520 break; 521 } 522 523 524 // LIR_OpAllocObj 525 case lir_alloc_object: 526 { 527 assert(op->as_OpAllocObj() != NULL, "must be"); 528 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 529 530 if (opAllocObj->_info) do_info(opAllocObj->_info); 531 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 532 do_temp(opAllocObj->_opr); 533 } 534 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 535 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 536 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 537 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 538 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 539 do_stub(opAllocObj->_stub); 540 break; 541 } 542 543 544 // LIR_OpRoundFP; 545 case lir_roundfp: { 546 assert(op->as_OpRoundFP() != NULL, "must be"); 547 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 548 549 assert(op->_info == NULL, "info not used by this instruction"); 550 assert(opRoundFP->_tmp->is_illegal(), "not used"); 551 do_input(opRoundFP->_opr); 552 do_output(opRoundFP->_result); 553 554 break; 555 } 556 557 558 // LIR_Op2 559 case lir_cmp: 560 case lir_cmp_l2i: 561 case lir_ucmp_fd2i: 562 case lir_cmp_fd2i: 563 case lir_add: 564 case lir_sub: 565 case lir_rem: 566 case lir_sqrt: 567 case lir_abs: 568 case lir_neg: 569 case lir_logic_and: 570 case lir_logic_or: 571 case lir_logic_xor: 572 case lir_shl: 573 case lir_shr: 574 case lir_ushr: 575 case lir_xadd: 576 case lir_xchg: 577 case lir_assert: 578 { 579 assert(op->as_Op2() != NULL, "must be"); 580 LIR_Op2* op2 = (LIR_Op2*)op; 581 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 582 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 583 584 if (op2->_info) do_info(op2->_info); 585 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 586 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 587 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 588 if (op2->_result->is_valid()) do_output(op2->_result); 589 if (op->code() == lir_xchg || op->code() == lir_xadd) { 590 // on ARM and PPC, return value is loaded first so could 591 // destroy inputs. On other platforms that implement those 592 // (x86, sparc), the extra constrainsts are harmless. 593 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 594 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 595 } 596 597 break; 598 } 599 600 // special handling for cmove: right input operand must not be equal 601 // to the result operand, otherwise the backend fails 602 case lir_cmove: 603 { 604 assert(op->as_Op2() != NULL, "must be"); 605 LIR_Op2* op2 = (LIR_Op2*)op; 606 607 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && 608 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 609 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 610 611 do_input(op2->_opr1); 612 do_input(op2->_opr2); 613 do_temp(op2->_opr2); 614 do_output(op2->_result); 615 616 break; 617 } 618 619 // vspecial handling for strict operations: register input operands 620 // as temp to guarantee that they do not overlap with other 621 // registers 622 case lir_mul: 623 case lir_div: 624 { 625 assert(op->as_Op2() != NULL, "must be"); 626 LIR_Op2* op2 = (LIR_Op2*)op; 627 628 assert(op2->_info == NULL, "not used"); 629 assert(op2->_opr1->is_valid(), "used"); 630 assert(op2->_opr2->is_valid(), "used"); 631 assert(op2->_result->is_valid(), "used"); 632 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 633 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 634 635 do_input(op2->_opr1); do_temp(op2->_opr1); 636 do_input(op2->_opr2); do_temp(op2->_opr2); 637 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 638 do_output(op2->_result); 639 640 break; 641 } 642 643 case lir_throw: { 644 assert(op->as_Op2() != NULL, "must be"); 645 LIR_Op2* op2 = (LIR_Op2*)op; 646 647 if (op2->_info) do_info(op2->_info); 648 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 649 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 650 assert(op2->_result->is_illegal(), "no result"); 651 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 652 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 653 654 break; 655 } 656 657 case lir_unwind: { 658 assert(op->as_Op1() != NULL, "must be"); 659 LIR_Op1* op1 = (LIR_Op1*)op; 660 661 assert(op1->_info == NULL, "no info"); 662 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 663 assert(op1->_result->is_illegal(), "no result"); 664 665 break; 666 } 667 668 // LIR_Op3 669 case lir_idiv: 670 case lir_irem: { 671 assert(op->as_Op3() != NULL, "must be"); 672 LIR_Op3* op3= (LIR_Op3*)op; 673 674 if (op3->_info) do_info(op3->_info); 675 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 676 677 // second operand is input and temp, so ensure that second operand 678 // and third operand get not the same register 679 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 680 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 681 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 682 683 if (op3->_result->is_valid()) do_output(op3->_result); 684 685 break; 686 } 687 688 case lir_fmad: 689 case lir_fmaf: { 690 assert(op->as_Op3() != NULL, "must be"); 691 LIR_Op3* op3= (LIR_Op3*)op; 692 assert(op3->_info == NULL, "no info"); 693 do_input(op3->_opr1); 694 do_input(op3->_opr2); 695 do_input(op3->_opr3); 696 do_output(op3->_result); 697 break; 698 } 699 700 // LIR_OpJavaCall 701 case lir_static_call: 702 case lir_optvirtual_call: 703 case lir_icvirtual_call: 704 case lir_dynamic_call: { 705 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 706 assert(opJavaCall != NULL, "must be"); 707 708 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 709 710 // only visit register parameters 711 int n = opJavaCall->_arguments->length(); 712 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 713 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 714 do_input(*opJavaCall->_arguments->adr_at(i)); 715 } 716 } 717 718 if (opJavaCall->_info) do_info(opJavaCall->_info); 719 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 720 opJavaCall->is_method_handle_invoke()) { 721 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 722 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 723 } 724 do_call(); 725 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 726 727 break; 728 } 729 730 731 // LIR_OpRTCall 732 case lir_rtcall: { 733 assert(op->as_OpRTCall() != NULL, "must be"); 734 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 735 736 // only visit register parameters 737 int n = opRTCall->_arguments->length(); 738 for (int i = 0; i < n; i++) { 739 if (!opRTCall->_arguments->at(i)->is_pointer()) { 740 do_input(*opRTCall->_arguments->adr_at(i)); 741 } 742 } 743 if (opRTCall->_info) do_info(opRTCall->_info); 744 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 745 do_call(); 746 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 747 748 break; 749 } 750 751 752 // LIR_OpArrayCopy 753 case lir_arraycopy: { 754 assert(op->as_OpArrayCopy() != NULL, "must be"); 755 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 756 757 assert(opArrayCopy->_result->is_illegal(), "unused"); 758 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 759 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 760 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 761 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 762 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 763 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 764 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 765 766 // the implementation of arraycopy always has a call into the runtime 767 do_call(); 768 769 break; 770 } 771 772 773 // LIR_OpUpdateCRC32 774 case lir_updatecrc32: { 775 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 776 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 777 778 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 779 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 780 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 781 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 782 783 break; 784 } 785 786 787 // LIR_OpLock 788 case lir_lock: 789 case lir_unlock: { 790 assert(op->as_OpLock() != NULL, "must be"); 791 LIR_OpLock* opLock = (LIR_OpLock*)op; 792 793 if (opLock->_info) do_info(opLock->_info); 794 795 // TODO: check if these operands really have to be temp 796 // (or if input is sufficient). This may have influence on the oop map! 797 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 798 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 799 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 800 801 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 802 assert(opLock->_result->is_illegal(), "unused"); 803 804 do_stub(opLock->_stub); 805 806 break; 807 } 808 809 810 // LIR_OpDelay 811 case lir_delay_slot: { 812 assert(op->as_OpDelay() != NULL, "must be"); 813 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 814 815 visit(opDelay->delay_op()); 816 break; 817 } 818 819 // LIR_OpTypeCheck 820 case lir_instanceof: 821 case lir_checkcast: 822 case lir_store_check: { 823 assert(op->as_OpTypeCheck() != NULL, "must be"); 824 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 825 826 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 827 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 828 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 829 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 830 do_temp(opTypeCheck->_object); 831 } 832 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 833 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 834 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 835 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 836 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 837 do_stub(opTypeCheck->_stub); 838 break; 839 } 840 841 // LIR_OpCompareAndSwap 842 case lir_cas_long: 843 case lir_cas_obj: 844 case lir_cas_int: { 845 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 846 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 847 848 assert(opCompareAndSwap->_addr->is_valid(), "used"); 849 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 850 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 851 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 852 do_input(opCompareAndSwap->_addr); 853 do_temp(opCompareAndSwap->_addr); 854 do_input(opCompareAndSwap->_cmp_value); 855 do_temp(opCompareAndSwap->_cmp_value); 856 do_input(opCompareAndSwap->_new_value); 857 do_temp(opCompareAndSwap->_new_value); 858 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 859 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 860 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 861 862 break; 863 } 864 865 866 // LIR_OpAllocArray; 867 case lir_alloc_array: { 868 assert(op->as_OpAllocArray() != NULL, "must be"); 869 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 870 871 if (opAllocArray->_info) do_info(opAllocArray->_info); 872 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 873 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 874 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 875 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 876 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 877 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 878 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 879 do_stub(opAllocArray->_stub); 880 break; 881 } 882 883 // LIR_OpProfileCall: 884 case lir_profile_call: { 885 assert(op->as_OpProfileCall() != NULL, "must be"); 886 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 887 888 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 889 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 890 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 891 break; 892 } 893 894 // LIR_OpProfileType: 895 case lir_profile_type: { 896 assert(op->as_OpProfileType() != NULL, "must be"); 897 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 898 899 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 900 do_input(opProfileType->_obj); 901 do_temp(opProfileType->_tmp); 902 break; 903 } 904 default: 905 op->visit(this); 906 } 907 } 908 909 void LIR_Op::visit(LIR_OpVisitState* state) { 910 ShouldNotReachHere(); 911 } 912 913 void LIR_OpVisitState::do_stub(CodeStub* stub) { 914 if (stub != NULL) { 915 stub->visit(this); 916 } 917 } 918 919 XHandlers* LIR_OpVisitState::all_xhandler() { 920 XHandlers* result = NULL; 921 922 int i; 923 for (i = 0; i < info_count(); i++) { 924 if (info_at(i)->exception_handlers() != NULL) { 925 result = info_at(i)->exception_handlers(); 926 break; 927 } 928 } 929 930 #ifdef ASSERT 931 for (i = 0; i < info_count(); i++) { 932 assert(info_at(i)->exception_handlers() == NULL || 933 info_at(i)->exception_handlers() == result, 934 "only one xhandler list allowed per LIR-operation"); 935 } 936 #endif 937 938 if (result != NULL) { 939 return result; 940 } else { 941 return new XHandlers(); 942 } 943 944 return result; 945 } 946 947 948 #ifdef ASSERT 949 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 950 visit(op); 951 952 return opr_count(inputMode) == 0 && 953 opr_count(outputMode) == 0 && 954 opr_count(tempMode) == 0 && 955 info_count() == 0 && 956 !has_call() && 957 !has_slow_case(); 958 } 959 #endif 960 961 // LIR_OpReturn 962 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) : 963 LIR_Op1(lir_return, opr, (CodeEmitInfo*)NULL /* info */), 964 _stub(NULL) { 965 if (VM_Version::supports_stack_watermark_barrier()) { 966 _stub = new C1SafepointPollStub(); 967 } 968 } 969 970 //--------------------------------------------------- 971 972 973 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 974 masm->emit_call(this); 975 } 976 977 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 978 masm->emit_rtcall(this); 979 } 980 981 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 982 masm->emit_opLabel(this); 983 } 984 985 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 986 masm->emit_arraycopy(this); 987 masm->append_code_stub(stub()); 988 } 989 990 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 991 masm->emit_updatecrc32(this); 992 } 993 994 void LIR_Op0::emit_code(LIR_Assembler* masm) { 995 masm->emit_op0(this); 996 } 997 998 void LIR_Op1::emit_code(LIR_Assembler* masm) { 999 masm->emit_op1(this); 1000 } 1001 1002 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1003 masm->emit_alloc_obj(this); 1004 masm->append_code_stub(stub()); 1005 } 1006 1007 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1008 masm->emit_opBranch(this); 1009 if (stub()) { 1010 masm->append_code_stub(stub()); 1011 } 1012 } 1013 1014 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1015 masm->emit_opConvert(this); 1016 if (stub() != NULL) { 1017 masm->append_code_stub(stub()); 1018 } 1019 } 1020 1021 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1022 masm->emit_op2(this); 1023 } 1024 1025 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1026 masm->emit_alloc_array(this); 1027 masm->append_code_stub(stub()); 1028 } 1029 1030 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1031 masm->emit_opTypeCheck(this); 1032 if (stub()) { 1033 masm->append_code_stub(stub()); 1034 } 1035 } 1036 1037 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1038 masm->emit_compare_and_swap(this); 1039 } 1040 1041 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1042 masm->emit_op3(this); 1043 } 1044 1045 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1046 masm->emit_lock(this); 1047 if (stub()) { 1048 masm->append_code_stub(stub()); 1049 } 1050 } 1051 1052 #ifdef ASSERT 1053 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1054 masm->emit_assert(this); 1055 } 1056 #endif 1057 1058 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1059 masm->emit_delay(this); 1060 } 1061 1062 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1063 masm->emit_profile_call(this); 1064 } 1065 1066 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1067 masm->emit_profile_type(this); 1068 } 1069 1070 // LIR_List 1071 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1072 : _operations(8) 1073 , _compilation(compilation) 1074 #ifndef PRODUCT 1075 , _block(block) 1076 #endif 1077 #ifdef ASSERT 1078 , _file(NULL) 1079 , _line(0) 1080 #endif 1081 { } 1082 1083 1084 #ifdef ASSERT 1085 void LIR_List::set_file_and_line(const char * file, int line) { 1086 const char * f = strrchr(file, '/'); 1087 if (f == NULL) f = strrchr(file, '\\'); 1088 if (f == NULL) { 1089 f = file; 1090 } else { 1091 f++; 1092 } 1093 _file = f; 1094 _line = line; 1095 } 1096 #endif 1097 1098 1099 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1100 assert(this == buffer->lir_list(), "wrong lir list"); 1101 const int n = _operations.length(); 1102 1103 if (buffer->number_of_ops() > 0) { 1104 // increase size of instructions list 1105 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1106 // insert ops from buffer into instructions list 1107 int op_index = buffer->number_of_ops() - 1; 1108 int ip_index = buffer->number_of_insertion_points() - 1; 1109 int from_index = n - 1; 1110 int to_index = _operations.length() - 1; 1111 for (; ip_index >= 0; ip_index --) { 1112 int index = buffer->index_at(ip_index); 1113 // make room after insertion point 1114 while (index < from_index) { 1115 _operations.at_put(to_index --, _operations.at(from_index --)); 1116 } 1117 // insert ops from buffer 1118 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1119 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1120 } 1121 } 1122 } 1123 1124 buffer->finish(); 1125 } 1126 1127 1128 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1129 assert(reg->type() == T_OBJECT, "bad reg"); 1130 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1131 } 1132 1133 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1134 assert(reg->type() == T_METADATA, "bad reg"); 1135 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1136 } 1137 1138 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1139 append(new LIR_Op1( 1140 lir_move, 1141 LIR_OprFact::address(addr), 1142 src, 1143 addr->type(), 1144 patch_code, 1145 info)); 1146 } 1147 1148 1149 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1150 append(new LIR_Op1( 1151 lir_move, 1152 LIR_OprFact::address(address), 1153 dst, 1154 address->type(), 1155 patch_code, 1156 info, lir_move_volatile)); 1157 } 1158 1159 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1160 append(new LIR_Op1( 1161 lir_move, 1162 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1163 dst, 1164 type, 1165 patch_code, 1166 info, lir_move_volatile)); 1167 } 1168 1169 1170 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1171 append(new LIR_Op1( 1172 lir_move, 1173 LIR_OprFact::intConst(v), 1174 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1175 type, 1176 patch_code, 1177 info)); 1178 } 1179 1180 1181 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1182 append(new LIR_Op1( 1183 lir_move, 1184 LIR_OprFact::oopConst(o), 1185 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1186 type, 1187 patch_code, 1188 info)); 1189 } 1190 1191 1192 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1193 append(new LIR_Op1( 1194 lir_move, 1195 src, 1196 LIR_OprFact::address(addr), 1197 addr->type(), 1198 patch_code, 1199 info)); 1200 } 1201 1202 1203 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1204 append(new LIR_Op1( 1205 lir_move, 1206 src, 1207 LIR_OprFact::address(addr), 1208 addr->type(), 1209 patch_code, 1210 info, 1211 lir_move_volatile)); 1212 } 1213 1214 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1215 append(new LIR_Op1( 1216 lir_move, 1217 src, 1218 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1219 type, 1220 patch_code, 1221 info, lir_move_volatile)); 1222 } 1223 1224 1225 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1226 append(new LIR_Op3( 1227 lir_idiv, 1228 left, 1229 right, 1230 tmp, 1231 res, 1232 info)); 1233 } 1234 1235 1236 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1237 append(new LIR_Op3( 1238 lir_idiv, 1239 left, 1240 LIR_OprFact::intConst(right), 1241 tmp, 1242 res, 1243 info)); 1244 } 1245 1246 1247 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1248 append(new LIR_Op3( 1249 lir_irem, 1250 left, 1251 right, 1252 tmp, 1253 res, 1254 info)); 1255 } 1256 1257 1258 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1259 append(new LIR_Op3( 1260 lir_irem, 1261 left, 1262 LIR_OprFact::intConst(right), 1263 tmp, 1264 res, 1265 info)); 1266 } 1267 1268 1269 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1270 append(new LIR_Op2( 1271 lir_cmp, 1272 condition, 1273 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1274 LIR_OprFact::intConst(c), 1275 info)); 1276 } 1277 1278 1279 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1280 append(new LIR_Op2( 1281 lir_cmp, 1282 condition, 1283 reg, 1284 LIR_OprFact::address(addr), 1285 info)); 1286 } 1287 1288 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1289 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1290 append(new LIR_OpAllocObj( 1291 klass, 1292 dst, 1293 t1, 1294 t2, 1295 t3, 1296 t4, 1297 header_size, 1298 object_size, 1299 init_check, 1300 stub)); 1301 } 1302 1303 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1304 append(new LIR_OpAllocArray( 1305 klass, 1306 len, 1307 dst, 1308 t1, 1309 t2, 1310 t3, 1311 t4, 1312 type, 1313 stub)); 1314 } 1315 1316 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1317 append(new LIR_Op2( 1318 lir_shl, 1319 value, 1320 count, 1321 dst, 1322 tmp)); 1323 } 1324 1325 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1326 append(new LIR_Op2( 1327 lir_shr, 1328 value, 1329 count, 1330 dst, 1331 tmp)); 1332 } 1333 1334 1335 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1336 append(new LIR_Op2( 1337 lir_ushr, 1338 value, 1339 count, 1340 dst, 1341 tmp)); 1342 } 1343 1344 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1345 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1346 left, 1347 right, 1348 dst)); 1349 } 1350 1351 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1352 append(new LIR_OpLock( 1353 lir_lock, 1354 hdr, 1355 obj, 1356 lock, 1357 scratch, 1358 stub, 1359 info)); 1360 } 1361 1362 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1363 append(new LIR_OpLock( 1364 lir_unlock, 1365 hdr, 1366 obj, 1367 lock, 1368 scratch, 1369 stub, 1370 NULL)); 1371 } 1372 1373 1374 void check_LIR() { 1375 // cannot do the proper checking as PRODUCT and other modes return different results 1376 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1377 } 1378 1379 1380 1381 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1382 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1383 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1384 ciMethod* profiled_method, int profiled_bci) { 1385 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1386 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1387 if (profiled_method != NULL) { 1388 c->set_profiled_method(profiled_method); 1389 c->set_profiled_bci(profiled_bci); 1390 c->set_should_profile(true); 1391 } 1392 append(c); 1393 } 1394 1395 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1396 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1397 if (profiled_method != NULL) { 1398 c->set_profiled_method(profiled_method); 1399 c->set_profiled_bci(profiled_bci); 1400 c->set_should_profile(true); 1401 } 1402 append(c); 1403 } 1404 1405 1406 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1407 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1408 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1409 if (profiled_method != NULL) { 1410 c->set_profiled_method(profiled_method); 1411 c->set_profiled_bci(profiled_bci); 1412 c->set_should_profile(true); 1413 } 1414 append(c); 1415 } 1416 1417 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 1418 if (deoptimize_on_null) { 1419 // Emit an explicit null check and deoptimize if opr is null 1420 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); 1421 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 1422 branch(lir_cond_equal, deopt); 1423 } else { 1424 // Emit an implicit null check 1425 append(new LIR_Op1(lir_null_check, opr, info)); 1426 } 1427 } 1428 1429 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1430 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1431 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1432 } 1433 1434 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1435 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1436 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1437 } 1438 1439 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1440 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1441 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1442 } 1443 1444 1445 #ifdef PRODUCT 1446 1447 void print_LIR(BlockList* blocks) { 1448 } 1449 1450 #else 1451 // LIR_OprDesc 1452 void LIR_OprDesc::print() const { 1453 print(tty); 1454 } 1455 1456 void LIR_OprDesc::print(outputStream* out) const { 1457 if (is_illegal()) { 1458 return; 1459 } 1460 1461 out->print("["); 1462 if (is_pointer()) { 1463 pointer()->print_value_on(out); 1464 } else if (is_single_stack()) { 1465 out->print("stack:%d", single_stack_ix()); 1466 } else if (is_double_stack()) { 1467 out->print("dbl_stack:%d",double_stack_ix()); 1468 } else if (is_virtual()) { 1469 out->print("R%d", vreg_number()); 1470 } else if (is_single_cpu()) { 1471 out->print("%s", as_register()->name()); 1472 } else if (is_double_cpu()) { 1473 out->print("%s", as_register_hi()->name()); 1474 out->print("%s", as_register_lo()->name()); 1475 #if defined(X86) 1476 } else if (is_single_xmm()) { 1477 out->print("%s", as_xmm_float_reg()->name()); 1478 } else if (is_double_xmm()) { 1479 out->print("%s", as_xmm_double_reg()->name()); 1480 } else if (is_single_fpu()) { 1481 out->print("fpu%d", fpu_regnr()); 1482 } else if (is_double_fpu()) { 1483 out->print("fpu%d", fpu_regnrLo()); 1484 #elif defined(AARCH64) 1485 } else if (is_single_fpu()) { 1486 out->print("fpu%d", fpu_regnr()); 1487 } else if (is_double_fpu()) { 1488 out->print("fpu%d", fpu_regnrLo()); 1489 #elif defined(ARM) 1490 } else if (is_single_fpu()) { 1491 out->print("s%d", fpu_regnr()); 1492 } else if (is_double_fpu()) { 1493 out->print("d%d", fpu_regnrLo() >> 1); 1494 #else 1495 } else if (is_single_fpu()) { 1496 out->print("%s", as_float_reg()->name()); 1497 } else if (is_double_fpu()) { 1498 out->print("%s", as_double_reg()->name()); 1499 #endif 1500 1501 } else if (is_illegal()) { 1502 out->print("-"); 1503 } else { 1504 out->print("Unknown Operand"); 1505 } 1506 if (!is_illegal()) { 1507 out->print("|%c", type_char()); 1508 } 1509 if (is_register() && is_last_use()) { 1510 out->print("(last_use)"); 1511 } 1512 out->print("]"); 1513 } 1514 1515 1516 // LIR_Address 1517 void LIR_Const::print_value_on(outputStream* out) const { 1518 switch (type()) { 1519 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1520 case T_INT: out->print("int:%d", as_jint()); break; 1521 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1522 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1523 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1524 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1525 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1526 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1527 } 1528 } 1529 1530 // LIR_Address 1531 void LIR_Address::print_value_on(outputStream* out) const { 1532 out->print("Base:"); _base->print(out); 1533 if (!_index->is_illegal()) { 1534 out->print(" Index:"); _index->print(out); 1535 switch (scale()) { 1536 case times_1: break; 1537 case times_2: out->print(" * 2"); break; 1538 case times_4: out->print(" * 4"); break; 1539 case times_8: out->print(" * 8"); break; 1540 } 1541 } 1542 out->print(" Disp: " INTX_FORMAT, _disp); 1543 } 1544 1545 // debug output of block header without InstructionPrinter 1546 // (because phi functions are not necessary for LIR) 1547 static void print_block(BlockBegin* x) { 1548 // print block id 1549 BlockEnd* end = x->end(); 1550 tty->print("B%d ", x->block_id()); 1551 1552 // print flags 1553 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1554 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1555 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1556 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1557 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1558 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1559 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1560 1561 // print block bci range 1562 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1563 1564 // print predecessors and successors 1565 if (x->number_of_preds() > 0) { 1566 tty->print("preds: "); 1567 for (int i = 0; i < x->number_of_preds(); i ++) { 1568 tty->print("B%d ", x->pred_at(i)->block_id()); 1569 } 1570 } 1571 1572 if (x->number_of_sux() > 0) { 1573 tty->print("sux: "); 1574 for (int i = 0; i < x->number_of_sux(); i ++) { 1575 tty->print("B%d ", x->sux_at(i)->block_id()); 1576 } 1577 } 1578 1579 // print exception handlers 1580 if (x->number_of_exception_handlers() > 0) { 1581 tty->print("xhandler: "); 1582 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1583 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1584 } 1585 } 1586 1587 tty->cr(); 1588 } 1589 1590 void print_LIR(BlockList* blocks) { 1591 tty->print_cr("LIR:"); 1592 int i; 1593 for (i = 0; i < blocks->length(); i++) { 1594 BlockBegin* bb = blocks->at(i); 1595 print_block(bb); 1596 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1597 bb->lir()->print_instructions(); 1598 } 1599 } 1600 1601 void LIR_List::print_instructions() { 1602 for (int i = 0; i < _operations.length(); i++) { 1603 _operations.at(i)->print(); tty->cr(); 1604 } 1605 tty->cr(); 1606 } 1607 1608 // LIR_Ops printing routines 1609 // LIR_Op 1610 void LIR_Op::print_on(outputStream* out) const { 1611 if (id() != -1 || PrintCFGToFile) { 1612 out->print("%4d ", id()); 1613 } else { 1614 out->print(" "); 1615 } 1616 out->print("%s ", name()); 1617 print_instr(out); 1618 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1619 #ifdef ASSERT 1620 if (Verbose && _file != NULL) { 1621 out->print(" (%s:%d)", _file, _line); 1622 } 1623 #endif 1624 } 1625 1626 const char * LIR_Op::name() const { 1627 const char* s = NULL; 1628 switch(code()) { 1629 // LIR_Op0 1630 case lir_membar: s = "membar"; break; 1631 case lir_membar_acquire: s = "membar_acquire"; break; 1632 case lir_membar_release: s = "membar_release"; break; 1633 case lir_membar_loadload: s = "membar_loadload"; break; 1634 case lir_membar_storestore: s = "membar_storestore"; break; 1635 case lir_membar_loadstore: s = "membar_loadstore"; break; 1636 case lir_membar_storeload: s = "membar_storeload"; break; 1637 case lir_label: s = "label"; break; 1638 case lir_nop: s = "nop"; break; 1639 case lir_on_spin_wait: s = "on_spin_wait"; break; 1640 case lir_backwardbranch_target: s = "backbranch"; break; 1641 case lir_std_entry: s = "std_entry"; break; 1642 case lir_osr_entry: s = "osr_entry"; break; 1643 case lir_fpop_raw: s = "fpop_raw"; break; 1644 case lir_breakpoint: s = "breakpoint"; break; 1645 case lir_get_thread: s = "get_thread"; break; 1646 // LIR_Op1 1647 case lir_fxch: s = "fxch"; break; 1648 case lir_fld: s = "fld"; break; 1649 case lir_push: s = "push"; break; 1650 case lir_pop: s = "pop"; break; 1651 case lir_null_check: s = "null_check"; break; 1652 case lir_return: s = "return"; break; 1653 case lir_safepoint: s = "safepoint"; break; 1654 case lir_leal: s = "leal"; break; 1655 case lir_branch: s = "branch"; break; 1656 case lir_cond_float_branch: s = "flt_cond_br"; break; 1657 case lir_move: s = "move"; break; 1658 case lir_roundfp: s = "roundfp"; break; 1659 case lir_rtcall: s = "rtcall"; break; 1660 case lir_throw: s = "throw"; break; 1661 case lir_unwind: s = "unwind"; break; 1662 case lir_convert: s = "convert"; break; 1663 case lir_alloc_object: s = "alloc_obj"; break; 1664 case lir_monaddr: s = "mon_addr"; break; 1665 // LIR_Op2 1666 case lir_cmp: s = "cmp"; break; 1667 case lir_cmp_l2i: s = "cmp_l2i"; break; 1668 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1669 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1670 case lir_cmove: s = "cmove"; break; 1671 case lir_add: s = "add"; break; 1672 case lir_sub: s = "sub"; break; 1673 case lir_mul: s = "mul"; break; 1674 case lir_div: s = "div"; break; 1675 case lir_rem: s = "rem"; break; 1676 case lir_abs: s = "abs"; break; 1677 case lir_neg: s = "neg"; break; 1678 case lir_sqrt: s = "sqrt"; break; 1679 case lir_logic_and: s = "logic_and"; break; 1680 case lir_logic_or: s = "logic_or"; break; 1681 case lir_logic_xor: s = "logic_xor"; break; 1682 case lir_shl: s = "shift_left"; break; 1683 case lir_shr: s = "shift_right"; break; 1684 case lir_ushr: s = "ushift_right"; break; 1685 case lir_alloc_array: s = "alloc_array"; break; 1686 case lir_xadd: s = "xadd"; break; 1687 case lir_xchg: s = "xchg"; break; 1688 // LIR_Op3 1689 case lir_idiv: s = "idiv"; break; 1690 case lir_irem: s = "irem"; break; 1691 case lir_fmad: s = "fmad"; break; 1692 case lir_fmaf: s = "fmaf"; break; 1693 // LIR_OpJavaCall 1694 case lir_static_call: s = "static"; break; 1695 case lir_optvirtual_call: s = "optvirtual"; break; 1696 case lir_icvirtual_call: s = "icvirtual"; break; 1697 case lir_dynamic_call: s = "dynamic"; break; 1698 // LIR_OpArrayCopy 1699 case lir_arraycopy: s = "arraycopy"; break; 1700 // LIR_OpUpdateCRC32 1701 case lir_updatecrc32: s = "updatecrc32"; break; 1702 // LIR_OpLock 1703 case lir_lock: s = "lock"; break; 1704 case lir_unlock: s = "unlock"; break; 1705 // LIR_OpDelay 1706 case lir_delay_slot: s = "delay"; break; 1707 // LIR_OpTypeCheck 1708 case lir_instanceof: s = "instanceof"; break; 1709 case lir_checkcast: s = "checkcast"; break; 1710 case lir_store_check: s = "store_check"; break; 1711 // LIR_OpCompareAndSwap 1712 case lir_cas_long: s = "cas_long"; break; 1713 case lir_cas_obj: s = "cas_obj"; break; 1714 case lir_cas_int: s = "cas_int"; break; 1715 // LIR_OpProfileCall 1716 case lir_profile_call: s = "profile_call"; break; 1717 // LIR_OpProfileType 1718 case lir_profile_type: s = "profile_type"; break; 1719 // LIR_OpAssert 1720 #ifdef ASSERT 1721 case lir_assert: s = "assert"; break; 1722 #endif 1723 case lir_none: ShouldNotReachHere();break; 1724 default: s = "illegal_op"; break; 1725 } 1726 return s; 1727 } 1728 1729 // LIR_OpJavaCall 1730 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1731 out->print("call: "); 1732 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1733 if (receiver()->is_valid()) { 1734 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1735 } 1736 if (result_opr()->is_valid()) { 1737 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1738 } 1739 } 1740 1741 // LIR_OpLabel 1742 void LIR_OpLabel::print_instr(outputStream* out) const { 1743 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1744 } 1745 1746 // LIR_OpArrayCopy 1747 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1748 src()->print(out); out->print(" "); 1749 src_pos()->print(out); out->print(" "); 1750 dst()->print(out); out->print(" "); 1751 dst_pos()->print(out); out->print(" "); 1752 length()->print(out); out->print(" "); 1753 tmp()->print(out); out->print(" "); 1754 } 1755 1756 // LIR_OpUpdateCRC32 1757 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1758 crc()->print(out); out->print(" "); 1759 val()->print(out); out->print(" "); 1760 result_opr()->print(out); out->print(" "); 1761 } 1762 1763 // LIR_OpCompareAndSwap 1764 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1765 addr()->print(out); out->print(" "); 1766 cmp_value()->print(out); out->print(" "); 1767 new_value()->print(out); out->print(" "); 1768 tmp1()->print(out); out->print(" "); 1769 tmp2()->print(out); out->print(" "); 1770 1771 } 1772 1773 // LIR_Op0 1774 void LIR_Op0::print_instr(outputStream* out) const { 1775 result_opr()->print(out); 1776 } 1777 1778 // LIR_Op1 1779 const char * LIR_Op1::name() const { 1780 if (code() == lir_move) { 1781 switch (move_kind()) { 1782 case lir_move_normal: 1783 return "move"; 1784 case lir_move_unaligned: 1785 return "unaligned move"; 1786 case lir_move_volatile: 1787 return "volatile_move"; 1788 case lir_move_wide: 1789 return "wide_move"; 1790 default: 1791 ShouldNotReachHere(); 1792 return "illegal_op"; 1793 } 1794 } else { 1795 return LIR_Op::name(); 1796 } 1797 } 1798 1799 1800 void LIR_Op1::print_instr(outputStream* out) const { 1801 _opr->print(out); out->print(" "); 1802 result_opr()->print(out); out->print(" "); 1803 print_patch_code(out, patch_code()); 1804 } 1805 1806 1807 // LIR_Op1 1808 void LIR_OpRTCall::print_instr(outputStream* out) const { 1809 intx a = (intx)addr(); 1810 out->print("%s", Runtime1::name_for_address(addr())); 1811 out->print(" "); 1812 tmp()->print(out); 1813 } 1814 1815 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1816 switch(code) { 1817 case lir_patch_none: break; 1818 case lir_patch_low: out->print("[patch_low]"); break; 1819 case lir_patch_high: out->print("[patch_high]"); break; 1820 case lir_patch_normal: out->print("[patch_normal]"); break; 1821 default: ShouldNotReachHere(); 1822 } 1823 } 1824 1825 // LIR_OpBranch 1826 void LIR_OpBranch::print_instr(outputStream* out) const { 1827 print_condition(out, cond()); out->print(" "); 1828 if (block() != NULL) { 1829 out->print("[B%d] ", block()->block_id()); 1830 } else if (stub() != NULL) { 1831 out->print("["); 1832 stub()->print_name(out); 1833 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1834 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1835 } else { 1836 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1837 } 1838 if (ublock() != NULL) { 1839 out->print("unordered: [B%d] ", ublock()->block_id()); 1840 } 1841 } 1842 1843 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1844 switch(cond) { 1845 case lir_cond_equal: out->print("[EQ]"); break; 1846 case lir_cond_notEqual: out->print("[NE]"); break; 1847 case lir_cond_less: out->print("[LT]"); break; 1848 case lir_cond_lessEqual: out->print("[LE]"); break; 1849 case lir_cond_greaterEqual: out->print("[GE]"); break; 1850 case lir_cond_greater: out->print("[GT]"); break; 1851 case lir_cond_belowEqual: out->print("[BE]"); break; 1852 case lir_cond_aboveEqual: out->print("[AE]"); break; 1853 case lir_cond_always: out->print("[AL]"); break; 1854 default: out->print("[%d]",cond); break; 1855 } 1856 } 1857 1858 // LIR_OpConvert 1859 void LIR_OpConvert::print_instr(outputStream* out) const { 1860 print_bytecode(out, bytecode()); 1861 in_opr()->print(out); out->print(" "); 1862 result_opr()->print(out); out->print(" "); 1863 #ifdef PPC32 1864 if(tmp1()->is_valid()) { 1865 tmp1()->print(out); out->print(" "); 1866 tmp2()->print(out); out->print(" "); 1867 } 1868 #endif 1869 } 1870 1871 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1872 switch(code) { 1873 case Bytecodes::_d2f: out->print("[d2f] "); break; 1874 case Bytecodes::_d2i: out->print("[d2i] "); break; 1875 case Bytecodes::_d2l: out->print("[d2l] "); break; 1876 case Bytecodes::_f2d: out->print("[f2d] "); break; 1877 case Bytecodes::_f2i: out->print("[f2i] "); break; 1878 case Bytecodes::_f2l: out->print("[f2l] "); break; 1879 case Bytecodes::_i2b: out->print("[i2b] "); break; 1880 case Bytecodes::_i2c: out->print("[i2c] "); break; 1881 case Bytecodes::_i2d: out->print("[i2d] "); break; 1882 case Bytecodes::_i2f: out->print("[i2f] "); break; 1883 case Bytecodes::_i2l: out->print("[i2l] "); break; 1884 case Bytecodes::_i2s: out->print("[i2s] "); break; 1885 case Bytecodes::_l2i: out->print("[l2i] "); break; 1886 case Bytecodes::_l2f: out->print("[l2f] "); break; 1887 case Bytecodes::_l2d: out->print("[l2d] "); break; 1888 default: 1889 out->print("[?%d]",code); 1890 break; 1891 } 1892 } 1893 1894 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1895 klass()->print(out); out->print(" "); 1896 obj()->print(out); out->print(" "); 1897 tmp1()->print(out); out->print(" "); 1898 tmp2()->print(out); out->print(" "); 1899 tmp3()->print(out); out->print(" "); 1900 tmp4()->print(out); out->print(" "); 1901 out->print("[hdr:%d]", header_size()); out->print(" "); 1902 out->print("[obj:%d]", object_size()); out->print(" "); 1903 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1904 } 1905 1906 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1907 _opr->print(out); out->print(" "); 1908 tmp()->print(out); out->print(" "); 1909 result_opr()->print(out); out->print(" "); 1910 } 1911 1912 // LIR_Op2 1913 void LIR_Op2::print_instr(outputStream* out) const { 1914 if (code() == lir_cmove || code() == lir_cmp) { 1915 print_condition(out, condition()); out->print(" "); 1916 } 1917 in_opr1()->print(out); out->print(" "); 1918 in_opr2()->print(out); out->print(" "); 1919 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1920 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1921 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1922 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1923 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1924 result_opr()->print(out); 1925 } 1926 1927 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1928 klass()->print(out); out->print(" "); 1929 len()->print(out); out->print(" "); 1930 obj()->print(out); out->print(" "); 1931 tmp1()->print(out); out->print(" "); 1932 tmp2()->print(out); out->print(" "); 1933 tmp3()->print(out); out->print(" "); 1934 tmp4()->print(out); out->print(" "); 1935 out->print("[type:0x%x]", type()); out->print(" "); 1936 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1937 } 1938 1939 1940 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1941 object()->print(out); out->print(" "); 1942 if (code() == lir_store_check) { 1943 array()->print(out); out->print(" "); 1944 } 1945 if (code() != lir_store_check) { 1946 klass()->print_name_on(out); out->print(" "); 1947 if (fast_check()) out->print("fast_check "); 1948 } 1949 tmp1()->print(out); out->print(" "); 1950 tmp2()->print(out); out->print(" "); 1951 tmp3()->print(out); out->print(" "); 1952 result_opr()->print(out); out->print(" "); 1953 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 1954 } 1955 1956 1957 // LIR_Op3 1958 void LIR_Op3::print_instr(outputStream* out) const { 1959 in_opr1()->print(out); out->print(" "); 1960 in_opr2()->print(out); out->print(" "); 1961 in_opr3()->print(out); out->print(" "); 1962 result_opr()->print(out); 1963 } 1964 1965 1966 void LIR_OpLock::print_instr(outputStream* out) const { 1967 hdr_opr()->print(out); out->print(" "); 1968 obj_opr()->print(out); out->print(" "); 1969 lock_opr()->print(out); out->print(" "); 1970 if (_scratch->is_valid()) { 1971 _scratch->print(out); out->print(" "); 1972 } 1973 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1974 } 1975 1976 #ifdef ASSERT 1977 void LIR_OpAssert::print_instr(outputStream* out) const { 1978 print_condition(out, condition()); out->print(" "); 1979 in_opr1()->print(out); out->print(" "); 1980 in_opr2()->print(out); out->print(", \""); 1981 out->print("%s", msg()); out->print("\""); 1982 } 1983 #endif 1984 1985 1986 void LIR_OpDelay::print_instr(outputStream* out) const { 1987 _op->print_on(out); 1988 } 1989 1990 1991 // LIR_OpProfileCall 1992 void LIR_OpProfileCall::print_instr(outputStream* out) const { 1993 profiled_method()->name()->print_symbol_on(out); 1994 out->print("."); 1995 profiled_method()->holder()->name()->print_symbol_on(out); 1996 out->print(" @ %d ", profiled_bci()); 1997 mdo()->print(out); out->print(" "); 1998 recv()->print(out); out->print(" "); 1999 tmp1()->print(out); out->print(" "); 2000 } 2001 2002 // LIR_OpProfileType 2003 void LIR_OpProfileType::print_instr(outputStream* out) const { 2004 out->print("exact = "); 2005 if (exact_klass() == NULL) { 2006 out->print("unknown"); 2007 } else { 2008 exact_klass()->print_name_on(out); 2009 } 2010 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2011 out->print(" "); 2012 mdp()->print(out); out->print(" "); 2013 obj()->print(out); out->print(" "); 2014 tmp()->print(out); out->print(" "); 2015 } 2016 2017 #endif // PRODUCT 2018 2019 // Implementation of LIR_InsertionBuffer 2020 2021 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2022 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2023 2024 int i = number_of_insertion_points() - 1; 2025 if (i < 0 || index_at(i) < index) { 2026 append_new(index, 1); 2027 } else { 2028 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2029 assert(count_at(i) > 0, "check"); 2030 set_count_at(i, count_at(i) + 1); 2031 } 2032 _ops.push(op); 2033 2034 DEBUG_ONLY(verify()); 2035 } 2036 2037 #ifdef ASSERT 2038 void LIR_InsertionBuffer::verify() { 2039 int sum = 0; 2040 int prev_idx = -1; 2041 2042 for (int i = 0; i < number_of_insertion_points(); i++) { 2043 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2044 sum += count_at(i); 2045 } 2046 assert(sum == number_of_ops(), "wrong total sum"); 2047 } 2048 #endif