1 /*
2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "asm/macroAssembler.hpp"
29 #include "asm/macroAssembler.inline.hpp"
30 #include "code/codeCache.hpp"
31 #include "code/compiledIC.hpp"
32 #include "code/debugInfoRec.hpp"
33 #include "code/icBuffer.hpp"
34 #include "code/vtableStubs.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "gc/shared/barrierSetAssembler.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interp_masm.hpp"
39 #include "logging/log.hpp"
40 #include "memory/resourceArea.hpp"
41 #include "nativeInst_aarch64.hpp"
42 #include "oops/compiledICHolder.hpp"
43 #include "oops/klass.inline.hpp"
44 #include "oops/method.inline.hpp"
45 #include "prims/methodHandles.hpp"
46 #include "runtime/continuation.hpp"
47 #include "runtime/continuationEntry.inline.hpp"
48 #include "runtime/globals.hpp"
49 #include "runtime/jniHandles.hpp"
50 #include "runtime/safepointMechanism.hpp"
51 #include "runtime/sharedRuntime.hpp"
52 #include "runtime/signature.hpp"
53 #include "runtime/stubRoutines.hpp"
54 #include "runtime/vframeArray.hpp"
55 #include "utilities/align.hpp"
56 #include "utilities/formatBuffer.hpp"
57 #include "vmreg_aarch64.inline.hpp"
58 #ifdef COMPILER1
59 #include "c1/c1_Runtime1.hpp"
60 #endif
61 #ifdef COMPILER2
62 #include "adfiles/ad_aarch64.hpp"
63 #include "opto/runtime.hpp"
64 #endif
65 #if INCLUDE_JVMCI
66 #include "jvmci/jvmciJavaClasses.hpp"
67 #endif
68
69 #define __ masm->
70
71 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
72
73 class SimpleRuntimeFrame {
74
75 public:
76
77 // Most of the runtime stubs have this simple frame layout.
78 // This class exists to make the layout shared in one place.
79 // Offsets are for compiler stack slots, which are jints.
80 enum layout {
81 // The frame sender code expects that rbp will be in the "natural" place and
82 // will override any oopMap setting for it. We must therefore force the layout
83 // so that it agrees with the frame sender code.
84 // we don't expect any arg reg save area so aarch64 asserts that
85 // frame::arg_reg_save_area_bytes == 0
86 rfp_off = 0,
87 rfp_off2,
88 return_off, return_off2,
89 framesize
90 };
91 };
92
93 // FIXME -- this is used by C1
94 class RegisterSaver {
95 const bool _save_vectors;
96 public:
97 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
98
99 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
100 void restore_live_registers(MacroAssembler* masm);
101
102 // Offsets into the register save area
103 // Used by deoptimization when it is managing result register
104 // values on its own
105
106 int reg_offset_in_bytes(Register r);
107 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
108 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
109 int v0_offset_in_bytes();
110
111 // Total stack size in bytes for saving sve predicate registers.
112 int total_sve_predicate_in_bytes();
113
114 // Capture info about frame layout
115 // Note this is only correct when not saving full vectors.
116 enum layout {
117 fpu_state_off = 0,
118 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
119 // The frame sender code expects that rfp will be in
120 // the "natural" place and will override any oopMap
121 // setting for it. We must therefore force the layout
122 // so that it agrees with the frame sender code.
123 r0_off = fpu_state_off + FPUStateSizeInWords,
124 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
125 return_off = rfp_off + Register::max_slots_per_register, // slot for return address
126 reg_save_size = return_off + Register::max_slots_per_register};
127
128 };
129
130 int RegisterSaver::reg_offset_in_bytes(Register r) {
131 // The integer registers are located above the floating point
132 // registers in the stack frame pushed by save_live_registers() so the
133 // offset depends on whether we are saving full vectors, and whether
134 // those vectors are NEON or SVE.
135
136 int slots_per_vect = FloatRegister::save_slots_per_register;
137
138 #if COMPILER2_OR_JVMCI
139 if (_save_vectors) {
140 slots_per_vect = FloatRegister::slots_per_neon_register;
141
142 #ifdef COMPILER2
143 if (Matcher::supports_scalable_vector()) {
144 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
145 }
146 #endif
147 }
148 #endif
149
150 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
151 return r0_offset + r->encoding() * wordSize;
152 }
153
154 int RegisterSaver::v0_offset_in_bytes() {
155 // The floating point registers are located above the predicate registers if
156 // they are present in the stack frame pushed by save_live_registers(). So the
157 // offset depends on the saved total predicate vectors in the stack frame.
158 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
159 }
160
161 int RegisterSaver::total_sve_predicate_in_bytes() {
162 #ifdef COMPILER2
163 if (_save_vectors && Matcher::supports_scalable_vector()) {
164 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
165 PRegister::number_of_registers;
166 }
167 #endif
168 return 0;
169 }
170
171 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
172 bool use_sve = false;
173 int sve_vector_size_in_bytes = 0;
174 int sve_vector_size_in_slots = 0;
175 int sve_predicate_size_in_slots = 0;
176 int total_predicate_in_bytes = total_sve_predicate_in_bytes();
177 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
178
179 #ifdef COMPILER2
180 use_sve = Matcher::supports_scalable_vector();
181 if (use_sve) {
182 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
183 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
184 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
185 }
186 #endif
187
188 #if COMPILER2_OR_JVMCI
189 if (_save_vectors) {
190 int extra_save_slots_per_register = 0;
191 // Save upper half of vector registers
192 if (use_sve) {
193 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
194 } else {
195 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
196 }
197 int extra_vector_bytes = extra_save_slots_per_register *
198 VMRegImpl::stack_slot_size *
199 FloatRegister::number_of_registers;
200 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
201 }
202 #else
203 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
204 #endif
205
206 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
207 reg_save_size * BytesPerInt, 16);
208 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
209 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
210 // The caller will allocate additional_frame_words
211 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
212 // CodeBlob frame size is in words.
213 int frame_size_in_words = frame_size_in_bytes / wordSize;
214 *total_frame_words = frame_size_in_words;
215
216 // Save Integer and Float registers.
217 __ enter();
218 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
219
220 // Set an oopmap for the call site. This oopmap will map all
221 // oop-registers and debug-info registers as callee-saved. This
222 // will allow deoptimization at this safepoint to find all possible
223 // debug-info recordings, as well as let GC find all oops.
224
225 OopMapSet *oop_maps = new OopMapSet();
226 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
227
228 for (int i = 0; i < Register::number_of_registers; i++) {
229 Register r = as_Register(i);
230 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
231 // SP offsets are in 4-byte words.
232 // Register slots are 8 bytes wide, 32 floating-point registers.
233 int sp_offset = Register::max_slots_per_register * i +
234 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
235 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
236 }
237 }
238
239 for (int i = 0; i < FloatRegister::number_of_registers; i++) {
240 FloatRegister r = as_FloatRegister(i);
241 int sp_offset = 0;
242 if (_save_vectors) {
243 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
244 (FloatRegister::slots_per_neon_register * i);
245 } else {
246 sp_offset = FloatRegister::save_slots_per_register * i;
247 }
248 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
249 }
250
251 return oop_map;
252 }
253
254 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
255 #ifdef COMPILER2
256 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
257 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
258 #else
259 #if !INCLUDE_JVMCI
260 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
261 #endif
262 __ pop_CPU_state(_save_vectors);
263 #endif
264 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
265 __ authenticate_return_address();
266 }
267
268 // Is vector's size (in bytes) bigger than a size saved by default?
269 // 8 bytes vector registers are saved by default on AArch64.
270 // The SVE supported min vector size is 8 bytes and we need to save
271 // predicate registers when the vector size is 8 bytes as well.
272 bool SharedRuntime::is_wide_vector(int size) {
273 return size > 8 || (UseSVE > 0 && size >= 8);
274 }
275
276 // ---------------------------------------------------------------------------
277 // Read the array of BasicTypes from a signature, and compute where the
278 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
279 // quantities. Values less than VMRegImpl::stack0 are registers, those above
280 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
281 // as framesizes are fixed.
282 // VMRegImpl::stack0 refers to the first slot 0(sp).
283 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
284 // Register up to Register::number_of_registers are the 64-bit
285 // integer registers.
286
287 // Note: the INPUTS in sig_bt are in units of Java argument words,
288 // which are 64-bit. The OUTPUTS are in 32-bit units.
289
290 // The Java calling convention is a "shifted" version of the C ABI.
291 // By skipping the first C ABI register we can call non-static jni
292 // methods with small numbers of arguments without having to shuffle
293 // the arguments at all. Since we control the java ABI we ought to at
294 // least get some advantage out of it.
295
296 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
297 VMRegPair *regs,
298 int total_args_passed) {
299
300 // Create the mapping between argument positions and
301 // registers.
302 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
303 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
304 };
305 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
306 j_farg0, j_farg1, j_farg2, j_farg3,
307 j_farg4, j_farg5, j_farg6, j_farg7
308 };
309
310
311 uint int_args = 0;
312 uint fp_args = 0;
313 uint stk_args = 0;
314
315 for (int i = 0; i < total_args_passed; i++) {
316 switch (sig_bt[i]) {
317 case T_BOOLEAN:
318 case T_CHAR:
319 case T_BYTE:
320 case T_SHORT:
321 case T_INT:
322 if (int_args < Argument::n_int_register_parameters_j) {
323 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
324 } else {
325 stk_args = align_up(stk_args, 2);
326 regs[i].set1(VMRegImpl::stack2reg(stk_args));
327 stk_args += 1;
328 }
329 break;
330 case T_VOID:
331 // halves of T_LONG or T_DOUBLE
332 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
333 regs[i].set_bad();
334 break;
335 case T_LONG:
336 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
337 // fall through
338 case T_OBJECT:
339 case T_ARRAY:
340 case T_ADDRESS:
341 if (int_args < Argument::n_int_register_parameters_j) {
342 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
343 } else {
344 stk_args = align_up(stk_args, 2);
345 regs[i].set2(VMRegImpl::stack2reg(stk_args));
346 stk_args += 2;
347 }
348 break;
349 case T_FLOAT:
350 if (fp_args < Argument::n_float_register_parameters_j) {
351 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
352 } else {
353 stk_args = align_up(stk_args, 2);
354 regs[i].set1(VMRegImpl::stack2reg(stk_args));
355 stk_args += 1;
356 }
357 break;
358 case T_DOUBLE:
359 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
360 if (fp_args < Argument::n_float_register_parameters_j) {
361 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
362 } else {
363 stk_args = align_up(stk_args, 2);
364 regs[i].set2(VMRegImpl::stack2reg(stk_args));
365 stk_args += 2;
366 }
367 break;
368 default:
369 ShouldNotReachHere();
370 break;
371 }
372 }
373
374 return stk_args;
375 }
376
377 // Patch the callers callsite with entry to compiled code if it exists.
378 static void patch_callers_callsite(MacroAssembler *masm) {
379 Label L;
380 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
381 __ cbz(rscratch1, L);
382
383 __ enter();
384 __ push_CPU_state();
385
386 // VM needs caller's callsite
387 // VM needs target method
388 // This needs to be a long call since we will relocate this adapter to
389 // the codeBuffer and it may not reach
390
391 #ifndef PRODUCT
392 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
393 #endif
394
395 __ mov(c_rarg0, rmethod);
396 __ mov(c_rarg1, lr);
397 __ authenticate_return_address(c_rarg1);
398 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
399 __ blr(rscratch1);
400
401 // Explicit isb required because fixup_callers_callsite may change the code
402 // stream.
403 __ safepoint_isb();
404
405 __ pop_CPU_state();
406 // restore sp
407 __ leave();
408 __ bind(L);
409 }
410
411 static void gen_c2i_adapter(MacroAssembler *masm,
412 int total_args_passed,
413 int comp_args_on_stack,
414 const BasicType *sig_bt,
415 const VMRegPair *regs,
416 Label& skip_fixup) {
417 // Before we get into the guts of the C2I adapter, see if we should be here
418 // at all. We've come from compiled code and are attempting to jump to the
419 // interpreter, which means the caller made a static call to get here
420 // (vcalls always get a compiled target if there is one). Check for a
421 // compiled target. If there is one, we need to patch the caller's call.
422 patch_callers_callsite(masm);
423
424 __ bind(skip_fixup);
425
426 int words_pushed = 0;
427
428 // Since all args are passed on the stack, total_args_passed *
429 // Interpreter::stackElementSize is the space we need.
430
431 int extraspace = total_args_passed * Interpreter::stackElementSize;
432
433 __ mov(r19_sender_sp, sp);
434
435 // stack is aligned, keep it that way
436 extraspace = align_up(extraspace, 2*wordSize);
437
438 if (extraspace)
439 __ sub(sp, sp, extraspace);
440
441 // Now write the args into the outgoing interpreter space
442 for (int i = 0; i < total_args_passed; i++) {
443 if (sig_bt[i] == T_VOID) {
444 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
445 continue;
446 }
447
448 // offset to start parameters
449 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
450 int next_off = st_off - Interpreter::stackElementSize;
451
452 // Say 4 args:
453 // i st_off
454 // 0 32 T_LONG
455 // 1 24 T_VOID
456 // 2 16 T_OBJECT
457 // 3 8 T_BOOL
458 // - 0 return address
459 //
460 // However to make thing extra confusing. Because we can fit a Java long/double in
461 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
462 // leaves one slot empty and only stores to a single slot. In this case the
463 // slot that is occupied is the T_VOID slot. See I said it was confusing.
464
465 VMReg r_1 = regs[i].first();
466 VMReg r_2 = regs[i].second();
467 if (!r_1->is_valid()) {
468 assert(!r_2->is_valid(), "");
469 continue;
470 }
471 if (r_1->is_stack()) {
472 // memory to memory use rscratch1
473 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
474 + extraspace
475 + words_pushed * wordSize);
476 if (!r_2->is_valid()) {
477 // sign extend??
478 __ ldrw(rscratch1, Address(sp, ld_off));
479 __ str(rscratch1, Address(sp, st_off));
480
481 } else {
482
483 __ ldr(rscratch1, Address(sp, ld_off));
484
485 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
486 // T_DOUBLE and T_LONG use two slots in the interpreter
487 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
488 // ld_off == LSW, ld_off+wordSize == MSW
489 // st_off == MSW, next_off == LSW
490 __ str(rscratch1, Address(sp, next_off));
491 #ifdef ASSERT
492 // Overwrite the unused slot with known junk
493 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull);
494 __ str(rscratch1, Address(sp, st_off));
495 #endif /* ASSERT */
496 } else {
497 __ str(rscratch1, Address(sp, st_off));
498 }
499 }
500 } else if (r_1->is_Register()) {
501 Register r = r_1->as_Register();
502 if (!r_2->is_valid()) {
503 // must be only an int (or less ) so move only 32bits to slot
504 // why not sign extend??
505 __ str(r, Address(sp, st_off));
506 } else {
507 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
508 // T_DOUBLE and T_LONG use two slots in the interpreter
509 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
510 // jlong/double in gpr
511 #ifdef ASSERT
512 // Overwrite the unused slot with known junk
513 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull);
514 __ str(rscratch1, Address(sp, st_off));
515 #endif /* ASSERT */
516 __ str(r, Address(sp, next_off));
517 } else {
518 __ str(r, Address(sp, st_off));
519 }
520 }
521 } else {
522 assert(r_1->is_FloatRegister(), "");
523 if (!r_2->is_valid()) {
524 // only a float use just part of the slot
525 __ strs(r_1->as_FloatRegister(), Address(sp, st_off));
526 } else {
527 #ifdef ASSERT
528 // Overwrite the unused slot with known junk
529 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull);
530 __ str(rscratch1, Address(sp, st_off));
531 #endif /* ASSERT */
532 __ strd(r_1->as_FloatRegister(), Address(sp, next_off));
533 }
534 }
535 }
536
537 __ mov(esp, sp); // Interp expects args on caller's expression stack
538
539 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
540 __ br(rscratch1);
541 }
542
543
544 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
545 int total_args_passed,
546 int comp_args_on_stack,
547 const BasicType *sig_bt,
548 const VMRegPair *regs) {
549
550 // Note: r19_sender_sp contains the senderSP on entry. We must
551 // preserve it since we may do a i2c -> c2i transition if we lose a
552 // race where compiled code goes non-entrant while we get args
553 // ready.
554
555 // Adapters are frameless.
556
557 // An i2c adapter is frameless because the *caller* frame, which is
558 // interpreted, routinely repairs its own esp (from
559 // interpreter_frame_last_sp), even if a callee has modified the
560 // stack pointer. It also recalculates and aligns sp.
561
562 // A c2i adapter is frameless because the *callee* frame, which is
563 // interpreted, routinely repairs its caller's sp (from sender_sp,
564 // which is set up via the senderSP register).
565
566 // In other words, if *either* the caller or callee is interpreted, we can
567 // get the stack pointer repaired after a call.
568
569 // This is why c2i and i2c adapters cannot be indefinitely composed.
570 // In particular, if a c2i adapter were to somehow call an i2c adapter,
571 // both caller and callee would be compiled methods, and neither would
572 // clean up the stack pointer changes performed by the two adapters.
573 // If this happens, control eventually transfers back to the compiled
574 // caller, but with an uncorrected stack, causing delayed havoc.
575
576 if (VerifyAdapterCalls &&
577 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
578 #if 0
579 // So, let's test for cascading c2i/i2c adapters right now.
580 // assert(Interpreter::contains($return_addr) ||
581 // StubRoutines::contains($return_addr),
582 // "i2c adapter must return to an interpreter frame");
583 __ block_comment("verify_i2c { ");
584 Label L_ok;
585 if (Interpreter::code() != nullptr) {
586 range_check(masm, rax, r11,
587 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
588 L_ok);
589 }
590 if (StubRoutines::initial_stubs_code() != nullptr) {
591 range_check(masm, rax, r11,
592 StubRoutines::initial_stubs_code()->code_begin(),
593 StubRoutines::initial_stubs_code()->code_end(),
594 L_ok);
595 }
596 if (StubRoutines::final_stubs_code() != nullptr) {
597 range_check(masm, rax, r11,
598 StubRoutines::final_stubs_code()->code_begin(),
599 StubRoutines::final_stubs_code()->code_end(),
600 L_ok);
601 }
602 const char* msg = "i2c adapter must return to an interpreter frame";
603 __ block_comment(msg);
604 __ stop(msg);
605 __ bind(L_ok);
606 __ block_comment("} verify_i2ce ");
607 #endif
608 }
609
610 // Cut-out for having no stack args.
611 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
612 if (comp_args_on_stack) {
613 __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
614 __ andr(sp, rscratch1, -16);
615 }
616
617 // Will jump to the compiled code just as if compiled code was doing it.
618 // Pre-load the register-jump target early, to schedule it better.
619 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
620
621 #if INCLUDE_JVMCI
622 if (EnableJVMCI) {
623 // check if this call should be routed towards a specific entry point
624 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
625 Label no_alternative_target;
626 __ cbz(rscratch2, no_alternative_target);
627 __ mov(rscratch1, rscratch2);
628 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
629 __ bind(no_alternative_target);
630 }
631 #endif // INCLUDE_JVMCI
632
633 // Now generate the shuffle code.
634 for (int i = 0; i < total_args_passed; i++) {
635 if (sig_bt[i] == T_VOID) {
636 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
637 continue;
638 }
639
640 // Pick up 0, 1 or 2 words from SP+offset.
641
642 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
643 "scrambled load targets?");
644 // Load in argument order going down.
645 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
646 // Point to interpreter value (vs. tag)
647 int next_off = ld_off - Interpreter::stackElementSize;
648 //
649 //
650 //
651 VMReg r_1 = regs[i].first();
652 VMReg r_2 = regs[i].second();
653 if (!r_1->is_valid()) {
654 assert(!r_2->is_valid(), "");
655 continue;
656 }
657 if (r_1->is_stack()) {
658 // Convert stack slot to an SP offset (+ wordSize to account for return address )
659 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
660 if (!r_2->is_valid()) {
661 // sign extend???
662 __ ldrsw(rscratch2, Address(esp, ld_off));
663 __ str(rscratch2, Address(sp, st_off));
664 } else {
665 //
666 // We are using two optoregs. This can be either T_OBJECT,
667 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
668 // two slots but only uses one for thr T_LONG or T_DOUBLE case
669 // So we must adjust where to pick up the data to match the
670 // interpreter.
671 //
672 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
673 // are accessed as negative so LSW is at LOW address
674
675 // ld_off is MSW so get LSW
676 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
677 next_off : ld_off;
678 __ ldr(rscratch2, Address(esp, offset));
679 // st_off is LSW (i.e. reg.first())
680 __ str(rscratch2, Address(sp, st_off));
681 }
682 } else if (r_1->is_Register()) { // Register argument
683 Register r = r_1->as_Register();
684 if (r_2->is_valid()) {
685 //
686 // We are using two VMRegs. This can be either T_OBJECT,
687 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
688 // two slots but only uses one for thr T_LONG or T_DOUBLE case
689 // So we must adjust where to pick up the data to match the
690 // interpreter.
691
692 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
693 next_off : ld_off;
694
695 // this can be a misaligned move
696 __ ldr(r, Address(esp, offset));
697 } else {
698 // sign extend and use a full word?
699 __ ldrw(r, Address(esp, ld_off));
700 }
701 } else {
702 if (!r_2->is_valid()) {
703 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
704 } else {
705 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
706 }
707 }
708 }
709
710 __ mov(rscratch2, rscratch1);
711 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
712 __ mov(rscratch1, rscratch2);
713
714 // 6243940 We might end up in handle_wrong_method if
715 // the callee is deoptimized as we race thru here. If that
716 // happens we don't want to take a safepoint because the
717 // caller frame will look interpreted and arguments are now
718 // "compiled" so it is much better to make this transition
719 // invisible to the stack walking code. Unfortunately if
720 // we try and find the callee by normal means a safepoint
721 // is possible. So we stash the desired callee in the thread
722 // and the vm will find there should this case occur.
723
724 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
725
726 __ br(rscratch1);
727 }
728
729 // ---------------------------------------------------------------
730 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
731 int total_args_passed,
732 int comp_args_on_stack,
733 const BasicType *sig_bt,
734 const VMRegPair *regs,
735 AdapterFingerPrint* fingerprint) {
736 address i2c_entry = __ pc();
737
738 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
739
740 address c2i_unverified_entry = __ pc();
741 Label skip_fixup;
742
743 Label ok;
744
745 Register holder = rscratch2;
746 Register receiver = j_rarg0;
747 Register tmp = r10; // A call-clobbered register not used for arg passing
748
749 // -------------------------------------------------------------------------
750 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
751 // to the interpreter. The args start out packed in the compiled layout. They
752 // need to be unpacked into the interpreter layout. This will almost always
753 // require some stack space. We grow the current (compiled) stack, then repack
754 // the args. We finally end in a jump to the generic interpreter entry point.
755 // On exit from the interpreter, the interpreter will restore our SP (lest the
756 // compiled code, which relies solely on SP and not FP, get sick).
757
758 {
759 __ block_comment("c2i_unverified_entry {");
760 __ load_klass(rscratch1, receiver);
761 __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
762 __ cmp(rscratch1, tmp);
763 __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
764 __ br(Assembler::EQ, ok);
765 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
766
767 __ bind(ok);
768 // Method might have been compiled since the call site was patched to
769 // interpreted; if that is the case treat it as a miss so we can get
770 // the call site corrected.
771 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
772 __ cbz(rscratch1, skip_fixup);
773 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
774 __ block_comment("} c2i_unverified_entry");
775 }
776
777 address c2i_entry = __ pc();
778
779 // Class initialization barrier for static methods
780 address c2i_no_clinit_check_entry = nullptr;
781 if (VM_Version::supports_fast_class_init_checks()) {
782 Label L_skip_barrier;
783
784 { // Bypass the barrier for non-static methods
785 __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
786 __ andsw(zr, rscratch1, JVM_ACC_STATIC);
787 __ br(Assembler::EQ, L_skip_barrier); // non-static
788 }
789
790 __ load_method_holder(rscratch2, rmethod);
791 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
792 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
793
794 __ bind(L_skip_barrier);
795 c2i_no_clinit_check_entry = __ pc();
796 }
797
798 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
799 bs->c2i_entry_barrier(masm);
800
801 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
802
803 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
804 }
805
806 static int c_calling_convention_priv(const BasicType *sig_bt,
807 VMRegPair *regs,
808 VMRegPair *regs2,
809 int total_args_passed) {
810 assert(regs2 == nullptr, "not needed on AArch64");
811
812 // We return the amount of VMRegImpl stack slots we need to reserve for all
813 // the arguments NOT counting out_preserve_stack_slots.
814
815 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
816 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
817 };
818 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
819 c_farg0, c_farg1, c_farg2, c_farg3,
820 c_farg4, c_farg5, c_farg6, c_farg7
821 };
822
823 uint int_args = 0;
824 uint fp_args = 0;
825 uint stk_args = 0; // inc by 2 each time
826
827 for (int i = 0; i < total_args_passed; i++) {
828 switch (sig_bt[i]) {
829 case T_BOOLEAN:
830 case T_CHAR:
831 case T_BYTE:
832 case T_SHORT:
833 case T_INT:
834 if (int_args < Argument::n_int_register_parameters_c) {
835 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
836 } else {
837 #ifdef __APPLE__
838 // Less-than word types are stored one after another.
839 // The code is unable to handle this so bailout.
840 return -1;
841 #endif
842 regs[i].set1(VMRegImpl::stack2reg(stk_args));
843 stk_args += 2;
844 }
845 break;
846 case T_LONG:
847 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
848 // fall through
849 case T_OBJECT:
850 case T_ARRAY:
851 case T_ADDRESS:
852 case T_METADATA:
853 if (int_args < Argument::n_int_register_parameters_c) {
854 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
855 } else {
856 regs[i].set2(VMRegImpl::stack2reg(stk_args));
857 stk_args += 2;
858 }
859 break;
860 case T_FLOAT:
861 if (fp_args < Argument::n_float_register_parameters_c) {
862 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
863 } else {
864 #ifdef __APPLE__
865 // Less-than word types are stored one after another.
866 // The code is unable to handle this so bailout.
867 return -1;
868 #endif
869 regs[i].set1(VMRegImpl::stack2reg(stk_args));
870 stk_args += 2;
871 }
872 break;
873 case T_DOUBLE:
874 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
875 if (fp_args < Argument::n_float_register_parameters_c) {
876 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
877 } else {
878 regs[i].set2(VMRegImpl::stack2reg(stk_args));
879 stk_args += 2;
880 }
881 break;
882 case T_VOID: // Halves of longs and doubles
883 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
884 regs[i].set_bad();
885 break;
886 default:
887 ShouldNotReachHere();
888 break;
889 }
890 }
891
892 return stk_args;
893 }
894
895 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
896 uint num_bits,
897 uint total_args_passed) {
898 Unimplemented();
899 return 0;
900 }
901
902 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
903 VMRegPair *regs,
904 VMRegPair *regs2,
905 int total_args_passed)
906 {
907 int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
908 guarantee(result >= 0, "Unsupported arguments configuration");
909 return result;
910 }
911
912
913 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
914 // We always ignore the frame_slots arg and just use the space just below frame pointer
915 // which by this time is free to use
916 switch (ret_type) {
917 case T_FLOAT:
918 __ strs(v0, Address(rfp, -wordSize));
919 break;
920 case T_DOUBLE:
921 __ strd(v0, Address(rfp, -wordSize));
922 break;
923 case T_VOID: break;
924 default: {
925 __ str(r0, Address(rfp, -wordSize));
926 }
927 }
928 }
929
930 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
931 // We always ignore the frame_slots arg and just use the space just below frame pointer
932 // which by this time is free to use
933 switch (ret_type) {
934 case T_FLOAT:
935 __ ldrs(v0, Address(rfp, -wordSize));
936 break;
937 case T_DOUBLE:
938 __ ldrd(v0, Address(rfp, -wordSize));
939 break;
940 case T_VOID: break;
941 default: {
942 __ ldr(r0, Address(rfp, -wordSize));
943 }
944 }
945 }
946 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
947 RegSet x;
948 for ( int i = first_arg ; i < arg_count ; i++ ) {
949 if (args[i].first()->is_Register()) {
950 x = x + args[i].first()->as_Register();
951 } else if (args[i].first()->is_FloatRegister()) {
952 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
953 }
954 }
955 __ push(x, sp);
956 }
957
958 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
959 RegSet x;
960 for ( int i = first_arg ; i < arg_count ; i++ ) {
961 if (args[i].first()->is_Register()) {
962 x = x + args[i].first()->as_Register();
963 } else {
964 ;
965 }
966 }
967 __ pop(x, sp);
968 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
969 if (args[i].first()->is_Register()) {
970 ;
971 } else if (args[i].first()->is_FloatRegister()) {
972 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
973 }
974 }
975 }
976
977 static void verify_oop_args(MacroAssembler* masm,
978 const methodHandle& method,
979 const BasicType* sig_bt,
980 const VMRegPair* regs) {
981 Register temp_reg = r19; // not part of any compiled calling seq
982 if (VerifyOops) {
983 for (int i = 0; i < method->size_of_parameters(); i++) {
984 if (sig_bt[i] == T_OBJECT ||
985 sig_bt[i] == T_ARRAY) {
986 VMReg r = regs[i].first();
987 assert(r->is_valid(), "bad oop arg");
988 if (r->is_stack()) {
989 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
990 __ verify_oop(temp_reg);
991 } else {
992 __ verify_oop(r->as_Register());
993 }
994 }
995 }
996 }
997 }
998
999 // on exit, sp points to the ContinuationEntry
1000 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
1001 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
1002 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, "");
1003 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
1004
1005 stack_slots += (int)ContinuationEntry::size()/wordSize;
1006 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
1007
1008 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
1009
1010 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1011 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
1012 __ mov(rscratch1, sp); // we can't use sp as the source in str
1013 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1014
1015 return map;
1016 }
1017
1018 // on entry c_rarg1 points to the continuation
1019 // sp points to ContinuationEntry
1020 // c_rarg3 -- isVirtualThread
1021 static void fill_continuation_entry(MacroAssembler* masm) {
1022 #ifdef ASSERT
1023 __ movw(rscratch1, ContinuationEntry::cookie_value());
1024 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
1025 #endif
1026
1027 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
1028 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
1029 __ str (zr, Address(sp, ContinuationEntry::chunk_offset()));
1030 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset()));
1031 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset()));
1032
1033 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1034 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1035 __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1036 __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1037
1038 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
1039 __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset()));
1040 }
1041
1042 // on entry, sp points to the ContinuationEntry
1043 // on exit, rfp points to the spilled rfp in the entry frame
1044 static void continuation_enter_cleanup(MacroAssembler* masm) {
1045 #ifndef PRODUCT
1046 Label OK;
1047 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1048 __ cmp(sp, rscratch1);
1049 __ br(Assembler::EQ, OK);
1050 __ stop("incorrect sp1");
1051 __ bind(OK);
1052 #endif
1053
1054 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1055 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1056 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1057 __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1058
1059 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1060 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1061 __ add(rfp, sp, (int)ContinuationEntry::size());
1062 }
1063
1064 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1065 // On entry: c_rarg1 -- the continuation object
1066 // c_rarg2 -- isContinue
1067 // c_rarg3 -- isVirtualThread
1068 static void gen_continuation_enter(MacroAssembler* masm,
1069 const methodHandle& method,
1070 const BasicType* sig_bt,
1071 const VMRegPair* regs,
1072 int& exception_offset,
1073 OopMapSet*oop_maps,
1074 int& frame_complete,
1075 int& stack_slots,
1076 int& interpreted_entry_offset,
1077 int& compiled_entry_offset) {
1078 //verify_oop_args(masm, method, sig_bt, regs);
1079 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1080
1081 address start = __ pc();
1082
1083 Label call_thaw, exit;
1084
1085 // i2i entry used at interp_only_mode only
1086 interpreted_entry_offset = __ pc() - start;
1087 {
1088
1089 #ifdef ASSERT
1090 Label is_interp_only;
1091 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1092 __ cbnzw(rscratch1, is_interp_only);
1093 __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1094 __ bind(is_interp_only);
1095 #endif
1096
1097 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1098 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1099 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1100 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1101 __ push_cont_fastpath(rthread);
1102
1103 __ enter();
1104 stack_slots = 2; // will be adjusted in setup
1105 OopMap* map = continuation_enter_setup(masm, stack_slots);
1106 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1107 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1108
1109 fill_continuation_entry(masm);
1110
1111 __ cbnz(c_rarg2, call_thaw);
1112
1113 const address tr_call = __ trampoline_call(resolve);
1114 if (tr_call == nullptr) {
1115 fatal("CodeCache is full at gen_continuation_enter");
1116 }
1117
1118 oop_maps->add_gc_map(__ pc() - start, map);
1119 __ post_call_nop();
1120
1121 __ b(exit);
1122
1123 CodeBuffer* cbuf = masm->code_section()->outer();
1124 address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1125 if (stub == nullptr) {
1126 fatal("CodeCache is full at gen_continuation_enter");
1127 }
1128 }
1129
1130 // compiled entry
1131 __ align(CodeEntryAlignment);
1132 compiled_entry_offset = __ pc() - start;
1133
1134 __ enter();
1135 stack_slots = 2; // will be adjusted in setup
1136 OopMap* map = continuation_enter_setup(masm, stack_slots);
1137 frame_complete = __ pc() - start;
1138
1139 fill_continuation_entry(masm);
1140
1141 __ cbnz(c_rarg2, call_thaw);
1142
1143 const address tr_call = __ trampoline_call(resolve);
1144 if (tr_call == nullptr) {
1145 fatal("CodeCache is full at gen_continuation_enter");
1146 }
1147
1148 oop_maps->add_gc_map(__ pc() - start, map);
1149 __ post_call_nop();
1150
1151 __ b(exit);
1152
1153 __ bind(call_thaw);
1154
1155 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1156 oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1157 ContinuationEntry::_return_pc_offset = __ pc() - start;
1158 __ post_call_nop();
1159
1160 __ bind(exit);
1161 continuation_enter_cleanup(masm);
1162 __ leave();
1163 __ ret(lr);
1164
1165 /// exception handling
1166
1167 exception_offset = __ pc() - start;
1168 {
1169 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1170
1171 continuation_enter_cleanup(masm);
1172
1173 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1174 __ authenticate_return_address(c_rarg1);
1175 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1176
1177 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1178
1179 __ mov(r1, r0); // the exception handler
1180 __ mov(r0, r19); // restore return value contaning the exception oop
1181 __ verify_oop(r0);
1182
1183 __ leave();
1184 __ mov(r3, lr);
1185 __ br(r1); // the exception handler
1186 }
1187
1188 CodeBuffer* cbuf = masm->code_section()->outer();
1189 address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1190 if (stub == nullptr) {
1191 fatal("CodeCache is full at gen_continuation_enter");
1192 }
1193 }
1194
1195 static void gen_continuation_yield(MacroAssembler* masm,
1196 const methodHandle& method,
1197 const BasicType* sig_bt,
1198 const VMRegPair* regs,
1199 OopMapSet* oop_maps,
1200 int& frame_complete,
1201 int& stack_slots,
1202 int& compiled_entry_offset) {
1203 enum layout {
1204 rfp_off1,
1205 rfp_off2,
1206 lr_off,
1207 lr_off2,
1208 framesize // inclusive of return address
1209 };
1210 // assert(is_even(framesize/2), "sp not 16-byte aligned");
1211 stack_slots = framesize / VMRegImpl::slots_per_word;
1212 assert(stack_slots == 2, "recheck layout");
1213
1214 address start = __ pc();
1215
1216 compiled_entry_offset = __ pc() - start;
1217 __ enter();
1218
1219 __ mov(c_rarg1, sp);
1220
1221 frame_complete = __ pc() - start;
1222 address the_pc = __ pc();
1223
1224 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1225
1226 __ mov(c_rarg0, rthread);
1227 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1228 __ call_VM_leaf(Continuation::freeze_entry(), 2);
1229 __ reset_last_Java_frame(true);
1230
1231 Label pinned;
1232
1233 __ cbnz(r0, pinned);
1234
1235 // We've succeeded, set sp to the ContinuationEntry
1236 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1237 __ mov(sp, rscratch1);
1238 continuation_enter_cleanup(masm);
1239
1240 __ bind(pinned); // pinned -- return to caller
1241
1242 // handle pending exception thrown by freeze
1243 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1244 Label ok;
1245 __ cbz(rscratch1, ok);
1246 __ leave();
1247 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1248 __ br(rscratch1);
1249 __ bind(ok);
1250
1251 __ leave();
1252 __ ret(lr);
1253
1254 OopMap* map = new OopMap(framesize, 1);
1255 oop_maps->add_gc_map(the_pc - start, map);
1256 }
1257
1258 static void gen_special_dispatch(MacroAssembler* masm,
1259 const methodHandle& method,
1260 const BasicType* sig_bt,
1261 const VMRegPair* regs) {
1262 verify_oop_args(masm, method, sig_bt, regs);
1263 vmIntrinsics::ID iid = method->intrinsic_id();
1264
1265 // Now write the args into the outgoing interpreter space
1266 bool has_receiver = false;
1267 Register receiver_reg = noreg;
1268 int member_arg_pos = -1;
1269 Register member_reg = noreg;
1270 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1271 if (ref_kind != 0) {
1272 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1273 member_reg = r19; // known to be free at this point
1274 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1275 } else if (iid == vmIntrinsics::_invokeBasic) {
1276 has_receiver = true;
1277 } else if (iid == vmIntrinsics::_linkToNative) {
1278 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument
1279 member_reg = r19; // known to be free at this point
1280 } else {
1281 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1282 }
1283
1284 if (member_reg != noreg) {
1285 // Load the member_arg into register, if necessary.
1286 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1287 VMReg r = regs[member_arg_pos].first();
1288 if (r->is_stack()) {
1289 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1290 } else {
1291 // no data motion is needed
1292 member_reg = r->as_Register();
1293 }
1294 }
1295
1296 if (has_receiver) {
1297 // Make sure the receiver is loaded into a register.
1298 assert(method->size_of_parameters() > 0, "oob");
1299 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1300 VMReg r = regs[0].first();
1301 assert(r->is_valid(), "bad receiver arg");
1302 if (r->is_stack()) {
1303 // Porting note: This assumes that compiled calling conventions always
1304 // pass the receiver oop in a register. If this is not true on some
1305 // platform, pick a temp and load the receiver from stack.
1306 fatal("receiver always in a register");
1307 receiver_reg = r2; // known to be free at this point
1308 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1309 } else {
1310 // no data motion is needed
1311 receiver_reg = r->as_Register();
1312 }
1313 }
1314
1315 // Figure out which address we are really jumping to:
1316 MethodHandles::generate_method_handle_dispatch(masm, iid,
1317 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1318 }
1319
1320 // ---------------------------------------------------------------------------
1321 // Generate a native wrapper for a given method. The method takes arguments
1322 // in the Java compiled code convention, marshals them to the native
1323 // convention (handlizes oops, etc), transitions to native, makes the call,
1324 // returns to java state (possibly blocking), unhandlizes any result and
1325 // returns.
1326 //
1327 // Critical native functions are a shorthand for the use of
1328 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1329 // functions. The wrapper is expected to unpack the arguments before
1330 // passing them to the callee. Critical native functions leave the state _in_Java,
1331 // since they block out GC.
1332 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1333 // block and the check for pending exceptions it's impossible for them
1334 // to be thrown.
1335 //
1336 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1337 const methodHandle& method,
1338 int compile_id,
1339 BasicType* in_sig_bt,
1340 VMRegPair* in_regs,
1341 BasicType ret_type) {
1342 if (method->is_continuation_native_intrinsic()) {
1343 int exception_offset = -1;
1344 OopMapSet* oop_maps = new OopMapSet();
1345 int frame_complete = -1;
1346 int stack_slots = -1;
1347 int interpreted_entry_offset = -1;
1348 int vep_offset = -1;
1349 if (method->is_continuation_enter_intrinsic()) {
1350 gen_continuation_enter(masm,
1351 method,
1352 in_sig_bt,
1353 in_regs,
1354 exception_offset,
1355 oop_maps,
1356 frame_complete,
1357 stack_slots,
1358 interpreted_entry_offset,
1359 vep_offset);
1360 } else if (method->is_continuation_yield_intrinsic()) {
1361 gen_continuation_yield(masm,
1362 method,
1363 in_sig_bt,
1364 in_regs,
1365 oop_maps,
1366 frame_complete,
1367 stack_slots,
1368 vep_offset);
1369 } else {
1370 guarantee(false, "Unknown Continuation native intrinsic");
1371 }
1372
1373 #ifdef ASSERT
1374 if (method->is_continuation_enter_intrinsic()) {
1375 assert(interpreted_entry_offset != -1, "Must be set");
1376 assert(exception_offset != -1, "Must be set");
1377 } else {
1378 assert(interpreted_entry_offset == -1, "Must be unset");
1379 assert(exception_offset == -1, "Must be unset");
1380 }
1381 assert(frame_complete != -1, "Must be set");
1382 assert(stack_slots != -1, "Must be set");
1383 assert(vep_offset != -1, "Must be set");
1384 #endif
1385
1386 __ flush();
1387 nmethod* nm = nmethod::new_native_nmethod(method,
1388 compile_id,
1389 masm->code(),
1390 vep_offset,
1391 frame_complete,
1392 stack_slots,
1393 in_ByteSize(-1),
1394 in_ByteSize(-1),
1395 oop_maps,
1396 exception_offset);
1397 if (method->is_continuation_enter_intrinsic()) {
1398 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1399 } else if (method->is_continuation_yield_intrinsic()) {
1400 _cont_doYield_stub = nm;
1401 } else {
1402 guarantee(false, "Unknown Continuation native intrinsic");
1403 }
1404 return nm;
1405 }
1406
1407 if (method->is_method_handle_intrinsic()) {
1408 vmIntrinsics::ID iid = method->intrinsic_id();
1409 intptr_t start = (intptr_t)__ pc();
1410 int vep_offset = ((intptr_t)__ pc()) - start;
1411
1412 // First instruction must be a nop as it may need to be patched on deoptimisation
1413 __ nop();
1414 gen_special_dispatch(masm,
1415 method,
1416 in_sig_bt,
1417 in_regs);
1418 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1419 __ flush();
1420 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1421 return nmethod::new_native_nmethod(method,
1422 compile_id,
1423 masm->code(),
1424 vep_offset,
1425 frame_complete,
1426 stack_slots / VMRegImpl::slots_per_word,
1427 in_ByteSize(-1),
1428 in_ByteSize(-1),
1429 nullptr);
1430 }
1431 address native_func = method->native_function();
1432 assert(native_func != nullptr, "must have function");
1433
1434 // An OopMap for lock (and class if static)
1435 OopMapSet *oop_maps = new OopMapSet();
1436 intptr_t start = (intptr_t)__ pc();
1437
1438 // We have received a description of where all the java arg are located
1439 // on entry to the wrapper. We need to convert these args to where
1440 // the jni function will expect them. To figure out where they go
1441 // we convert the java signature to a C signature by inserting
1442 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1443
1444 const int total_in_args = method->size_of_parameters();
1445 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1446
1447 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1448 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1449 BasicType* in_elem_bt = nullptr;
1450
1451 int argc = 0;
1452 out_sig_bt[argc++] = T_ADDRESS;
1453 if (method->is_static()) {
1454 out_sig_bt[argc++] = T_OBJECT;
1455 }
1456
1457 for (int i = 0; i < total_in_args ; i++ ) {
1458 out_sig_bt[argc++] = in_sig_bt[i];
1459 }
1460
1461 // Now figure out where the args must be stored and how much stack space
1462 // they require.
1463 int out_arg_slots;
1464 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, nullptr, total_c_args);
1465
1466 if (out_arg_slots < 0) {
1467 return nullptr;
1468 }
1469
1470 // Compute framesize for the wrapper. We need to handlize all oops in
1471 // incoming registers
1472
1473 // Calculate the total number of stack slots we will need.
1474
1475 // First count the abi requirement plus all of the outgoing args
1476 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1477
1478 // Now the space for the inbound oop handle area
1479 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1480
1481 int oop_handle_offset = stack_slots;
1482 stack_slots += total_save_slots;
1483
1484 // Now any space we need for handlizing a klass if static method
1485
1486 int klass_slot_offset = 0;
1487 int klass_offset = -1;
1488 int lock_slot_offset = 0;
1489 bool is_static = false;
1490
1491 if (method->is_static()) {
1492 klass_slot_offset = stack_slots;
1493 stack_slots += VMRegImpl::slots_per_word;
1494 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1495 is_static = true;
1496 }
1497
1498 // Plus a lock if needed
1499
1500 if (method->is_synchronized()) {
1501 lock_slot_offset = stack_slots;
1502 stack_slots += VMRegImpl::slots_per_word;
1503 }
1504
1505 // Now a place (+2) to save return values or temp during shuffling
1506 // + 4 for return address (which we own) and saved rfp
1507 stack_slots += 6;
1508
1509 // Ok The space we have allocated will look like:
1510 //
1511 //
1512 // FP-> | |
1513 // |---------------------|
1514 // | 2 slots for moves |
1515 // |---------------------|
1516 // | lock box (if sync) |
1517 // |---------------------| <- lock_slot_offset
1518 // | klass (if static) |
1519 // |---------------------| <- klass_slot_offset
1520 // | oopHandle area |
1521 // |---------------------| <- oop_handle_offset (8 java arg registers)
1522 // | outbound memory |
1523 // | based arguments |
1524 // | |
1525 // |---------------------|
1526 // | |
1527 // SP-> | out_preserved_slots |
1528 //
1529 //
1530
1531
1532 // Now compute actual number of stack words we need rounding to make
1533 // stack properly aligned.
1534 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1535
1536 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1537
1538 // First thing make an ic check to see if we should even be here
1539
1540 // We are free to use all registers as temps without saving them and
1541 // restoring them except rfp. rfp is the only callee save register
1542 // as far as the interpreter and the compiler(s) are concerned.
1543
1544
1545 const Register ic_reg = rscratch2;
1546 const Register receiver = j_rarg0;
1547
1548 Label hit;
1549 Label exception_pending;
1550
1551 assert_different_registers(ic_reg, receiver, rscratch1);
1552 __ verify_oop(receiver);
1553 __ cmp_klass(receiver, ic_reg, rscratch1);
1554 __ br(Assembler::EQ, hit);
1555
1556 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1557
1558 // Verified entry point must be aligned
1559 __ align(8);
1560
1561 __ bind(hit);
1562
1563 int vep_offset = ((intptr_t)__ pc()) - start;
1564
1565 // If we have to make this method not-entrant we'll overwrite its
1566 // first instruction with a jump. For this action to be legal we
1567 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1568 // SVC, HVC, or SMC. Make it a NOP.
1569 __ nop();
1570
1571 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1572 Label L_skip_barrier;
1573 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1574 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1575 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1576
1577 __ bind(L_skip_barrier);
1578 }
1579
1580 // Generate stack overflow check
1581 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1582
1583 // Generate a new frame for the wrapper.
1584 __ enter();
1585 // -2 because return address is already present and so is saved rfp
1586 __ sub(sp, sp, stack_size - 2*wordSize);
1587
1588 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1589 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1590
1591 // Frame is now completed as far as size and linkage.
1592 int frame_complete = ((intptr_t)__ pc()) - start;
1593
1594 // We use r20 as the oop handle for the receiver/klass
1595 // It is callee save so it survives the call to native
1596
1597 const Register oop_handle_reg = r20;
1598
1599 //
1600 // We immediately shuffle the arguments so that any vm call we have to
1601 // make from here on out (sync slow path, jvmti, etc.) we will have
1602 // captured the oops from our caller and have a valid oopMap for
1603 // them.
1604
1605 // -----------------
1606 // The Grand Shuffle
1607
1608 // The Java calling convention is either equal (linux) or denser (win64) than the
1609 // c calling convention. However the because of the jni_env argument the c calling
1610 // convention always has at least one more (and two for static) arguments than Java.
1611 // Therefore if we move the args from java -> c backwards then we will never have
1612 // a register->register conflict and we don't have to build a dependency graph
1613 // and figure out how to break any cycles.
1614 //
1615
1616 // Record esp-based slot for receiver on stack for non-static methods
1617 int receiver_offset = -1;
1618
1619 // This is a trick. We double the stack slots so we can claim
1620 // the oops in the caller's frame. Since we are sure to have
1621 // more args than the caller doubling is enough to make
1622 // sure we can capture all the incoming oop args from the
1623 // caller.
1624 //
1625 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1626
1627 // Mark location of rfp (someday)
1628 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1629
1630
1631 int float_args = 0;
1632 int int_args = 0;
1633
1634 #ifdef ASSERT
1635 bool reg_destroyed[Register::number_of_registers];
1636 bool freg_destroyed[FloatRegister::number_of_registers];
1637 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1638 reg_destroyed[r] = false;
1639 }
1640 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1641 freg_destroyed[f] = false;
1642 }
1643
1644 #endif /* ASSERT */
1645
1646 // For JNI natives the incoming and outgoing registers are offset upwards.
1647 GrowableArray<int> arg_order(2 * total_in_args);
1648 VMRegPair tmp_vmreg;
1649 tmp_vmreg.set2(r19->as_VMReg());
1650
1651 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1652 arg_order.push(i);
1653 arg_order.push(c_arg);
1654 }
1655
1656 int temploc = -1;
1657 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1658 int i = arg_order.at(ai);
1659 int c_arg = arg_order.at(ai + 1);
1660 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1661 assert(c_arg != -1 && i != -1, "wrong order");
1662 #ifdef ASSERT
1663 if (in_regs[i].first()->is_Register()) {
1664 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1665 } else if (in_regs[i].first()->is_FloatRegister()) {
1666 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1667 }
1668 if (out_regs[c_arg].first()->is_Register()) {
1669 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1670 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1671 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1672 }
1673 #endif /* ASSERT */
1674 switch (in_sig_bt[i]) {
1675 case T_ARRAY:
1676 case T_OBJECT:
1677 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1678 ((i == 0) && (!is_static)),
1679 &receiver_offset);
1680 int_args++;
1681 break;
1682 case T_VOID:
1683 break;
1684
1685 case T_FLOAT:
1686 __ float_move(in_regs[i], out_regs[c_arg]);
1687 float_args++;
1688 break;
1689
1690 case T_DOUBLE:
1691 assert( i + 1 < total_in_args &&
1692 in_sig_bt[i + 1] == T_VOID &&
1693 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1694 __ double_move(in_regs[i], out_regs[c_arg]);
1695 float_args++;
1696 break;
1697
1698 case T_LONG :
1699 __ long_move(in_regs[i], out_regs[c_arg]);
1700 int_args++;
1701 break;
1702
1703 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1704
1705 default:
1706 __ move32_64(in_regs[i], out_regs[c_arg]);
1707 int_args++;
1708 }
1709 }
1710
1711 // point c_arg at the first arg that is already loaded in case we
1712 // need to spill before we call out
1713 int c_arg = total_c_args - total_in_args;
1714
1715 // Pre-load a static method's oop into c_rarg1.
1716 if (method->is_static()) {
1717
1718 // load oop into a register
1719 __ movoop(c_rarg1,
1720 JNIHandles::make_local(method->method_holder()->java_mirror()));
1721
1722 // Now handlize the static class mirror it's known not-null.
1723 __ str(c_rarg1, Address(sp, klass_offset));
1724 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1725
1726 // Now get the handle
1727 __ lea(c_rarg1, Address(sp, klass_offset));
1728 // and protect the arg if we must spill
1729 c_arg--;
1730 }
1731
1732 // Change state to native (we save the return address in the thread, since it might not
1733 // be pushed on the stack when we do a stack traversal).
1734 // We use the same pc/oopMap repeatedly when we call out
1735
1736 Label native_return;
1737 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1738
1739 Label dtrace_method_entry, dtrace_method_entry_done;
1740 {
1741 uint64_t offset;
1742 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1743 __ ldrb(rscratch1, Address(rscratch1, offset));
1744 __ cbnzw(rscratch1, dtrace_method_entry);
1745 __ bind(dtrace_method_entry_done);
1746 }
1747
1748 // RedefineClasses() tracing support for obsolete method entry
1749 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1750 // protect the args we've loaded
1751 save_args(masm, total_c_args, c_arg, out_regs);
1752 __ mov_metadata(c_rarg1, method());
1753 __ call_VM_leaf(
1754 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1755 rthread, c_rarg1);
1756 restore_args(masm, total_c_args, c_arg, out_regs);
1757 }
1758
1759 // Lock a synchronized method
1760
1761 // Register definitions used by locking and unlocking
1762
1763 const Register swap_reg = r0;
1764 const Register obj_reg = r19; // Will contain the oop
1765 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1766 const Register old_hdr = r13; // value of old header at unlock time
1767 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock
1768 const Register tmp = lr;
1769
1770 Label slow_path_lock;
1771 Label lock_done;
1772
1773 if (method->is_synchronized()) {
1774 Label count;
1775 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1776
1777 // Get the handle (the 2nd argument)
1778 __ mov(oop_handle_reg, c_rarg1);
1779
1780 // Get address of the box
1781
1782 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1783
1784 // Load the oop from the handle
1785 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1786
1787 if (LockingMode == LM_MONITOR) {
1788 __ b(slow_path_lock);
1789 } else if (LockingMode == LM_LEGACY) {
1790 // Load (object->mark() | 1) into swap_reg %r0
1791 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1792 __ orr(swap_reg, rscratch1, 1);
1793
1794 // Save (object->mark() | 1) into BasicLock's displaced header
1795 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1796
1797 // src -> dest iff dest == r0 else r0 <- dest
1798 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr);
1799
1800 // Hmm should this move to the slow path code area???
1801
1802 // Test if the oopMark is an obvious stack pointer, i.e.,
1803 // 1) (mark & 3) == 0, and
1804 // 2) sp <= mark < mark + os::pagesize()
1805 // These 3 tests can be done by evaluating the following
1806 // expression: ((mark - sp) & (3 - os::vm_page_size())),
1807 // assuming both stack pointer and pagesize have their
1808 // least significant 2 bits clear.
1809 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
1810
1811 __ sub(swap_reg, sp, swap_reg);
1812 __ neg(swap_reg, swap_reg);
1813 __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size());
1814
1815 // Save the test result, for recursive case, the result is zero
1816 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1817 __ br(Assembler::NE, slow_path_lock);
1818 } else {
1819 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1820 __ lightweight_lock(obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1821 }
1822 __ bind(count);
1823 __ increment(Address(rthread, JavaThread::held_monitor_count_offset()));
1824
1825 // Slow path will re-enter here
1826 __ bind(lock_done);
1827 }
1828
1829
1830 // Finally just about ready to make the JNI call
1831
1832 // get JNIEnv* which is first argument to native
1833 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1834
1835 // Now set thread in native
1836 __ mov(rscratch1, _thread_in_native);
1837 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1838 __ stlrw(rscratch1, rscratch2);
1839
1840 __ rt_call(native_func);
1841
1842 __ bind(native_return);
1843
1844 intptr_t return_pc = (intptr_t) __ pc();
1845 oop_maps->add_gc_map(return_pc - start, map);
1846
1847 // Unpack native results.
1848 switch (ret_type) {
1849 case T_BOOLEAN: __ c2bool(r0); break;
1850 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
1851 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
1852 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
1853 case T_INT : __ sbfx(r0, r0, 0, 32); break;
1854 case T_DOUBLE :
1855 case T_FLOAT :
1856 // Result is in v0 we'll save as needed
1857 break;
1858 case T_ARRAY: // Really a handle
1859 case T_OBJECT: // Really a handle
1860 break; // can't de-handlize until after safepoint check
1861 case T_VOID: break;
1862 case T_LONG: break;
1863 default : ShouldNotReachHere();
1864 }
1865
1866 Label safepoint_in_progress, safepoint_in_progress_done;
1867 Label after_transition;
1868
1869 // Switch thread to "native transition" state before reading the synchronization state.
1870 // This additional state is necessary because reading and testing the synchronization
1871 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1872 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1873 // VM thread changes sync state to synchronizing and suspends threads for GC.
1874 // Thread A is resumed to finish this native method, but doesn't block here since it
1875 // didn't see any synchronization is progress, and escapes.
1876 __ mov(rscratch1, _thread_in_native_trans);
1877
1878 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
1879
1880 // Force this write out before the read below
1881 if (!UseSystemMemoryBarrier) {
1882 __ dmb(Assembler::ISH);
1883 }
1884
1885 __ verify_sve_vector_length();
1886
1887 // Check for safepoint operation in progress and/or pending suspend requests.
1888 {
1889 // We need an acquire here to ensure that any subsequent load of the
1890 // global SafepointSynchronize::_state flag is ordered after this load
1891 // of the thread-local polling word. We don't want this poll to
1892 // return false (i.e. not safepointing) and a later poll of the global
1893 // SafepointSynchronize::_state spuriously to return true.
1894 //
1895 // This is to avoid a race when we're in a native->Java transition
1896 // racing the code which wakes up from a safepoint.
1897
1898 __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
1899 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1900 __ cbnzw(rscratch1, safepoint_in_progress);
1901 __ bind(safepoint_in_progress_done);
1902 }
1903
1904 // change thread state
1905 __ mov(rscratch1, _thread_in_Java);
1906 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1907 __ stlrw(rscratch1, rscratch2);
1908 __ bind(after_transition);
1909
1910 Label reguard;
1911 Label reguard_done;
1912 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
1913 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
1914 __ br(Assembler::EQ, reguard);
1915 __ bind(reguard_done);
1916
1917 // native result if any is live
1918
1919 // Unlock
1920 Label unlock_done;
1921 Label slow_path_unlock;
1922 if (method->is_synchronized()) {
1923
1924 // Get locked oop from the handle we passed to jni
1925 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1926
1927 Label done, not_recursive;
1928
1929 if (LockingMode == LM_LEGACY) {
1930 // Simple recursive lock?
1931 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1932 __ cbnz(rscratch1, not_recursive);
1933 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1934 __ b(done);
1935 }
1936
1937 __ bind(not_recursive);
1938
1939 // Must save r0 if if it is live now because cmpxchg must use it
1940 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1941 save_native_result(masm, ret_type, stack_slots);
1942 }
1943
1944 if (LockingMode == LM_MONITOR) {
1945 __ b(slow_path_unlock);
1946 } else if (LockingMode == LM_LEGACY) {
1947 // get address of the stack lock
1948 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1949 // get old displaced header
1950 __ ldr(old_hdr, Address(r0, 0));
1951
1952 // Atomic swap old header if oop still contains the stack lock
1953 Label count;
1954 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock);
1955 __ bind(count);
1956 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1957 } else {
1958 assert(LockingMode == LM_LIGHTWEIGHT, "");
1959 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1960 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1961 }
1962
1963 // slow path re-enters here
1964 __ bind(unlock_done);
1965 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1966 restore_native_result(masm, ret_type, stack_slots);
1967 }
1968
1969 __ bind(done);
1970 }
1971
1972 Label dtrace_method_exit, dtrace_method_exit_done;
1973 {
1974 uint64_t offset;
1975 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1976 __ ldrb(rscratch1, Address(rscratch1, offset));
1977 __ cbnzw(rscratch1, dtrace_method_exit);
1978 __ bind(dtrace_method_exit_done);
1979 }
1980
1981 __ reset_last_Java_frame(false);
1982
1983 // Unbox oop result, e.g. JNIHandles::resolve result.
1984 if (is_reference_type(ret_type)) {
1985 __ resolve_jobject(r0, r1, r2);
1986 }
1987
1988 if (CheckJNICalls) {
1989 // clear_pending_jni_exception_check
1990 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
1991 }
1992
1993 // reset handle block
1994 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
1995 __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
1996
1997 __ leave();
1998
1999 // Any exception pending?
2000 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2001 __ cbnz(rscratch1, exception_pending);
2002
2003 // We're done
2004 __ ret(lr);
2005
2006 // Unexpected paths are out of line and go here
2007
2008 // forward the exception
2009 __ bind(exception_pending);
2010
2011 // and forward the exception
2012 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2013
2014 // Slow path locking & unlocking
2015 if (method->is_synchronized()) {
2016
2017 __ block_comment("Slow path lock {");
2018 __ bind(slow_path_lock);
2019
2020 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2021 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2022
2023 // protect the args we've loaded
2024 save_args(masm, total_c_args, c_arg, out_regs);
2025
2026 __ mov(c_rarg0, obj_reg);
2027 __ mov(c_rarg1, lock_reg);
2028 __ mov(c_rarg2, rthread);
2029
2030 // Not a leaf but we have last_Java_frame setup as we want
2031 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2032 restore_args(masm, total_c_args, c_arg, out_regs);
2033
2034 #ifdef ASSERT
2035 { Label L;
2036 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2037 __ cbz(rscratch1, L);
2038 __ stop("no pending exception allowed on exit from monitorenter");
2039 __ bind(L);
2040 }
2041 #endif
2042 __ b(lock_done);
2043
2044 __ block_comment("} Slow path lock");
2045
2046 __ block_comment("Slow path unlock {");
2047 __ bind(slow_path_unlock);
2048
2049 // If we haven't already saved the native result we must save it now as xmm registers
2050 // are still exposed.
2051
2052 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2053 save_native_result(masm, ret_type, stack_slots);
2054 }
2055
2056 __ mov(c_rarg2, rthread);
2057 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2058 __ mov(c_rarg0, obj_reg);
2059
2060 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2061 // NOTE that obj_reg == r19 currently
2062 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2063 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2064
2065 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2066
2067 #ifdef ASSERT
2068 {
2069 Label L;
2070 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2071 __ cbz(rscratch1, L);
2072 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2073 __ bind(L);
2074 }
2075 #endif /* ASSERT */
2076
2077 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2078
2079 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2080 restore_native_result(masm, ret_type, stack_slots);
2081 }
2082 __ b(unlock_done);
2083
2084 __ block_comment("} Slow path unlock");
2085
2086 } // synchronized
2087
2088 // SLOW PATH Reguard the stack if needed
2089
2090 __ bind(reguard);
2091 save_native_result(masm, ret_type, stack_slots);
2092 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2093 restore_native_result(masm, ret_type, stack_slots);
2094 // and continue
2095 __ b(reguard_done);
2096
2097 // SLOW PATH safepoint
2098 {
2099 __ block_comment("safepoint {");
2100 __ bind(safepoint_in_progress);
2101
2102 // Don't use call_VM as it will see a possible pending exception and forward it
2103 // and never return here preventing us from clearing _last_native_pc down below.
2104 //
2105 save_native_result(masm, ret_type, stack_slots);
2106 __ mov(c_rarg0, rthread);
2107 #ifndef PRODUCT
2108 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2109 #endif
2110 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2111 __ blr(rscratch1);
2112
2113 // Restore any method result value
2114 restore_native_result(masm, ret_type, stack_slots);
2115
2116 __ b(safepoint_in_progress_done);
2117 __ block_comment("} safepoint");
2118 }
2119
2120 // SLOW PATH dtrace support
2121 {
2122 __ block_comment("dtrace entry {");
2123 __ bind(dtrace_method_entry);
2124
2125 // We have all of the arguments setup at this point. We must not touch any register
2126 // argument registers at this point (what if we save/restore them there are no oop?
2127
2128 save_args(masm, total_c_args, c_arg, out_regs);
2129 __ mov_metadata(c_rarg1, method());
2130 __ call_VM_leaf(
2131 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2132 rthread, c_rarg1);
2133 restore_args(masm, total_c_args, c_arg, out_regs);
2134 __ b(dtrace_method_entry_done);
2135 __ block_comment("} dtrace entry");
2136 }
2137
2138 {
2139 __ block_comment("dtrace exit {");
2140 __ bind(dtrace_method_exit);
2141 save_native_result(masm, ret_type, stack_slots);
2142 __ mov_metadata(c_rarg1, method());
2143 __ call_VM_leaf(
2144 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2145 rthread, c_rarg1);
2146 restore_native_result(masm, ret_type, stack_slots);
2147 __ b(dtrace_method_exit_done);
2148 __ block_comment("} dtrace exit");
2149 }
2150
2151
2152 __ flush();
2153
2154 nmethod *nm = nmethod::new_native_nmethod(method,
2155 compile_id,
2156 masm->code(),
2157 vep_offset,
2158 frame_complete,
2159 stack_slots / VMRegImpl::slots_per_word,
2160 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2161 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2162 oop_maps);
2163
2164 return nm;
2165 }
2166
2167 // this function returns the adjust size (in number of words) to a c2i adapter
2168 // activation for use during deoptimization
2169 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2170 assert(callee_locals >= callee_parameters,
2171 "test and remove; got more parms than locals");
2172 if (callee_locals < callee_parameters)
2173 return 0; // No adjustment for negative locals
2174 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2175 // diff is counted in stack words
2176 return align_up(diff, 2);
2177 }
2178
2179
2180 //------------------------------generate_deopt_blob----------------------------
2181 void SharedRuntime::generate_deopt_blob() {
2182 // Allocate space for the code
2183 ResourceMark rm;
2184 // Setup code generation tools
2185 int pad = 0;
2186 #if INCLUDE_JVMCI
2187 if (EnableJVMCI) {
2188 pad += 512; // Increase the buffer size when compiling for JVMCI
2189 }
2190 #endif
2191 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2192 MacroAssembler* masm = new MacroAssembler(&buffer);
2193 int frame_size_in_words;
2194 OopMap* map = nullptr;
2195 OopMapSet *oop_maps = new OopMapSet();
2196 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2197
2198 // -------------
2199 // This code enters when returning to a de-optimized nmethod. A return
2200 // address has been pushed on the stack, and return values are in
2201 // registers.
2202 // If we are doing a normal deopt then we were called from the patched
2203 // nmethod from the point we returned to the nmethod. So the return
2204 // address on the stack is wrong by NativeCall::instruction_size
2205 // We will adjust the value so it looks like we have the original return
2206 // address on the stack (like when we eagerly deoptimized).
2207 // In the case of an exception pending when deoptimizing, we enter
2208 // with a return address on the stack that points after the call we patched
2209 // into the exception handler. We have the following register state from,
2210 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2211 // r0: exception oop
2212 // r19: exception handler
2213 // r3: throwing pc
2214 // So in this case we simply jam r3 into the useless return address and
2215 // the stack looks just like we want.
2216 //
2217 // At this point we need to de-opt. We save the argument return
2218 // registers. We call the first C routine, fetch_unroll_info(). This
2219 // routine captures the return values and returns a structure which
2220 // describes the current frame size and the sizes of all replacement frames.
2221 // The current frame is compiled code and may contain many inlined
2222 // functions, each with their own JVM state. We pop the current frame, then
2223 // push all the new frames. Then we call the C routine unpack_frames() to
2224 // populate these frames. Finally unpack_frames() returns us the new target
2225 // address. Notice that callee-save registers are BLOWN here; they have
2226 // already been captured in the vframeArray at the time the return PC was
2227 // patched.
2228 address start = __ pc();
2229 Label cont;
2230
2231 // Prolog for non exception case!
2232
2233 // Save everything in sight.
2234 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2235
2236 // Normal deoptimization. Save exec mode for unpack_frames.
2237 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2238 __ b(cont);
2239
2240 int reexecute_offset = __ pc() - start;
2241 #if INCLUDE_JVMCI && !defined(COMPILER1)
2242 if (EnableJVMCI && UseJVMCICompiler) {
2243 // JVMCI does not use this kind of deoptimization
2244 __ should_not_reach_here();
2245 }
2246 #endif
2247
2248 // Reexecute case
2249 // return address is the pc describes what bci to do re-execute at
2250
2251 // No need to update map as each call to save_live_registers will produce identical oopmap
2252 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2253
2254 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2255 __ b(cont);
2256
2257 #if INCLUDE_JVMCI
2258 Label after_fetch_unroll_info_call;
2259 int implicit_exception_uncommon_trap_offset = 0;
2260 int uncommon_trap_offset = 0;
2261
2262 if (EnableJVMCI) {
2263 implicit_exception_uncommon_trap_offset = __ pc() - start;
2264
2265 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2266 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2267
2268 uncommon_trap_offset = __ pc() - start;
2269
2270 // Save everything in sight.
2271 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2272 // fetch_unroll_info needs to call last_java_frame()
2273 Label retaddr;
2274 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2275
2276 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2277 __ movw(rscratch1, -1);
2278 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2279
2280 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2281 __ mov(c_rarg0, rthread);
2282 __ movw(c_rarg2, rcpool); // exec mode
2283 __ lea(rscratch1,
2284 RuntimeAddress(CAST_FROM_FN_PTR(address,
2285 Deoptimization::uncommon_trap)));
2286 __ blr(rscratch1);
2287 __ bind(retaddr);
2288 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2289
2290 __ reset_last_Java_frame(false);
2291
2292 __ b(after_fetch_unroll_info_call);
2293 } // EnableJVMCI
2294 #endif // INCLUDE_JVMCI
2295
2296 int exception_offset = __ pc() - start;
2297
2298 // Prolog for exception case
2299
2300 // all registers are dead at this entry point, except for r0, and
2301 // r3 which contain the exception oop and exception pc
2302 // respectively. Set them in TLS and fall thru to the
2303 // unpack_with_exception_in_tls entry point.
2304
2305 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2306 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2307
2308 int exception_in_tls_offset = __ pc() - start;
2309
2310 // new implementation because exception oop is now passed in JavaThread
2311
2312 // Prolog for exception case
2313 // All registers must be preserved because they might be used by LinearScan
2314 // Exceptiop oop and throwing PC are passed in JavaThread
2315 // tos: stack at point of call to method that threw the exception (i.e. only
2316 // args are on the stack, no return address)
2317
2318 // The return address pushed by save_live_registers will be patched
2319 // later with the throwing pc. The correct value is not available
2320 // now because loading it from memory would destroy registers.
2321
2322 // NB: The SP at this point must be the SP of the method that is
2323 // being deoptimized. Deoptimization assumes that the frame created
2324 // here by save_live_registers is immediately below the method's SP.
2325 // This is a somewhat fragile mechanism.
2326
2327 // Save everything in sight.
2328 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2329
2330 // Now it is safe to overwrite any register
2331
2332 // Deopt during an exception. Save exec mode for unpack_frames.
2333 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2334
2335 // load throwing pc from JavaThread and patch it as the return address
2336 // of the current frame. Then clear the field in JavaThread
2337 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2338 __ protect_return_address(r3);
2339 __ str(r3, Address(rfp, wordSize));
2340 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2341
2342 #ifdef ASSERT
2343 // verify that there is really an exception oop in JavaThread
2344 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2345 __ verify_oop(r0);
2346
2347 // verify that there is no pending exception
2348 Label no_pending_exception;
2349 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2350 __ cbz(rscratch1, no_pending_exception);
2351 __ stop("must not have pending exception here");
2352 __ bind(no_pending_exception);
2353 #endif
2354
2355 __ bind(cont);
2356
2357 // Call C code. Need thread and this frame, but NOT official VM entry
2358 // crud. We cannot block on this call, no GC can happen.
2359 //
2360 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2361
2362 // fetch_unroll_info needs to call last_java_frame().
2363
2364 Label retaddr;
2365 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2366 #ifdef ASSERT
2367 { Label L;
2368 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2369 __ cbz(rscratch1, L);
2370 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2371 __ bind(L);
2372 }
2373 #endif // ASSERT
2374 __ mov(c_rarg0, rthread);
2375 __ mov(c_rarg1, rcpool);
2376 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2377 __ blr(rscratch1);
2378 __ bind(retaddr);
2379
2380 // Need to have an oopmap that tells fetch_unroll_info where to
2381 // find any register it might need.
2382 oop_maps->add_gc_map(__ pc() - start, map);
2383
2384 __ reset_last_Java_frame(false);
2385
2386 #if INCLUDE_JVMCI
2387 if (EnableJVMCI) {
2388 __ bind(after_fetch_unroll_info_call);
2389 }
2390 #endif
2391
2392 // Load UnrollBlock* into r5
2393 __ mov(r5, r0);
2394
2395 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2396 Label noException;
2397 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2398 __ br(Assembler::NE, noException);
2399 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2400 // QQQ this is useless it was null above
2401 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2402 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2403 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2404
2405 __ verify_oop(r0);
2406
2407 // Overwrite the result registers with the exception results.
2408 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2409 // I think this is useless
2410 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2411
2412 __ bind(noException);
2413
2414 // Only register save data is on the stack.
2415 // Now restore the result registers. Everything else is either dead
2416 // or captured in the vframeArray.
2417
2418 // Restore fp result register
2419 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2420 // Restore integer result register
2421 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2422
2423 // Pop all of the register save area off the stack
2424 __ add(sp, sp, frame_size_in_words * wordSize);
2425
2426 // All of the register save area has been popped of the stack. Only the
2427 // return address remains.
2428
2429 // Pop all the frames we must move/replace.
2430 //
2431 // Frame picture (youngest to oldest)
2432 // 1: self-frame (no frame link)
2433 // 2: deopting frame (no frame link)
2434 // 3: caller of deopting frame (could be compiled/interpreted).
2435 //
2436 // Note: by leaving the return address of self-frame on the stack
2437 // and using the size of frame 2 to adjust the stack
2438 // when we are done the return to frame 3 will still be on the stack.
2439
2440 // Pop deoptimized frame
2441 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2442 __ sub(r2, r2, 2 * wordSize);
2443 __ add(sp, sp, r2);
2444 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2445
2446 #ifdef ASSERT
2447 // Compilers generate code that bang the stack by as much as the
2448 // interpreter would need. So this stack banging should never
2449 // trigger a fault. Verify that it does not on non product builds.
2450 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2451 __ bang_stack_size(r19, r2);
2452 #endif
2453 // Load address of array of frame pcs into r2
2454 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2455
2456 // Trash the old pc
2457 // __ addptr(sp, wordSize); FIXME ????
2458
2459 // Load address of array of frame sizes into r4
2460 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2461
2462 // Load counter into r3
2463 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2464
2465 // Now adjust the caller's stack to make up for the extra locals
2466 // but record the original sp so that we can save it in the skeletal interpreter
2467 // frame and the stack walking of interpreter_sender will get the unextended sp
2468 // value and not the "real" sp value.
2469
2470 const Register sender_sp = r6;
2471
2472 __ mov(sender_sp, sp);
2473 __ ldrw(r19, Address(r5,
2474 Deoptimization::UnrollBlock::
2475 caller_adjustment_offset()));
2476 __ sub(sp, sp, r19);
2477
2478 // Push interpreter frames in a loop
2479 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2480 __ mov(rscratch2, rscratch1);
2481 Label loop;
2482 __ bind(loop);
2483 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2484 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2485 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2486 __ enter(); // Save old & set new fp
2487 __ sub(sp, sp, r19); // Prolog
2488 // This value is corrected by layout_activation_impl
2489 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2490 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2491 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2492 __ sub(r3, r3, 1); // Decrement counter
2493 __ cbnz(r3, loop);
2494
2495 // Re-push self-frame
2496 __ ldr(lr, Address(r2));
2497 __ enter();
2498
2499 // Allocate a full sized register save area. We subtract 2 because
2500 // enter() just pushed 2 words
2501 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2502
2503 // Restore frame locals after moving the frame
2504 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2505 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2506
2507 // Call C code. Need thread but NOT official VM entry
2508 // crud. We cannot block on this call, no GC can happen. Call should
2509 // restore return values to their stack-slots with the new SP.
2510 //
2511 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2512
2513 // Use rfp because the frames look interpreted now
2514 // Don't need the precise return PC here, just precise enough to point into this code blob.
2515 address the_pc = __ pc();
2516 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2517
2518 __ mov(c_rarg0, rthread);
2519 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2520 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2521 __ blr(rscratch1);
2522
2523 // Set an oopmap for the call site
2524 // Use the same PC we used for the last java frame
2525 oop_maps->add_gc_map(the_pc - start,
2526 new OopMap( frame_size_in_words, 0 ));
2527
2528 // Clear fp AND pc
2529 __ reset_last_Java_frame(true);
2530
2531 // Collect return values
2532 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2533 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2534 // I think this is useless (throwing pc?)
2535 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2536
2537 // Pop self-frame.
2538 __ leave(); // Epilog
2539
2540 // Jump to interpreter
2541 __ ret(lr);
2542
2543 // Make sure all code is generated
2544 masm->flush();
2545
2546 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2547 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2548 #if INCLUDE_JVMCI
2549 if (EnableJVMCI) {
2550 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2551 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2552 }
2553 #endif
2554 }
2555
2556 // Number of stack slots between incoming argument block and the start of
2557 // a new frame. The PROLOG must add this many slots to the stack. The
2558 // EPILOG must remove this many slots. aarch64 needs two slots for
2559 // return address and fp.
2560 // TODO think this is correct but check
2561 uint SharedRuntime::in_preserve_stack_slots() {
2562 return 4;
2563 }
2564
2565 uint SharedRuntime::out_preserve_stack_slots() {
2566 return 0;
2567 }
2568
2569 #ifdef COMPILER2
2570 //------------------------------generate_uncommon_trap_blob--------------------
2571 void SharedRuntime::generate_uncommon_trap_blob() {
2572 // Allocate space for the code
2573 ResourceMark rm;
2574 // Setup code generation tools
2575 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2576 MacroAssembler* masm = new MacroAssembler(&buffer);
2577
2578 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2579
2580 address start = __ pc();
2581
2582 // Push self-frame. We get here with a return address in LR
2583 // and sp should be 16 byte aligned
2584 // push rfp and retaddr by hand
2585 __ protect_return_address();
2586 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2587 // we don't expect an arg reg save area
2588 #ifndef PRODUCT
2589 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2590 #endif
2591 // compiler left unloaded_class_index in j_rarg0 move to where the
2592 // runtime expects it.
2593 if (c_rarg1 != j_rarg0) {
2594 __ movw(c_rarg1, j_rarg0);
2595 }
2596
2597 // we need to set the past SP to the stack pointer of the stub frame
2598 // and the pc to the address where this runtime call will return
2599 // although actually any pc in this code blob will do).
2600 Label retaddr;
2601 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2602
2603 // Call C code. Need thread but NOT official VM entry
2604 // crud. We cannot block on this call, no GC can happen. Call should
2605 // capture callee-saved registers as well as return values.
2606 // Thread is in rdi already.
2607 //
2608 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2609 //
2610 // n.b. 2 gp args, 0 fp args, integral return type
2611
2612 __ mov(c_rarg0, rthread);
2613 __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2614 __ lea(rscratch1,
2615 RuntimeAddress(CAST_FROM_FN_PTR(address,
2616 Deoptimization::uncommon_trap)));
2617 __ blr(rscratch1);
2618 __ bind(retaddr);
2619
2620 // Set an oopmap for the call site
2621 OopMapSet* oop_maps = new OopMapSet();
2622 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2623
2624 // location of rfp is known implicitly by the frame sender code
2625
2626 oop_maps->add_gc_map(__ pc() - start, map);
2627
2628 __ reset_last_Java_frame(false);
2629
2630 // move UnrollBlock* into r4
2631 __ mov(r4, r0);
2632
2633 #ifdef ASSERT
2634 { Label L;
2635 __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset()));
2636 __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2637 __ br(Assembler::EQ, L);
2638 __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2639 __ bind(L);
2640 }
2641 #endif
2642
2643 // Pop all the frames we must move/replace.
2644 //
2645 // Frame picture (youngest to oldest)
2646 // 1: self-frame (no frame link)
2647 // 2: deopting frame (no frame link)
2648 // 3: caller of deopting frame (could be compiled/interpreted).
2649
2650 // Pop self-frame. We have no frame, and must rely only on r0 and sp.
2651 __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2652
2653 // Pop deoptimized frame (int)
2654 __ ldrw(r2, Address(r4,
2655 Deoptimization::UnrollBlock::
2656 size_of_deoptimized_frame_offset()));
2657 __ sub(r2, r2, 2 * wordSize);
2658 __ add(sp, sp, r2);
2659 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2660
2661 #ifdef ASSERT
2662 // Compilers generate code that bang the stack by as much as the
2663 // interpreter would need. So this stack banging should never
2664 // trigger a fault. Verify that it does not on non product builds.
2665 __ ldrw(r1, Address(r4,
2666 Deoptimization::UnrollBlock::
2667 total_frame_sizes_offset()));
2668 __ bang_stack_size(r1, r2);
2669 #endif
2670
2671 // Load address of array of frame pcs into r2 (address*)
2672 __ ldr(r2, Address(r4,
2673 Deoptimization::UnrollBlock::frame_pcs_offset()));
2674
2675 // Load address of array of frame sizes into r5 (intptr_t*)
2676 __ ldr(r5, Address(r4,
2677 Deoptimization::UnrollBlock::
2678 frame_sizes_offset()));
2679
2680 // Counter
2681 __ ldrw(r3, Address(r4,
2682 Deoptimization::UnrollBlock::
2683 number_of_frames_offset())); // (int)
2684
2685 // Now adjust the caller's stack to make up for the extra locals but
2686 // record the original sp so that we can save it in the skeletal
2687 // interpreter frame and the stack walking of interpreter_sender
2688 // will get the unextended sp value and not the "real" sp value.
2689
2690 const Register sender_sp = r8;
2691
2692 __ mov(sender_sp, sp);
2693 __ ldrw(r1, Address(r4,
2694 Deoptimization::UnrollBlock::
2695 caller_adjustment_offset())); // (int)
2696 __ sub(sp, sp, r1);
2697
2698 // Push interpreter frames in a loop
2699 Label loop;
2700 __ bind(loop);
2701 __ ldr(r1, Address(r5, 0)); // Load frame size
2702 __ sub(r1, r1, 2 * wordSize); // We'll push pc and rfp by hand
2703 __ ldr(lr, Address(r2, 0)); // Save return address
2704 __ enter(); // and old rfp & set new rfp
2705 __ sub(sp, sp, r1); // Prolog
2706 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2707 // This value is corrected by layout_activation_impl
2708 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2709 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2710 __ add(r5, r5, wordSize); // Bump array pointer (sizes)
2711 __ add(r2, r2, wordSize); // Bump array pointer (pcs)
2712 __ subsw(r3, r3, 1); // Decrement counter
2713 __ br(Assembler::GT, loop);
2714 __ ldr(lr, Address(r2, 0)); // save final return address
2715 // Re-push self-frame
2716 __ enter(); // & old rfp & set new rfp
2717
2718 // Use rfp because the frames look interpreted now
2719 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2720 // Don't need the precise return PC here, just precise enough to point into this code blob.
2721 address the_pc = __ pc();
2722 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2723
2724 // Call C code. Need thread but NOT official VM entry
2725 // crud. We cannot block on this call, no GC can happen. Call should
2726 // restore return values to their stack-slots with the new SP.
2727 // Thread is in rdi already.
2728 //
2729 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2730 //
2731 // n.b. 2 gp args, 0 fp args, integral return type
2732
2733 // sp should already be aligned
2734 __ mov(c_rarg0, rthread);
2735 __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2736 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2737 __ blr(rscratch1);
2738
2739 // Set an oopmap for the call site
2740 // Use the same PC we used for the last java frame
2741 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2742
2743 // Clear fp AND pc
2744 __ reset_last_Java_frame(true);
2745
2746 // Pop self-frame.
2747 __ leave(); // Epilog
2748
2749 // Jump to interpreter
2750 __ ret(lr);
2751
2752 // Make sure all code is generated
2753 masm->flush();
2754
2755 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
2756 SimpleRuntimeFrame::framesize >> 1);
2757 }
2758 #endif // COMPILER2
2759
2760
2761 //------------------------------generate_handler_blob------
2762 //
2763 // Generate a special Compile2Runtime blob that saves all registers,
2764 // and setup oopmap.
2765 //
2766 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2767 ResourceMark rm;
2768 OopMapSet *oop_maps = new OopMapSet();
2769 OopMap* map;
2770
2771 // Allocate space for the code. Setup code generation tools.
2772 CodeBuffer buffer("handler_blob", 2048, 1024);
2773 MacroAssembler* masm = new MacroAssembler(&buffer);
2774
2775 address start = __ pc();
2776 address call_pc = nullptr;
2777 int frame_size_in_words;
2778 bool cause_return = (poll_type == POLL_AT_RETURN);
2779 RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2780
2781 // When the signal occurred, the LR was either signed and stored on the stack (in which
2782 // case it will be restored from the stack before being used) or unsigned and not stored
2783 // on the stack. Stipping ensures we get the right value.
2784 __ strip_return_address();
2785
2786 // Save Integer and Float registers.
2787 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2788
2789 // The following is basically a call_VM. However, we need the precise
2790 // address of the call in order to generate an oopmap. Hence, we do all the
2791 // work ourselves.
2792
2793 Label retaddr;
2794 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2795
2796 // The return address must always be correct so that frame constructor never
2797 // sees an invalid pc.
2798
2799 if (!cause_return) {
2800 // overwrite the return address pushed by save_live_registers
2801 // Additionally, r20 is a callee-saved register so we can look at
2802 // it later to determine if someone changed the return address for
2803 // us!
2804 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2805 __ protect_return_address(r20);
2806 __ str(r20, Address(rfp, wordSize));
2807 }
2808
2809 // Do the call
2810 __ mov(c_rarg0, rthread);
2811 __ lea(rscratch1, RuntimeAddress(call_ptr));
2812 __ blr(rscratch1);
2813 __ bind(retaddr);
2814
2815 // Set an oopmap for the call site. This oopmap will map all
2816 // oop-registers and debug-info registers as callee-saved. This
2817 // will allow deoptimization at this safepoint to find all possible
2818 // debug-info recordings, as well as let GC find all oops.
2819
2820 oop_maps->add_gc_map( __ pc() - start, map);
2821
2822 Label noException;
2823
2824 __ reset_last_Java_frame(false);
2825
2826 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2827
2828 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2829 __ cbz(rscratch1, noException);
2830
2831 // Exception pending
2832
2833 reg_save.restore_live_registers(masm);
2834
2835 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2836
2837 // No exception case
2838 __ bind(noException);
2839
2840 Label no_adjust, bail;
2841 if (!cause_return) {
2842 // If our stashed return pc was modified by the runtime we avoid touching it
2843 __ ldr(rscratch1, Address(rfp, wordSize));
2844 __ cmp(r20, rscratch1);
2845 __ br(Assembler::NE, no_adjust);
2846 __ authenticate_return_address(r20);
2847
2848 #ifdef ASSERT
2849 // Verify the correct encoding of the poll we're about to skip.
2850 // See NativeInstruction::is_ldrw_to_zr()
2851 __ ldrw(rscratch1, Address(r20));
2852 __ ubfx(rscratch2, rscratch1, 22, 10);
2853 __ cmpw(rscratch2, 0b1011100101);
2854 __ br(Assembler::NE, bail);
2855 __ ubfx(rscratch2, rscratch1, 0, 5);
2856 __ cmpw(rscratch2, 0b11111);
2857 __ br(Assembler::NE, bail);
2858 #endif
2859 // Adjust return pc forward to step over the safepoint poll instruction
2860 __ add(r20, r20, NativeInstruction::instruction_size);
2861 __ protect_return_address(r20);
2862 __ str(r20, Address(rfp, wordSize));
2863 }
2864
2865 __ bind(no_adjust);
2866 // Normal exit, restore registers and exit.
2867 reg_save.restore_live_registers(masm);
2868
2869 __ ret(lr);
2870
2871 #ifdef ASSERT
2872 __ bind(bail);
2873 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2874 #endif
2875
2876 // Make sure all code is generated
2877 masm->flush();
2878
2879 // Fill-out other meta info
2880 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2881 }
2882
2883 //
2884 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2885 //
2886 // Generate a stub that calls into vm to find out the proper destination
2887 // of a java call. All the argument registers are live at this point
2888 // but since this is generic code we don't know what they are and the caller
2889 // must do any gc of the args.
2890 //
2891 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2892 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2893
2894 // allocate space for the code
2895 ResourceMark rm;
2896
2897 CodeBuffer buffer(name, 1000, 512);
2898 MacroAssembler* masm = new MacroAssembler(&buffer);
2899
2900 int frame_size_in_words;
2901 RegisterSaver reg_save(false /* save_vectors */);
2902
2903 OopMapSet *oop_maps = new OopMapSet();
2904 OopMap* map = nullptr;
2905
2906 int start = __ offset();
2907
2908 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2909
2910 int frame_complete = __ offset();
2911
2912 {
2913 Label retaddr;
2914 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2915
2916 __ mov(c_rarg0, rthread);
2917 __ lea(rscratch1, RuntimeAddress(destination));
2918
2919 __ blr(rscratch1);
2920 __ bind(retaddr);
2921 }
2922
2923 // Set an oopmap for the call site.
2924 // We need this not only for callee-saved registers, but also for volatile
2925 // registers that the compiler might be keeping live across a safepoint.
2926
2927 oop_maps->add_gc_map( __ offset() - start, map);
2928
2929 // r0 contains the address we are going to jump to assuming no exception got installed
2930
2931 // clear last_Java_sp
2932 __ reset_last_Java_frame(false);
2933 // check for pending exceptions
2934 Label pending;
2935 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2936 __ cbnz(rscratch1, pending);
2937
2938 // get the returned Method*
2939 __ get_vm_result_2(rmethod, rthread);
2940 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2941
2942 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2943 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2944 reg_save.restore_live_registers(masm);
2945
2946 // We are back to the original state on entry and ready to go.
2947
2948 __ br(rscratch1);
2949
2950 // Pending exception after the safepoint
2951
2952 __ bind(pending);
2953
2954 reg_save.restore_live_registers(masm);
2955
2956 // exception pending => remove activation and forward to exception handler
2957
2958 __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
2959
2960 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2961 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2962
2963 // -------------
2964 // make sure all code is generated
2965 masm->flush();
2966
2967 // return the blob
2968 // frame_size_words or bytes??
2969 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2970 }
2971
2972 #ifdef COMPILER2
2973 // This is here instead of runtime_aarch64_64.cpp because it uses SimpleRuntimeFrame
2974 //
2975 //------------------------------generate_exception_blob---------------------------
2976 // creates exception blob at the end
2977 // Using exception blob, this code is jumped from a compiled method.
2978 // (see emit_exception_handler in x86_64.ad file)
2979 //
2980 // Given an exception pc at a call we call into the runtime for the
2981 // handler in this method. This handler might merely restore state
2982 // (i.e. callee save registers) unwind the frame and jump to the
2983 // exception handler for the nmethod if there is no Java level handler
2984 // for the nmethod.
2985 //
2986 // This code is entered with a jmp.
2987 //
2988 // Arguments:
2989 // r0: exception oop
2990 // r3: exception pc
2991 //
2992 // Results:
2993 // r0: exception oop
2994 // r3: exception pc in caller or ???
2995 // destination: exception handler of caller
2996 //
2997 // Note: the exception pc MUST be at a call (precise debug information)
2998 // Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
2999 //
3000
3001 void OptoRuntime::generate_exception_blob() {
3002 assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
3003 assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
3004 assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
3005
3006 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3007
3008 // Allocate space for the code
3009 ResourceMark rm;
3010 // Setup code generation tools
3011 CodeBuffer buffer("exception_blob", 2048, 1024);
3012 MacroAssembler* masm = new MacroAssembler(&buffer);
3013
3014 // TODO check various assumptions made here
3015 //
3016 // make sure we do so before running this
3017
3018 address start = __ pc();
3019
3020 // push rfp and retaddr by hand
3021 // Exception pc is 'return address' for stack walker
3022 __ protect_return_address();
3023 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3024 // there are no callee save registers and we don't expect an
3025 // arg reg save area
3026 #ifndef PRODUCT
3027 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3028 #endif
3029 // Store exception in Thread object. We cannot pass any arguments to the
3030 // handle_exception call, since we do not want to make any assumption
3031 // about the size of the frame where the exception happened in.
3032 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3033 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3034
3035 // This call does all the hard work. It checks if an exception handler
3036 // exists in the method.
3037 // If so, it returns the handler address.
3038 // If not, it prepares for stack-unwinding, restoring the callee-save
3039 // registers of the frame being removed.
3040 //
3041 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3042 //
3043 // n.b. 1 gp arg, 0 fp args, integral return type
3044
3045 // the stack should always be aligned
3046 address the_pc = __ pc();
3047 __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3048 __ mov(c_rarg0, rthread);
3049 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3050 __ blr(rscratch1);
3051 // handle_exception_C is a special VM call which does not require an explicit
3052 // instruction sync afterwards.
3053
3054 // May jump to SVE compiled code
3055 __ reinitialize_ptrue();
3056
3057 // Set an oopmap for the call site. This oopmap will only be used if we
3058 // are unwinding the stack. Hence, all locations will be dead.
3059 // Callee-saved registers will be the same as the frame above (i.e.,
3060 // handle_exception_stub), since they were restored when we got the
3061 // exception.
3062
3063 OopMapSet* oop_maps = new OopMapSet();
3064
3065 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3066
3067 __ reset_last_Java_frame(false);
3068
3069 // Restore callee-saved registers
3070
3071 // rfp is an implicitly saved callee saved register (i.e. the calling
3072 // convention will save restore it in prolog/epilog) Other than that
3073 // there are no callee save registers now that adapter frames are gone.
3074 // and we dont' expect an arg reg save area
3075 __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3076 __ authenticate_return_address(r3);
3077
3078 // r0: exception handler
3079
3080 // We have a handler in r0 (could be deopt blob).
3081 __ mov(r8, r0);
3082
3083 // Get the exception oop
3084 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3085 // Get the exception pc in case we are deoptimized
3086 __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3087 #ifdef ASSERT
3088 __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3089 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3090 #endif
3091 // Clear the exception oop so GC no longer processes it as a root.
3092 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3093
3094 // r0: exception oop
3095 // r8: exception handler
3096 // r4: exception pc
3097 // Jump to handler
3098
3099 __ br(r8);
3100
3101 // Make sure all code is generated
3102 masm->flush();
3103
3104 // Set exception blob
3105 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3106 }
3107
3108 #endif // COMPILER2