1 /*
  2  * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "precompiled.hpp"
 28 #include "c1/c1_LIR.hpp"
 29 #include "c1/c1_MacroAssembler.hpp"
 30 #include "c1/c1_Runtime1.hpp"
 31 #include "classfile/systemDictionary.hpp"
 32 #include "gc/shared/barrierSetAssembler.hpp"
 33 #include "gc/shared/collectedHeap.hpp"
 34 #include "interpreter/interpreter.hpp"
 35 #include "oops/arrayOop.hpp"
 36 #include "oops/markWord.hpp"
 37 #include "runtime/basicLock.hpp"
 38 #include "runtime/os.hpp"
 39 #include "runtime/sharedRuntime.hpp"
 40 #include "runtime/stubRoutines.hpp"
 41 
 42 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
 43                                   FloatRegister freg0, FloatRegister freg1,
 44                                   Register result) {
 45   if (is_float) {
 46     float_compare(result, freg0, freg1, unordered_result);
 47   } else {
 48     double_compare(result, freg0, freg1, unordered_result);
 49   }
 50 }
 51 
 52 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
 53   const int aligned_mask = BytesPerWord - 1;
 54   const int hdr_offset = oopDesc::mark_offset_in_bytes();
 55   assert_different_registers(hdr, obj, disp_hdr);
 56   int null_check_offset = -1;
 57 
 58   verify_oop(obj);
 59 
 60   // save object being locked into the BasicObjectLock
 61   sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
 62 
 63   null_check_offset = offset();
 64 
 65   if (DiagnoseSyncOnValueBasedClasses != 0) {
 66     load_klass(hdr, obj);
 67     lwu(hdr, Address(hdr, Klass::access_flags_offset()));
 68     test_bit(t0, hdr, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
 69     bnez(t0, slow_case, true /* is_far */);
 70   }
 71 
 72   // Load object header
 73   ld(hdr, Address(obj, hdr_offset));
 74 
 75   if (LockingMode == LM_LIGHTWEIGHT) {
 76     fast_lock(obj, hdr, t0, t1, slow_case);
 77   } else if (LockingMode == LM_LEGACY) {
 78     Label done;
 79     // and mark it as unlocked
 80     ori(hdr, hdr, markWord::unlocked_value);
 81     // save unlocked object header into the displaced header location on the stack
 82     sd(hdr, Address(disp_hdr, 0));
 83     // test if object header is still the same (i.e. unlocked), and if so, store the
 84     // displaced header address in the object header - if it is not the same, get the
 85     // object header instead
 86     la(t1, Address(obj, hdr_offset));
 87     cmpxchgptr(hdr, disp_hdr, t1, t0, done, /*fallthough*/nullptr);
 88     // if the object header was the same, we're done
 89     // if the object header was not the same, it is now in the hdr register
 90     // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
 91     //
 92     // 1) (hdr & aligned_mask) == 0
 93     // 2) sp <= hdr
 94     // 3) hdr <= sp + page_size
 95     //
 96     // these 3 tests can be done by evaluating the following expression:
 97     //
 98     // (hdr -sp) & (aligned_mask - page_size)
 99     //
100     // assuming both the stack pointer and page_size have their least
101     // significant 2 bits cleared and page_size is a power of 2
102     sub(hdr, hdr, sp);
103     mv(t0, aligned_mask - (int)os::vm_page_size());
104     andr(hdr, hdr, t0);
105     // for recursive locking, the result is zero => save it in the displaced header
106     // location (null in the displaced hdr location indicates recursive locking)
107     sd(hdr, Address(disp_hdr, 0));
108     // otherwise we don't care about the result and handle locking via runtime call
109     bnez(hdr, slow_case, /* is_far */ true);
110     // done
111     bind(done);
112   }
113 
114   increment(Address(xthread, JavaThread::held_monitor_count_offset()));
115   return null_check_offset;
116 }
117 
118 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
119   const int aligned_mask = BytesPerWord - 1;
120   const int hdr_offset = oopDesc::mark_offset_in_bytes();
121   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
122   Label done;
123 
124   if (LockingMode != LM_LIGHTWEIGHT) {
125     // load displaced header
126     ld(hdr, Address(disp_hdr, 0));
127     // if the loaded hdr is null we had recursive locking
128     // if we had recursive locking, we are done
129     beqz(hdr, done);
130   }
131 
132   // load object
133   ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
134   verify_oop(obj);
135 
136   if (LockingMode == LM_LIGHTWEIGHT) {
137     ld(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
138     test_bit(t0, hdr, exact_log2(markWord::monitor_value));
139     bnez(t0, slow_case, /* is_far */ true);
140     fast_unlock(obj, hdr, t0, t1, slow_case);
141   } else if (LockingMode == LM_LEGACY) {
142     // test if object header is pointing to the displaced header, and if so, restore
143     // the displaced header in the object - if the object header is not pointing to
144     // the displaced header, get the object header instead
145     // if the object header was not pointing to the displaced header,
146     // we do unlocking via runtime call
147     if (hdr_offset) {
148       la(t0, Address(obj, hdr_offset));
149       cmpxchgptr(disp_hdr, hdr, t0, t1, done, &slow_case);
150     } else {
151       cmpxchgptr(disp_hdr, hdr, obj, t1, done, &slow_case);
152     }
153     // done
154     bind(done);
155   }
156 
157   decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
158 }
159 
160 // Defines obj, preserves var_size_in_bytes
161 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
162   if (UseTLAB) {
163     tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
164   } else {
165     j(slow_case);
166   }
167 }
168 
169 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
170   assert_different_registers(obj, klass, len, tmp1, tmp2);
171   // This assumes that all prototype bits fitr in an int32_t
172   mv(tmp1, (int32_t)(intptr_t)markWord::prototype().value());
173   sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
174 
175   if (UseCompressedClassPointers) { // Take care not to kill klass
176     encode_klass_not_null(tmp1, klass, tmp2);
177     sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
178   } else {
179     sd(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
180   }
181 
182   if (len->is_valid()) {
183     sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
184     if (!is_aligned(arrayOopDesc::header_size_in_bytes(), BytesPerWord)) {
185       assert(is_aligned(arrayOopDesc::header_size_in_bytes(), BytesPerInt), "must be 4-byte aligned");
186       sw(zr, Address(obj, arrayOopDesc::header_size_in_bytes()));
187     }
188   } else if (UseCompressedClassPointers) {
189     store_klass_gap(obj, zr);
190   }
191 }
192 
193 // preserves obj, destroys len_in_bytes
194 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
195   assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
196   Label done;
197 
198   // len_in_bytes is positive and ptr sized
199   sub(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
200   beqz(len_in_bytes, done);
201 
202   // Preserve obj
203   if (hdr_size_in_bytes) {
204     add(obj, obj, hdr_size_in_bytes);
205   }
206   zero_memory(obj, len_in_bytes, tmp);
207   if (hdr_size_in_bytes) {
208     sub(obj, obj, hdr_size_in_bytes);
209   }
210 
211   bind(done);
212 }
213 
214 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
215   assert_different_registers(obj, tmp1, tmp2);
216   assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
217 
218   try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
219 
220   initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
221 }
222 
223 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
224   assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
225          "con_size_in_bytes is not multiple of alignment");
226   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
227 
228   initialize_header(obj, klass, noreg, tmp1, tmp2);
229 
230   if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
231     // clear rest of allocated space
232     const Register index = tmp2;
233     // 16: multiplier for threshold
234     const int threshold = 16 * BytesPerWord;    // approximate break even point for code size (see comments below)
235     if (var_size_in_bytes != noreg) {
236       mv(index, var_size_in_bytes);
237       initialize_body(obj, index, hdr_size_in_bytes, tmp1);
238     } else if (con_size_in_bytes <= threshold) {
239       // use explicit null stores
240       int i = hdr_size_in_bytes;
241       if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord
242         sd(zr, Address(obj, i));
243         i += BytesPerWord;
244       }
245       for (; i < con_size_in_bytes; i += BytesPerWord) {
246         sd(zr, Address(obj, i));
247       }
248     } else if (con_size_in_bytes > hdr_size_in_bytes) {
249       block_comment("zero memory");
250       // use loop to null out the fields
251       int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
252       mv(index, words / 8); // 8: byte size
253 
254       const int unroll = 8; // Number of sd(zr) instructions we'll unroll
255       int remainder = words % unroll;
256       la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
257 
258       Label entry_point, loop;
259       j(entry_point);
260 
261       bind(loop);
262       sub(index, index, 1);
263       for (int i = -unroll; i < 0; i++) {
264         if (-i == remainder) {
265           bind(entry_point);
266         }
267         sd(zr, Address(t0, i * wordSize));
268       }
269       if (remainder == 0) {
270         bind(entry_point);
271       }
272       add(t0, t0, unroll * wordSize);
273       bnez(index, loop);
274     }
275   }
276 
277   membar(MacroAssembler::StoreStore);
278 
279   if (CURRENT_ENV->dtrace_alloc_probes()) {
280     assert(obj == x10, "must be");
281     far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
282   }
283 
284   verify_oop(obj);
285 }
286 
287 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case) {
288   assert_different_registers(obj, len, tmp1, tmp2, klass);
289 
290   // determine alignment mask
291   assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
292 
293   // check for negative or excessive length
294   mv(t0, (int32_t)max_array_allocation_length);
295   bgeu(len, t0, slow_case, /* is_far */ true);
296 
297   const Register arr_size = tmp2; // okay to be the same
298   // align object end
299   mv(arr_size, (int32_t)base_offset_in_bytes + MinObjAlignmentInBytesMask);
300   shadd(arr_size, len, arr_size, t0, f);
301   andi(arr_size, arr_size, ~(uint)MinObjAlignmentInBytesMask);
302 
303   try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
304 
305   initialize_header(obj, klass, len, tmp1, tmp2);
306 
307   // clear rest of allocated space
308   const Register len_zero = len;
309   // We align-up the header size to word-size, because we clear the
310   // possible alignment gap in initialize_header().
311   int hdr_size = align_up(base_offset_in_bytes, BytesPerWord);
312   initialize_body(obj, arr_size, hdr_size, len_zero);
313 
314   membar(MacroAssembler::StoreStore);
315 
316   if (CURRENT_ENV->dtrace_alloc_probes()) {
317     assert(obj == x10, "must be");
318     far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
319   }
320 
321   verify_oop(obj);
322 }
323 
324 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache, Label &L) {
325   verify_oop(receiver);
326   // explicit null check not needed since load from [klass_offset] causes a trap
327   // check against inline cache
328   assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
329   assert_different_registers(receiver, iCache, t0, t2);
330   cmp_klass(receiver, iCache, t0, t2 /* call-clobbered t2 as a tmp */, L);
331 }
332 
333 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
334   assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
335   // Make sure there is enough stack space for this method's activation.
336   // Note that we do this before creating a frame.
337   generate_stack_overflow_check(bang_size_in_bytes);
338   MacroAssembler::build_frame(framesize);
339 
340   // Insert nmethod entry barrier into frame.
341   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
342   bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
343 }
344 
345 void C1_MacroAssembler::remove_frame(int framesize) {
346   MacroAssembler::remove_frame(framesize);
347 }
348 
349 
350 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
351   // If we have to make this method not-entrant we'll overwrite its
352   // first instruction with a jump. For this action to be legal we
353   // must ensure that this first instruction is a J, JAL or NOP.
354   // Make it a NOP.
355   IncompressibleRegion ir(this);  // keep the nop as 4 bytes for patching.
356   assert_alignment(pc());
357   nop();  // 4 bytes
358 }
359 
360 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
361   //  fp + -2: link
362   //     + -1: return address
363   //     +  0: argument with offset 0
364   //     +  1: argument with offset 1
365   //     +  2: ...
366   ld(reg, Address(fp, offset_in_words * BytesPerWord));
367 }
368 
369 #ifndef PRODUCT
370 
371 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
372   if (!VerifyOops) {
373     return;
374   }
375   verify_oop_addr(Address(sp, stack_offset));
376 }
377 
378 void C1_MacroAssembler::verify_not_null_oop(Register r) {
379   if (!VerifyOops) return;
380   Label not_null;
381   bnez(r, not_null);
382   stop("non-null oop required");
383   bind(not_null);
384   verify_oop(r);
385 }
386 
387 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
388 #ifdef ASSERT
389   static int nn;
390   if (inv_x10) { mv(x10, 0xDEAD); }
391   if (inv_x9)  { mv(x9, 0xDEAD);  }
392   if (inv_x12) { mv(x12, nn++);   }
393   if (inv_x13) { mv(x13, 0xDEAD); }
394   if (inv_x14) { mv(x14, 0xDEAD); }
395   if (inv_x15) { mv(x15, 0xDEAD); }
396 #endif // ASSERT
397 }
398 #endif // ifndef PRODUCT
399 
400 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
401 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
402               Label& label, bool is_far, bool is_unordered);
403 
404 static c1_cond_branch_insn c1_cond_branch[] =
405 {
406   /* SHORT branches */
407   (c1_cond_branch_insn)&MacroAssembler::beq,
408   (c1_cond_branch_insn)&MacroAssembler::bne,
409   (c1_cond_branch_insn)&MacroAssembler::blt,
410   (c1_cond_branch_insn)&MacroAssembler::ble,
411   (c1_cond_branch_insn)&MacroAssembler::bge,
412   (c1_cond_branch_insn)&MacroAssembler::bgt,
413   (c1_cond_branch_insn)&MacroAssembler::bleu, // lir_cond_belowEqual
414   (c1_cond_branch_insn)&MacroAssembler::bgeu  // lir_cond_aboveEqual
415 };
416 
417 static c1_float_cond_branch_insn c1_float_cond_branch[] =
418 {
419   /* FLOAT branches */
420   (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
421   (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
422   (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
423   (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
424   (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
425   (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
426   nullptr, // lir_cond_belowEqual
427   nullptr, // lir_cond_aboveEqual
428 
429   /* DOUBLE branches */
430   (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
431   (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
432   (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
433   (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
434   (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
435   (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
436   nullptr, // lir_cond_belowEqual
437   nullptr  // lir_cond_aboveEqual
438 };
439 
440 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
441                                       BasicType type, bool is_far) {
442   if (type == T_OBJECT || type == T_ARRAY) {
443     assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
444     if (cmpFlag == lir_cond_equal) {
445       beq(op1, op2, label, is_far);
446     } else {
447       bne(op1, op2, label, is_far);
448     }
449   } else {
450     assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
451            "invalid c1 conditional branch index");
452     (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
453   }
454 }
455 
456 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
457                                             bool is_far, bool is_unordered) {
458   assert(cmpFlag >= 0 &&
459          cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
460          "invalid c1 float conditional branch index");
461   (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
462 }