< prev index next >

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.hpp

Print this page

 23  *
 24  */
 25 
 26 #ifndef CPU_RISCV_C2_MACROASSEMBLER_RISCV_HPP
 27 #define CPU_RISCV_C2_MACROASSEMBLER_RISCV_HPP
 28 
 29 // C2_MacroAssembler contains high-level macros for C2
 30 
 31  private:
 32   // Return true if the phase output is in the scratch emit size mode.
 33   virtual bool in_scratch_emit_size() override;
 34 
 35   void element_compare(Register r1, Register r2,
 36                        Register result, Register cnt,
 37                        Register tmp1, Register tmp2,
 38                        VectorRegister vr1, VectorRegister vr2,
 39                        VectorRegister vrs,
 40                        bool is_latin, Label& DONE);
 41  public:
 42   // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
 43   // See full description in macroAssembler_riscv.cpp.
 44   void fast_lock(Register object, Register box, Register tmp1, Register tmp2, Register tmp3);
 45   void fast_unlock(Register object, Register box, Register tmp1, Register tmp2);



 46 
 47   void string_compare(Register str1, Register str2,
 48                       Register cnt1, Register cnt2, Register result,
 49                       Register tmp1, Register tmp2, Register tmp3,
 50                       int ae);
 51 
 52   void string_indexof_char_short(Register str1, Register cnt1,
 53                                  Register ch, Register result,
 54                                  bool isL);
 55 
 56   void string_indexof_char(Register str1, Register cnt1,
 57                            Register ch, Register result,
 58                            Register tmp1, Register tmp2,
 59                            Register tmp3, Register tmp4,
 60                            bool isL);
 61 
 62   void string_indexof(Register str1, Register str2,
 63                       Register cnt1, Register cnt2,
 64                       Register tmp1, Register tmp2,
 65                       Register tmp3, Register tmp4,

 23  *
 24  */
 25 
 26 #ifndef CPU_RISCV_C2_MACROASSEMBLER_RISCV_HPP
 27 #define CPU_RISCV_C2_MACROASSEMBLER_RISCV_HPP
 28 
 29 // C2_MacroAssembler contains high-level macros for C2
 30 
 31  private:
 32   // Return true if the phase output is in the scratch emit size mode.
 33   virtual bool in_scratch_emit_size() override;
 34 
 35   void element_compare(Register r1, Register r2,
 36                        Register result, Register cnt,
 37                        Register tmp1, Register tmp2,
 38                        VectorRegister vr1, VectorRegister vr2,
 39                        VectorRegister vrs,
 40                        bool is_latin, Label& DONE);
 41  public:
 42   // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.

 43   void fast_lock(Register object, Register box, Register tmp1, Register tmp2, Register tmp3);
 44   void fast_unlock(Register object, Register box, Register tmp1, Register tmp2);
 45   // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
 46   void fast_lock_lightweight(Register object, Register tmp1, Register tmp2, Register tmp3);
 47   void fast_unlock_lightweight(Register object, Register tmp1, Register tmp2, Register tmp3);
 48 
 49   void string_compare(Register str1, Register str2,
 50                       Register cnt1, Register cnt2, Register result,
 51                       Register tmp1, Register tmp2, Register tmp3,
 52                       int ae);
 53 
 54   void string_indexof_char_short(Register str1, Register cnt1,
 55                                  Register ch, Register result,
 56                                  bool isL);
 57 
 58   void string_indexof_char(Register str1, Register cnt1,
 59                            Register ch, Register result,
 60                            Register tmp1, Register tmp2,
 61                            Register tmp3, Register tmp4,
 62                            bool isL);
 63 
 64   void string_indexof(Register str1, Register str2,
 65                       Register cnt1, Register cnt2,
 66                       Register tmp1, Register tmp2,
 67                       Register tmp3, Register tmp4,
< prev index next >