src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

*** 1450,12 ***
  
    void load_reserved(Register addr, enum operand_size size, Assembler::Aqrl acquire);
    void store_conditional(Register addr, Register new_val, enum operand_size size, Assembler::Aqrl release);
  
  public:
!   void lightweight_lock(Register obj, Register hdr, Register tmp1, Register tmp2, Label& slow);
!   void lightweight_unlock(Register obj, Register hdr, Register tmp1, Register tmp2, Label& slow);
  };
  
  #ifdef ASSERT
  inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
  #endif
--- 1450,12 ---
  
    void load_reserved(Register addr, enum operand_size size, Assembler::Aqrl acquire);
    void store_conditional(Register addr, Register new_val, enum operand_size size, Assembler::Aqrl release);
  
  public:
!   void lightweight_lock(Register obj, Register tmp1, Register tmp2, Register tmp3, Label& slow);
!   void lightweight_unlock(Register obj, Register tmp1, Register tmp2, Register tmp3, Label& slow);
  };
  
  #ifdef ASSERT
  inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
  #endif