1 /*
   2  * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "precompiled.hpp"
  28 #include "asm/macroAssembler.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "code/compiledIC.hpp"
  31 #include "code/debugInfoRec.hpp"
  32 #include "code/icBuffer.hpp"
  33 #include "code/vtableStubs.hpp"
  34 #include "compiler/oopMap.hpp"
  35 #include "gc/shared/barrierSetAssembler.hpp"
  36 #include "interpreter/interp_masm.hpp"
  37 #include "interpreter/interpreter.hpp"
  38 #include "logging/log.hpp"
  39 #include "memory/resourceArea.hpp"
  40 #include "nativeInst_riscv.hpp"
  41 #include "oops/compiledICHolder.hpp"
  42 #include "oops/klass.inline.hpp"
  43 #include "oops/method.inline.hpp"
  44 #include "prims/methodHandles.hpp"
  45 #include "runtime/continuation.hpp"
  46 #include "runtime/continuationEntry.inline.hpp"
  47 #include "runtime/globals.hpp"
  48 #include "runtime/jniHandles.hpp"
  49 #include "runtime/safepointMechanism.hpp"
  50 #include "runtime/sharedRuntime.hpp"
  51 #include "runtime/signature.hpp"
  52 #include "runtime/stubRoutines.hpp"
  53 #include "runtime/vframeArray.hpp"
  54 #include "utilities/align.hpp"
  55 #include "utilities/formatBuffer.hpp"
  56 #include "vmreg_riscv.inline.hpp"
  57 #ifdef COMPILER1
  58 #include "c1/c1_Runtime1.hpp"
  59 #endif
  60 #ifdef COMPILER2
  61 #include "adfiles/ad_riscv.hpp"
  62 #include "opto/runtime.hpp"
  63 #endif
  64 #if INCLUDE_JVMCI
  65 #include "jvmci/jvmciJavaClasses.hpp"
  66 #endif
  67 
  68 #define __ masm->
  69 
  70 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  71 
  72 class SimpleRuntimeFrame {
  73 public:
  74 
  75   // Most of the runtime stubs have this simple frame layout.
  76   // This class exists to make the layout shared in one place.
  77   // Offsets are for compiler stack slots, which are jints.
  78   enum layout {
  79     // The frame sender code expects that fp will be in the "natural" place and
  80     // will override any oopMap setting for it. We must therefore force the layout
  81     // so that it agrees with the frame sender code.
  82     // we don't expect any arg reg save area so riscv asserts that
  83     // frame::arg_reg_save_area_bytes == 0
  84     fp_off = 0, fp_off2,
  85     return_off, return_off2,
  86     framesize
  87   };
  88 };
  89 
  90 class RegisterSaver {
  91   const bool _save_vectors;
  92  public:
  93   RegisterSaver(bool save_vectors) : _save_vectors(UseRVV && save_vectors) {}
  94   ~RegisterSaver() {}
  95   OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
  96   void restore_live_registers(MacroAssembler* masm);
  97 
  98   // Offsets into the register save area
  99   // Used by deoptimization when it is managing result register
 100   // values on its own
 101   // gregs:28, float_register:32; except: x1(ra) & x2(sp) & gp(x3) & tp(x4)
 102   // |---v0---|<---SP
 103   // |---v1---|save vectors only in generate_handler_blob
 104   // |-- .. --|
 105   // |---v31--|-----
 106   // |---f0---|
 107   // |---f1---|
 108   // |   ..   |
 109   // |---f31--|
 110   // |---reserved slot for stack alignment---|
 111   // |---x5---|
 112   // |   x6   |
 113   // |---.. --|
 114   // |---x31--|
 115   // |---fp---|
 116   // |---ra---|
 117   int v0_offset_in_bytes(void) { return 0; }
 118   int f0_offset_in_bytes(void) {
 119     int f0_offset = 0;
 120 #ifdef COMPILER2
 121     if (_save_vectors) {
 122       f0_offset += Matcher::scalable_vector_reg_size(T_INT) * VectorRegister::number_of_registers *
 123                    BytesPerInt;
 124     }
 125 #endif
 126     return f0_offset;
 127   }
 128   int reserved_slot_offset_in_bytes(void) {
 129     return f0_offset_in_bytes() +
 130            FloatRegister::max_slots_per_register *
 131            FloatRegister::number_of_registers *
 132            BytesPerInt;
 133   }
 134 
 135   int reg_offset_in_bytes(Register r) {
 136     assert (r->encoding() > 4, "ra, sp, gp and tp not saved");
 137     return reserved_slot_offset_in_bytes() + (r->encoding() - 4 /* x1, x2, x3, x4 */) * wordSize;
 138   }
 139 
 140   int freg_offset_in_bytes(FloatRegister f) {
 141     return f0_offset_in_bytes() + f->encoding() * wordSize;
 142   }
 143 
 144   int ra_offset_in_bytes(void) {
 145     return reserved_slot_offset_in_bytes() +
 146            (Register::number_of_registers - 3) *
 147            Register::max_slots_per_register *
 148            BytesPerInt;
 149   }
 150 };
 151 
 152 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
 153   int vector_size_in_bytes = 0;
 154   int vector_size_in_slots = 0;
 155 #ifdef COMPILER2
 156   if (_save_vectors) {
 157     vector_size_in_bytes += Matcher::scalable_vector_reg_size(T_BYTE);
 158     vector_size_in_slots += Matcher::scalable_vector_reg_size(T_INT);
 159   }
 160 #endif
 161 
 162   int frame_size_in_bytes = align_up(additional_frame_words * wordSize + ra_offset_in_bytes() + wordSize, 16);
 163   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 164   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 165   // The caller will allocate additional_frame_words
 166   int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
 167   // CodeBlob frame size is in words.
 168   int frame_size_in_words = frame_size_in_bytes / wordSize;
 169   *total_frame_words = frame_size_in_words;
 170 
 171   // Save Integer, Float and Vector registers.
 172   __ enter();
 173   __ push_CPU_state(_save_vectors, vector_size_in_bytes);
 174 
 175   // Set an oopmap for the call site.  This oopmap will map all
 176   // oop-registers and debug-info registers as callee-saved.  This
 177   // will allow deoptimization at this safepoint to find all possible
 178   // debug-info recordings, as well as let GC find all oops.
 179 
 180   OopMapSet *oop_maps = new OopMapSet();
 181   OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
 182   assert_cond(oop_maps != nullptr && oop_map != nullptr);
 183 
 184   int sp_offset_in_slots = 0;
 185   int step_in_slots = 0;
 186   if (_save_vectors) {
 187     step_in_slots = vector_size_in_slots;
 188     for (int i = 0; i < VectorRegister::number_of_registers; i++, sp_offset_in_slots += step_in_slots) {
 189       VectorRegister r = as_VectorRegister(i);
 190       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset_in_slots), r->as_VMReg());
 191     }
 192   }
 193 
 194   step_in_slots = FloatRegister::max_slots_per_register;
 195   for (int i = 0; i < FloatRegister::number_of_registers; i++, sp_offset_in_slots += step_in_slots) {
 196     FloatRegister r = as_FloatRegister(i);
 197     oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset_in_slots), r->as_VMReg());
 198   }
 199 
 200   step_in_slots = Register::max_slots_per_register;
 201   // skip the slot reserved for alignment, see MacroAssembler::push_reg;
 202   // also skip x5 ~ x6 on the stack because they are caller-saved registers.
 203   sp_offset_in_slots += Register::max_slots_per_register * 3;
 204   // besides, we ignore x0 ~ x4 because push_CPU_state won't push them on the stack.
 205   for (int i = 7; i < Register::number_of_registers; i++, sp_offset_in_slots += step_in_slots) {
 206     Register r = as_Register(i);
 207     if (r != xthread) {
 208       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset_in_slots + additional_frame_slots), r->as_VMReg());
 209     }
 210   }
 211 
 212   return oop_map;
 213 }
 214 
 215 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
 216 #ifdef COMPILER2
 217   __ pop_CPU_state(_save_vectors, Matcher::scalable_vector_reg_size(T_BYTE));
 218 #else
 219 #if !INCLUDE_JVMCI
 220   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 221 #endif
 222   __ pop_CPU_state(_save_vectors);
 223 #endif
 224   __ leave();
 225 }
 226 
 227 // Is vector's size (in bytes) bigger than a size saved by default?
 228 // riscv does not ovlerlay the floating-point registers on vector registers like aarch64.
 229 bool SharedRuntime::is_wide_vector(int size) {
 230   return UseRVV;
 231 }
 232 
 233 // ---------------------------------------------------------------------------
 234 // Read the array of BasicTypes from a signature, and compute where the
 235 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 236 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 237 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 238 // as framesizes are fixed.
 239 // VMRegImpl::stack0 refers to the first slot 0(sp).
 240 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
 241 // Register up to Register::number_of_registers) are the 64-bit
 242 // integer registers.
 243 
 244 // Note: the INPUTS in sig_bt are in units of Java argument words,
 245 // which are 64-bit.  The OUTPUTS are in 32-bit units.
 246 
 247 // The Java calling convention is a "shifted" version of the C ABI.
 248 // By skipping the first C ABI register we can call non-static jni
 249 // methods with small numbers of arguments without having to shuffle
 250 // the arguments at all. Since we control the java ABI we ought to at
 251 // least get some advantage out of it.
 252 
 253 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 254                                            VMRegPair *regs,
 255                                            int total_args_passed) {
 256   // Create the mapping between argument positions and
 257   // registers.
 258   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 259     j_rarg0, j_rarg1, j_rarg2, j_rarg3,
 260     j_rarg4, j_rarg5, j_rarg6, j_rarg7
 261   };
 262   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 263     j_farg0, j_farg1, j_farg2, j_farg3,
 264     j_farg4, j_farg5, j_farg6, j_farg7
 265   };
 266 
 267   uint int_args = 0;
 268   uint fp_args = 0;
 269   uint stk_args = 0; // inc by 2 each time
 270 
 271   for (int i = 0; i < total_args_passed; i++) {
 272     switch (sig_bt[i]) {
 273       case T_BOOLEAN: // fall through
 274       case T_CHAR:    // fall through
 275       case T_BYTE:    // fall through
 276       case T_SHORT:   // fall through
 277       case T_INT:
 278         if (int_args < Argument::n_int_register_parameters_j) {
 279           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 280         } else {
 281           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 282           stk_args += 2;
 283         }
 284         break;
 285       case T_VOID:
 286         // halves of T_LONG or T_DOUBLE
 287         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 288         regs[i].set_bad();
 289         break;
 290       case T_LONG:      // fall through
 291         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 292       case T_OBJECT:    // fall through
 293       case T_ARRAY:     // fall through
 294       case T_ADDRESS:
 295         if (int_args < Argument::n_int_register_parameters_j) {
 296           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 297         } else {
 298           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 299           stk_args += 2;
 300         }
 301         break;
 302       case T_FLOAT:
 303         if (fp_args < Argument::n_float_register_parameters_j) {
 304           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 305         } else {
 306           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 307           stk_args += 2;
 308         }
 309         break;
 310       case T_DOUBLE:
 311         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 312         if (fp_args < Argument::n_float_register_parameters_j) {
 313           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 314         } else {
 315           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 316           stk_args += 2;
 317         }
 318         break;
 319       default:
 320         ShouldNotReachHere();
 321     }
 322   }
 323 
 324   return align_up(stk_args, 2);
 325 }
 326 
 327 // Patch the callers callsite with entry to compiled code if it exists.
 328 static void patch_callers_callsite(MacroAssembler *masm) {
 329   Label L;
 330   __ ld(t0, Address(xmethod, in_bytes(Method::code_offset())));
 331   __ beqz(t0, L);
 332 
 333   __ enter();
 334   __ push_CPU_state();
 335 
 336   // VM needs caller's callsite
 337   // VM needs target method
 338   // This needs to be a long call since we will relocate this adapter to
 339   // the codeBuffer and it may not reach
 340 
 341 #ifndef PRODUCT
 342   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 343 #endif
 344 
 345   __ mv(c_rarg0, xmethod);
 346   __ mv(c_rarg1, ra);
 347   RuntimeAddress target(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite));
 348   __ relocate(target.rspec(), [&] {
 349     int32_t offset;
 350     __ la_patchable(t0, target, offset);
 351     __ jalr(x1, t0, offset);
 352   });
 353 
 354   __ pop_CPU_state();
 355   // restore sp
 356   __ leave();
 357   __ bind(L);
 358 }
 359 
 360 static void gen_c2i_adapter(MacroAssembler *masm,
 361                             int total_args_passed,
 362                             int comp_args_on_stack,
 363                             const BasicType *sig_bt,
 364                             const VMRegPair *regs,
 365                             Label& skip_fixup) {
 366   // Before we get into the guts of the C2I adapter, see if we should be here
 367   // at all.  We've come from compiled code and are attempting to jump to the
 368   // interpreter, which means the caller made a static call to get here
 369   // (vcalls always get a compiled target if there is one).  Check for a
 370   // compiled target.  If there is one, we need to patch the caller's call.
 371   patch_callers_callsite(masm);
 372 
 373   __ bind(skip_fixup);
 374 
 375   int words_pushed = 0;
 376 
 377   // Since all args are passed on the stack, total_args_passed *
 378   // Interpreter::stackElementSize is the space we need.
 379 
 380   int extraspace = total_args_passed * Interpreter::stackElementSize;
 381 
 382   __ mv(x19_sender_sp, sp);
 383 
 384   // stack is aligned, keep it that way
 385   extraspace = align_up(extraspace, 2 * wordSize);
 386 
 387   if (extraspace) {
 388     __ sub(sp, sp, extraspace);
 389   }
 390 
 391   // Now write the args into the outgoing interpreter space
 392   for (int i = 0; i < total_args_passed; i++) {
 393     if (sig_bt[i] == T_VOID) {
 394       assert(i > 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "missing half");
 395       continue;
 396     }
 397 
 398     // offset to start parameters
 399     int st_off   = (total_args_passed - i - 1) * Interpreter::stackElementSize;
 400     int next_off = st_off - Interpreter::stackElementSize;
 401 
 402     // Say 4 args:
 403     // i   st_off
 404     // 0   32 T_LONG
 405     // 1   24 T_VOID
 406     // 2   16 T_OBJECT
 407     // 3    8 T_BOOL
 408     // -    0 return address
 409     //
 410     // However to make thing extra confusing. Because we can fit a Java long/double in
 411     // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 412     // leaves one slot empty and only stores to a single slot. In this case the
 413     // slot that is occupied is the T_VOID slot. See I said it was confusing.
 414 
 415     VMReg r_1 = regs[i].first();
 416     VMReg r_2 = regs[i].second();
 417     if (!r_1->is_valid()) {
 418       assert(!r_2->is_valid(), "");
 419       continue;
 420     }
 421     if (r_1->is_stack()) {
 422       // memory to memory use t0
 423       int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
 424                     + extraspace
 425                     + words_pushed * wordSize);
 426       if (!r_2->is_valid()) {
 427         __ lwu(t0, Address(sp, ld_off));
 428         __ sd(t0, Address(sp, st_off), /*temp register*/esp);
 429       } else {
 430         __ ld(t0, Address(sp, ld_off), /*temp register*/esp);
 431 
 432         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 433         // T_DOUBLE and T_LONG use two slots in the interpreter
 434         if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 435           // ld_off == LSW, ld_off+wordSize == MSW
 436           // st_off == MSW, next_off == LSW
 437           __ sd(t0, Address(sp, next_off), /*temp register*/esp);
 438 #ifdef ASSERT
 439           // Overwrite the unused slot with known junk
 440           __ mv(t0, 0xdeadffffdeadaaaaul);
 441           __ sd(t0, Address(sp, st_off), /*temp register*/esp);
 442 #endif /* ASSERT */
 443         } else {
 444           __ sd(t0, Address(sp, st_off), /*temp register*/esp);
 445         }
 446       }
 447     } else if (r_1->is_Register()) {
 448       Register r = r_1->as_Register();
 449       if (!r_2->is_valid()) {
 450         // must be only an int (or less ) so move only 32bits to slot
 451         __ sd(r, Address(sp, st_off));
 452       } else {
 453         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 454         // T_DOUBLE and T_LONG use two slots in the interpreter
 455         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 456           // long/double in gpr
 457 #ifdef ASSERT
 458           // Overwrite the unused slot with known junk
 459           __ mv(t0, 0xdeadffffdeadaaabul);
 460           __ sd(t0, Address(sp, st_off), /*temp register*/esp);
 461 #endif /* ASSERT */
 462           __ sd(r, Address(sp, next_off));
 463         } else {
 464           __ sd(r, Address(sp, st_off));
 465         }
 466       }
 467     } else {
 468       assert(r_1->is_FloatRegister(), "");
 469       if (!r_2->is_valid()) {
 470         // only a float use just part of the slot
 471         __ fsw(r_1->as_FloatRegister(), Address(sp, st_off));
 472       } else {
 473 #ifdef ASSERT
 474         // Overwrite the unused slot with known junk
 475         __ mv(t0, 0xdeadffffdeadaaacul);
 476         __ sd(t0, Address(sp, st_off), /*temp register*/esp);
 477 #endif /* ASSERT */
 478         __ fsd(r_1->as_FloatRegister(), Address(sp, next_off));
 479       }
 480     }
 481   }
 482 
 483   __ mv(esp, sp); // Interp expects args on caller's expression stack
 484 
 485   __ ld(t0, Address(xmethod, in_bytes(Method::interpreter_entry_offset())));
 486   __ jr(t0);
 487 }
 488 
 489 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 490                                     int total_args_passed,
 491                                     int comp_args_on_stack,
 492                                     const BasicType *sig_bt,
 493                                     const VMRegPair *regs) {
 494   // Note: x19_sender_sp contains the senderSP on entry. We must
 495   // preserve it since we may do a i2c -> c2i transition if we lose a
 496   // race where compiled code goes non-entrant while we get args
 497   // ready.
 498 
 499   // Cut-out for having no stack args.
 500   int comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord;
 501   if (comp_args_on_stack != 0) {
 502     __ sub(t0, sp, comp_words_on_stack * wordSize);
 503     __ andi(sp, t0, -16);
 504   }
 505 
 506   // Will jump to the compiled code just as if compiled code was doing it.
 507   // Pre-load the register-jump target early, to schedule it better.
 508   __ ld(t1, Address(xmethod, in_bytes(Method::from_compiled_offset())));
 509 
 510 #if INCLUDE_JVMCI
 511   if (EnableJVMCI) {
 512     // check if this call should be routed towards a specific entry point
 513     __ ld(t0, Address(xthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 514     Label no_alternative_target;
 515     __ beqz(t0, no_alternative_target);
 516     __ mv(t1, t0);
 517     __ sd(zr, Address(xthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 518     __ bind(no_alternative_target);
 519   }
 520 #endif // INCLUDE_JVMCI
 521 
 522   // Now generate the shuffle code.
 523   for (int i = 0; i < total_args_passed; i++) {
 524     if (sig_bt[i] == T_VOID) {
 525       assert(i > 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "missing half");
 526       continue;
 527     }
 528 
 529     // Pick up 0, 1 or 2 words from SP+offset.
 530 
 531     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 532            "scrambled load targets?");
 533     // Load in argument order going down.
 534     int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
 535     // Point to interpreter value (vs. tag)
 536     int next_off = ld_off - Interpreter::stackElementSize;
 537 
 538     VMReg r_1 = regs[i].first();
 539     VMReg r_2 = regs[i].second();
 540     if (!r_1->is_valid()) {
 541       assert(!r_2->is_valid(), "");
 542       continue;
 543     }
 544     if (r_1->is_stack()) {
 545       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 546       int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size;
 547       if (!r_2->is_valid()) {
 548         __ lw(t0, Address(esp, ld_off));
 549         __ sd(t0, Address(sp, st_off), /*temp register*/t2);
 550       } else {
 551         //
 552         // We are using two optoregs. This can be either T_OBJECT,
 553         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 554         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 555         // So we must adjust where to pick up the data to match the
 556         // interpreter.
 557         //
 558         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 559         // are accessed as negative so LSW is at LOW address
 560 
 561         // ld_off is MSW so get LSW
 562         const int offset = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ?
 563                            next_off : ld_off;
 564         __ ld(t0, Address(esp, offset));
 565         // st_off is LSW (i.e. reg.first())
 566         __ sd(t0, Address(sp, st_off), /*temp register*/t2);
 567       }
 568     } else if (r_1->is_Register()) {  // Register argument
 569       Register r = r_1->as_Register();
 570       if (r_2->is_valid()) {
 571         //
 572         // We are using two VMRegs. This can be either T_OBJECT,
 573         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 574         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 575         // So we must adjust where to pick up the data to match the
 576         // interpreter.
 577 
 578         const int offset = (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) ?
 579                            next_off : ld_off;
 580 
 581         // this can be a misaligned move
 582         __ ld(r, Address(esp, offset));
 583       } else {
 584         // sign extend and use a full word?
 585         __ lw(r, Address(esp, ld_off));
 586       }
 587     } else {
 588       if (!r_2->is_valid()) {
 589         __ flw(r_1->as_FloatRegister(), Address(esp, ld_off));
 590       } else {
 591         __ fld(r_1->as_FloatRegister(), Address(esp, next_off));
 592       }
 593     }
 594   }
 595 
 596   __ push_cont_fastpath(xthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about
 597 
 598   // 6243940 We might end up in handle_wrong_method if
 599   // the callee is deoptimized as we race thru here. If that
 600   // happens we don't want to take a safepoint because the
 601   // caller frame will look interpreted and arguments are now
 602   // "compiled" so it is much better to make this transition
 603   // invisible to the stack walking code. Unfortunately if
 604   // we try and find the callee by normal means a safepoint
 605   // is possible. So we stash the desired callee in the thread
 606   // and the vm will find there should this case occur.
 607 
 608   __ sd(xmethod, Address(xthread, JavaThread::callee_target_offset()));
 609 
 610   __ jr(t1);
 611 }
 612 
 613 // ---------------------------------------------------------------
 614 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 615                                                             int total_args_passed,
 616                                                             int comp_args_on_stack,
 617                                                             const BasicType *sig_bt,
 618                                                             const VMRegPair *regs,
 619                                                             AdapterFingerPrint* fingerprint) {
 620   address i2c_entry = __ pc();
 621   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 622 
 623   address c2i_unverified_entry = __ pc();
 624   Label skip_fixup;
 625 
 626   Label ok;
 627 
 628   const Register holder = t1;
 629   const Register receiver = j_rarg0;
 630   const Register tmp = t2;  // A call-clobbered register not used for arg passing
 631 
 632   // -------------------------------------------------------------------------
 633   // Generate a C2I adapter.  On entry we know xmethod holds the Method* during calls
 634   // to the interpreter.  The args start out packed in the compiled layout.  They
 635   // need to be unpacked into the interpreter layout.  This will almost always
 636   // require some stack space.  We grow the current (compiled) stack, then repack
 637   // the args.  We  finally end in a jump to the generic interpreter entry point.
 638   // On exit from the interpreter, the interpreter will restore our SP (lest the
 639   // compiled code, which relies solely on SP and not FP, get sick).
 640 
 641   {
 642     __ block_comment("c2i_unverified_entry {");
 643     __ load_klass(t0, receiver, tmp);
 644     __ ld(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
 645     __ ld(xmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
 646     __ beq(t0, tmp, ok);
 647     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 648 
 649     __ bind(ok);
 650     // Method might have been compiled since the call site was patched to
 651     // interpreted; if that is the case treat it as a miss so we can get
 652     // the call site corrected.
 653     __ ld(t0, Address(xmethod, in_bytes(Method::code_offset())));
 654     __ beqz(t0, skip_fixup);
 655     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 656     __ block_comment("} c2i_unverified_entry");
 657   }
 658 
 659   address c2i_entry = __ pc();
 660 
 661   // Class initialization barrier for static methods
 662   address c2i_no_clinit_check_entry = nullptr;
 663   if (VM_Version::supports_fast_class_init_checks()) {
 664     Label L_skip_barrier;
 665 
 666     { // Bypass the barrier for non-static methods
 667       __ lwu(t0, Address(xmethod, Method::access_flags_offset()));
 668       __ test_bit(t1, t0, exact_log2(JVM_ACC_STATIC));
 669       __ beqz(t1, L_skip_barrier); // non-static
 670     }
 671 
 672     __ load_method_holder(t1, xmethod);
 673     __ clinit_barrier(t1, t0, &L_skip_barrier);
 674     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 675 
 676     __ bind(L_skip_barrier);
 677     c2i_no_clinit_check_entry = __ pc();
 678   }
 679 
 680   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 681   bs->c2i_entry_barrier(masm);
 682 
 683   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 684 
 685   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
 686 }
 687 
 688 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
 689                                              uint num_bits,
 690                                              uint total_args_passed) {
 691   Unimplemented();
 692   return 0;
 693 }
 694 
 695 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 696                                          VMRegPair *regs,
 697                                          VMRegPair *regs2,
 698                                          int total_args_passed) {
 699   assert(regs2 == nullptr, "not needed on riscv");
 700 
 701   // We return the amount of VMRegImpl stack slots we need to reserve for all
 702   // the arguments NOT counting out_preserve_stack_slots.
 703 
 704   static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 705     c_rarg0, c_rarg1, c_rarg2, c_rarg3,
 706     c_rarg4, c_rarg5,  c_rarg6,  c_rarg7
 707   };
 708   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 709     c_farg0, c_farg1, c_farg2, c_farg3,
 710     c_farg4, c_farg5, c_farg6, c_farg7
 711   };
 712 
 713   uint int_args = 0;
 714   uint fp_args = 0;
 715   uint stk_args = 0; // inc by 2 each time
 716 
 717   for (int i = 0; i < total_args_passed; i++) {
 718     switch (sig_bt[i]) {
 719       case T_BOOLEAN:  // fall through
 720       case T_CHAR:     // fall through
 721       case T_BYTE:     // fall through
 722       case T_SHORT:    // fall through
 723       case T_INT:
 724         if (int_args < Argument::n_int_register_parameters_c) {
 725           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 726         } else {
 727           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 728           stk_args += 2;
 729         }
 730         break;
 731       case T_LONG:      // fall through
 732         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 733       case T_OBJECT:    // fall through
 734       case T_ARRAY:     // fall through
 735       case T_ADDRESS:   // fall through
 736       case T_METADATA:
 737         if (int_args < Argument::n_int_register_parameters_c) {
 738           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 739         } else {
 740           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 741           stk_args += 2;
 742         }
 743         break;
 744       case T_FLOAT:
 745         if (fp_args < Argument::n_float_register_parameters_c) {
 746           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 747         } else if (int_args < Argument::n_int_register_parameters_c) {
 748           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 749         } else {
 750           regs[i].set1(VMRegImpl::stack2reg(stk_args));
 751           stk_args += 2;
 752         }
 753         break;
 754       case T_DOUBLE:
 755         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 756         if (fp_args < Argument::n_float_register_parameters_c) {
 757           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 758         } else if (int_args < Argument::n_int_register_parameters_c) {
 759           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 760         } else {
 761           regs[i].set2(VMRegImpl::stack2reg(stk_args));
 762           stk_args += 2;
 763         }
 764         break;
 765       case T_VOID: // Halves of longs and doubles
 766         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 767         regs[i].set_bad();
 768         break;
 769       default:
 770         ShouldNotReachHere();
 771     }
 772   }
 773 
 774   return stk_args;
 775 }
 776 
 777 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
 778   // We always ignore the frame_slots arg and just use the space just below frame pointer
 779   // which by this time is free to use
 780   switch (ret_type) {
 781     case T_FLOAT:
 782       __ fsw(f10, Address(fp, -3 * wordSize));
 783       break;
 784     case T_DOUBLE:
 785       __ fsd(f10, Address(fp, -3 * wordSize));
 786       break;
 787     case T_VOID:  break;
 788     default: {
 789       __ sd(x10, Address(fp, -3 * wordSize));
 790     }
 791   }
 792 }
 793 
 794 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
 795   // We always ignore the frame_slots arg and just use the space just below frame pointer
 796   // which by this time is free to use
 797   switch (ret_type) {
 798     case T_FLOAT:
 799       __ flw(f10, Address(fp, -3 * wordSize));
 800       break;
 801     case T_DOUBLE:
 802       __ fld(f10, Address(fp, -3 * wordSize));
 803       break;
 804     case T_VOID:  break;
 805     default: {
 806       __ ld(x10, Address(fp, -3 * wordSize));
 807     }
 808   }
 809 }
 810 
 811 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
 812   RegSet x;
 813   for ( int i = first_arg ; i < arg_count ; i++ ) {
 814     if (args[i].first()->is_Register()) {
 815       x = x + args[i].first()->as_Register();
 816     } else if (args[i].first()->is_FloatRegister()) {
 817       __ addi(sp, sp, -2 * wordSize);
 818       __ fsd(args[i].first()->as_FloatRegister(), Address(sp, 0));
 819     }
 820   }
 821   __ push_reg(x, sp);
 822 }
 823 
 824 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
 825   RegSet x;
 826   for ( int i = first_arg ; i < arg_count ; i++ ) {
 827     if (args[i].first()->is_Register()) {
 828       x = x + args[i].first()->as_Register();
 829     } else {
 830       ;
 831     }
 832   }
 833   __ pop_reg(x, sp);
 834   for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
 835     if (args[i].first()->is_Register()) {
 836       ;
 837     } else if (args[i].first()->is_FloatRegister()) {
 838       __ fld(args[i].first()->as_FloatRegister(), Address(sp, 0));
 839       __ add(sp, sp, 2 * wordSize);
 840     }
 841   }
 842 }
 843 
 844 static void verify_oop_args(MacroAssembler* masm,
 845                             const methodHandle& method,
 846                             const BasicType* sig_bt,
 847                             const VMRegPair* regs) {
 848   const Register temp_reg = x9;  // not part of any compiled calling seq
 849   if (VerifyOops) {
 850     for (int i = 0; i < method->size_of_parameters(); i++) {
 851       if (sig_bt[i] == T_OBJECT ||
 852           sig_bt[i] == T_ARRAY) {
 853         VMReg r = regs[i].first();
 854         assert(r->is_valid(), "bad oop arg");
 855         if (r->is_stack()) {
 856           __ ld(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
 857           __ verify_oop(temp_reg);
 858         } else {
 859           __ verify_oop(r->as_Register());
 860         }
 861       }
 862     }
 863   }
 864 }
 865 
 866 // on exit, sp points to the ContinuationEntry
 867 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
 868   assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
 869   assert(in_bytes(ContinuationEntry::cont_offset())  % VMRegImpl::stack_slot_size == 0, "");
 870   assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
 871 
 872   stack_slots += (int)ContinuationEntry::size() / wordSize;
 873   __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
 874 
 875   OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize) / VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
 876 
 877   __ ld(t0, Address(xthread, JavaThread::cont_entry_offset()));
 878   __ sd(t0, Address(sp, ContinuationEntry::parent_offset()));
 879   __ sd(sp, Address(xthread, JavaThread::cont_entry_offset()));
 880 
 881   return map;
 882 }
 883 
 884 // on entry c_rarg1 points to the continuation
 885 //          sp points to ContinuationEntry
 886 //          c_rarg3 -- isVirtualThread
 887 static void fill_continuation_entry(MacroAssembler* masm) {
 888 #ifdef ASSERT
 889   __ mv(t0, ContinuationEntry::cookie_value());
 890   __ sw(t0, Address(sp, ContinuationEntry::cookie_offset()));
 891 #endif
 892 
 893   __ sd(c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
 894   __ sw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
 895   __ sd(zr,      Address(sp, ContinuationEntry::chunk_offset()));
 896   __ sw(zr,      Address(sp, ContinuationEntry::argsize_offset()));
 897   __ sw(zr,      Address(sp, ContinuationEntry::pin_count_offset()));
 898 
 899   __ ld(t0, Address(xthread, JavaThread::cont_fastpath_offset()));
 900   __ sd(t0, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
 901   __ ld(t0, Address(xthread, JavaThread::held_monitor_count_offset()));
 902   __ sd(t0, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
 903 
 904   __ sd(zr, Address(xthread, JavaThread::cont_fastpath_offset()));
 905   __ sd(zr, Address(xthread, JavaThread::held_monitor_count_offset()));
 906 }
 907 
 908 // on entry, sp points to the ContinuationEntry
 909 // on exit, fp points to the spilled fp + 2 * wordSize in the entry frame
 910 static void continuation_enter_cleanup(MacroAssembler* masm) {
 911 #ifndef PRODUCT
 912   Label OK;
 913   __ ld(t0, Address(xthread, JavaThread::cont_entry_offset()));
 914   __ beq(sp, t0, OK);
 915   __ stop("incorrect sp");
 916   __ bind(OK);
 917 #endif
 918 
 919   __ ld(t0, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
 920   __ sd(t0, Address(xthread, JavaThread::cont_fastpath_offset()));
 921   __ ld(t0, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
 922   __ sd(t0, Address(xthread, JavaThread::held_monitor_count_offset()));
 923 
 924   __ ld(t0, Address(sp, ContinuationEntry::parent_offset()));
 925   __ sd(t0, Address(xthread, JavaThread::cont_entry_offset()));
 926   __ add(fp, sp, (int)ContinuationEntry::size() + 2 * wordSize /* 2 extra words to match up with leave() */);
 927 }
 928 
 929 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
 930 // On entry: c_rarg1 -- the continuation object
 931 //           c_rarg2 -- isContinue
 932 //           c_rarg3 -- isVirtualThread
 933 static void gen_continuation_enter(MacroAssembler* masm,
 934                                    const methodHandle& method,
 935                                    const BasicType* sig_bt,
 936                                    const VMRegPair* regs,
 937                                    int& exception_offset,
 938                                    OopMapSet*oop_maps,
 939                                    int& frame_complete,
 940                                    int& stack_slots,
 941                                    int& interpreted_entry_offset,
 942                                    int& compiled_entry_offset) {
 943   // verify_oop_args(masm, method, sig_bt, regs);
 944   Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
 945 
 946   address start = __ pc();
 947 
 948   Label call_thaw, exit;
 949 
 950   // i2i entry used at interp_only_mode only
 951   interpreted_entry_offset = __ pc() - start;
 952   {
 953 #ifdef ASSERT
 954     Label is_interp_only;
 955     __ lw(t0, Address(xthread, JavaThread::interp_only_mode_offset()));
 956     __ bnez(t0, is_interp_only);
 957     __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
 958     __ bind(is_interp_only);
 959 #endif
 960 
 961     // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
 962     __ ld(c_rarg1, Address(esp, Interpreter::stackElementSize * 2));
 963     __ ld(c_rarg2, Address(esp, Interpreter::stackElementSize * 1));
 964     __ ld(c_rarg3, Address(esp, Interpreter::stackElementSize * 0));
 965     __ push_cont_fastpath(xthread);
 966 
 967     __ enter();
 968     stack_slots = 2; // will be adjusted in setup
 969     OopMap* map = continuation_enter_setup(masm, stack_slots);
 970     // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
 971     // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
 972 
 973     fill_continuation_entry(masm);
 974 
 975     __ bnez(c_rarg2, call_thaw);
 976 
 977     // Make sure the call is patchable
 978     __ align(NativeInstruction::instruction_size);
 979 
 980     const address tr_call = __ trampoline_call(resolve);
 981     if (tr_call == nullptr) {
 982       fatal("CodeCache is full at gen_continuation_enter");
 983     }
 984 
 985     oop_maps->add_gc_map(__ pc() - start, map);
 986     __ post_call_nop();
 987 
 988     __ j(exit);
 989 
 990     CodeBuffer* cbuf = masm->code_section()->outer();
 991     address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
 992     if (stub == nullptr) {
 993       fatal("CodeCache is full at gen_continuation_enter");
 994     }
 995   }
 996 
 997   // compiled entry
 998   __ align(CodeEntryAlignment);
 999   compiled_entry_offset = __ pc() - start;
1000 
1001   __ enter();
1002   stack_slots = 2; // will be adjusted in setup
1003   OopMap* map = continuation_enter_setup(masm, stack_slots);
1004   frame_complete = __ pc() - start;
1005 
1006   fill_continuation_entry(masm);
1007 
1008   __ bnez(c_rarg2, call_thaw);
1009 
1010   // Make sure the call is patchable
1011   __ align(NativeInstruction::instruction_size);
1012 
1013   const address tr_call = __ trampoline_call(resolve);
1014   if (tr_call == nullptr) {
1015     fatal("CodeCache is full at gen_continuation_enter");
1016   }
1017 
1018   oop_maps->add_gc_map(__ pc() - start, map);
1019   __ post_call_nop();
1020 
1021   __ j(exit);
1022 
1023   __ bind(call_thaw);
1024 
1025   __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1026   oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1027   ContinuationEntry::_return_pc_offset = __ pc() - start;
1028   __ post_call_nop();
1029 
1030   __ bind(exit);
1031   continuation_enter_cleanup(masm);
1032   __ leave();
1033   __ ret();
1034 
1035   // exception handling
1036   exception_offset = __ pc() - start;
1037   {
1038     __ mv(x9, x10); // save return value contaning the exception oop in callee-saved x9
1039 
1040     continuation_enter_cleanup(masm);
1041 
1042     __ ld(c_rarg1, Address(fp, -1 * wordSize)); // return address
1043     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), xthread, c_rarg1);
1044 
1045     // see OptoRuntime::generate_exception_blob: x10 -- exception oop, x13 -- exception pc
1046 
1047     __ mv(x11, x10); // the exception handler
1048     __ mv(x10, x9); // restore return value contaning the exception oop
1049     __ verify_oop(x10);
1050 
1051     __ leave();
1052     __ mv(x13, ra);
1053     __ jr(x11); // the exception handler
1054   }
1055 
1056   CodeBuffer* cbuf = masm->code_section()->outer();
1057   address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1058   if (stub == nullptr) {
1059     fatal("CodeCache is full at gen_continuation_enter");
1060   }
1061 }
1062 
1063 static void gen_continuation_yield(MacroAssembler* masm,
1064                                    const methodHandle& method,
1065                                    const BasicType* sig_bt,
1066                                    const VMRegPair* regs,
1067                                    OopMapSet* oop_maps,
1068                                    int& frame_complete,
1069                                    int& stack_slots,
1070                                    int& compiled_entry_offset) {
1071   enum layout {
1072     fp_off,
1073     fp_off2,
1074     return_off,
1075     return_off2,
1076     framesize // inclusive of return address
1077   };
1078   // assert(is_even(framesize/2), "sp not 16-byte aligned");
1079 
1080   stack_slots = framesize / VMRegImpl::slots_per_word;
1081   assert(stack_slots == 2, "recheck layout");
1082 
1083   address start = __ pc();
1084 
1085   compiled_entry_offset = __ pc() - start;
1086   __ enter();
1087 
1088   __ mv(c_rarg1, sp);
1089 
1090   frame_complete = __ pc() - start;
1091   address the_pc = __ pc();
1092 
1093   __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1094 
1095   __ mv(c_rarg0, xthread);
1096   __ set_last_Java_frame(sp, fp, the_pc, t0);
1097   __ call_VM_leaf(Continuation::freeze_entry(), 2);
1098   __ reset_last_Java_frame(true);
1099 
1100   Label pinned;
1101 
1102   __ bnez(x10, pinned);
1103 
1104   // We've succeeded, set sp to the ContinuationEntry
1105   __ ld(sp, Address(xthread, JavaThread::cont_entry_offset()));
1106   continuation_enter_cleanup(masm);
1107 
1108   __ bind(pinned); // pinned -- return to caller
1109 
1110   // handle pending exception thrown by freeze
1111   __ ld(t0, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1112   Label ok;
1113   __ beqz(t0, ok);
1114   __ leave();
1115   __ la(t0, RuntimeAddress(StubRoutines::forward_exception_entry()));
1116   __ jr(t0);
1117   __ bind(ok);
1118 
1119   __ leave();
1120   __ ret();
1121 
1122   OopMap* map = new OopMap(framesize, 1);
1123   oop_maps->add_gc_map(the_pc - start, map);
1124 }
1125 
1126 static void gen_special_dispatch(MacroAssembler* masm,
1127                                  const methodHandle& method,
1128                                  const BasicType* sig_bt,
1129                                  const VMRegPair* regs) {
1130   verify_oop_args(masm, method, sig_bt, regs);
1131   vmIntrinsics::ID iid = method->intrinsic_id();
1132 
1133   // Now write the args into the outgoing interpreter space
1134   bool     has_receiver   = false;
1135   Register receiver_reg   = noreg;
1136   int      member_arg_pos = -1;
1137   Register member_reg     = noreg;
1138   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1139   if (ref_kind != 0) {
1140     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1141     member_reg = x9;  // known to be free at this point
1142     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1143   } else if (iid == vmIntrinsics::_invokeBasic) {
1144     has_receiver = true;
1145   } else if (iid == vmIntrinsics::_linkToNative) {
1146     member_arg_pos = method->size_of_parameters() - 1;  // trailing NativeEntryPoint argument
1147     member_reg = x9;  // known to be free at this point
1148   } else {
1149     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1150   }
1151 
1152   if (member_reg != noreg) {
1153     // Load the member_arg into register, if necessary.
1154     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1155     VMReg r = regs[member_arg_pos].first();
1156     if (r->is_stack()) {
1157       __ ld(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1158     } else {
1159       // no data motion is needed
1160       member_reg = r->as_Register();
1161     }
1162   }
1163 
1164   if (has_receiver) {
1165     // Make sure the receiver is loaded into a register.
1166     assert(method->size_of_parameters() > 0, "oob");
1167     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1168     VMReg r = regs[0].first();
1169     assert(r->is_valid(), "bad receiver arg");
1170     if (r->is_stack()) {
1171       // Porting note:  This assumes that compiled calling conventions always
1172       // pass the receiver oop in a register.  If this is not true on some
1173       // platform, pick a temp and load the receiver from stack.
1174       fatal("receiver always in a register");
1175       receiver_reg = x12;  // known to be free at this point
1176       __ ld(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1177     } else {
1178       // no data motion is needed
1179       receiver_reg = r->as_Register();
1180     }
1181   }
1182 
1183   // Figure out which address we are really jumping to:
1184   MethodHandles::generate_method_handle_dispatch(masm, iid,
1185                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1186 }
1187 
1188 // ---------------------------------------------------------------------------
1189 // Generate a native wrapper for a given method.  The method takes arguments
1190 // in the Java compiled code convention, marshals them to the native
1191 // convention (handlizes oops, etc), transitions to native, makes the call,
1192 // returns to java state (possibly blocking), unhandlizes any result and
1193 // returns.
1194 //
1195 // Critical native functions are a shorthand for the use of
1196 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1197 // functions.  The wrapper is expected to unpack the arguments before
1198 // passing them to the callee and perform checks before and after the
1199 // native call to ensure that they GCLocker
1200 // lock_critical/unlock_critical semantics are followed.  Some other
1201 // parts of JNI setup are skipped like the tear down of the JNI handle
1202 // block and the check for pending exceptions it's impossible for them
1203 // to be thrown.
1204 //
1205 // They are roughly structured like this:
1206 //    if (GCLocker::needs_gc()) SharedRuntime::block_for_jni_critical()
1207 //    tranistion to thread_in_native
1208 //    unpack array arguments and call native entry point
1209 //    check for safepoint in progress
1210 //    check if any thread suspend flags are set
1211 //      call into JVM and possible unlock the JNI critical
1212 //      if a GC was suppressed while in the critical native.
1213 //    transition back to thread_in_Java
1214 //    return to caller
1215 //
1216 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1217                                                 const methodHandle& method,
1218                                                 int compile_id,
1219                                                 BasicType* in_sig_bt,
1220                                                 VMRegPair* in_regs,
1221                                                 BasicType ret_type) {
1222   if (method->is_continuation_native_intrinsic()) {
1223     int exception_offset = -1;
1224     OopMapSet* oop_maps = new OopMapSet();
1225     int frame_complete = -1;
1226     int stack_slots = -1;
1227     int interpreted_entry_offset = -1;
1228     int vep_offset = -1;
1229     if (method->is_continuation_enter_intrinsic()) {
1230       gen_continuation_enter(masm,
1231                              method,
1232                              in_sig_bt,
1233                              in_regs,
1234                              exception_offset,
1235                              oop_maps,
1236                              frame_complete,
1237                              stack_slots,
1238                              interpreted_entry_offset,
1239                              vep_offset);
1240     } else if (method->is_continuation_yield_intrinsic()) {
1241       gen_continuation_yield(masm,
1242                              method,
1243                              in_sig_bt,
1244                              in_regs,
1245                              oop_maps,
1246                              frame_complete,
1247                              stack_slots,
1248                              vep_offset);
1249     } else {
1250       guarantee(false, "Unknown Continuation native intrinsic");
1251     }
1252 
1253 #ifdef ASSERT
1254     if (method->is_continuation_enter_intrinsic()) {
1255       assert(interpreted_entry_offset != -1, "Must be set");
1256       assert(exception_offset != -1,         "Must be set");
1257     } else {
1258       assert(interpreted_entry_offset == -1, "Must be unset");
1259       assert(exception_offset == -1,         "Must be unset");
1260     }
1261     assert(frame_complete != -1,    "Must be set");
1262     assert(stack_slots != -1,       "Must be set");
1263     assert(vep_offset != -1,        "Must be set");
1264 #endif
1265 
1266     __ flush();
1267     nmethod* nm = nmethod::new_native_nmethod(method,
1268                                               compile_id,
1269                                               masm->code(),
1270                                               vep_offset,
1271                                               frame_complete,
1272                                               stack_slots,
1273                                               in_ByteSize(-1),
1274                                               in_ByteSize(-1),
1275                                               oop_maps,
1276                                               exception_offset);
1277     if (method->is_continuation_enter_intrinsic()) {
1278       ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1279     } else if (method->is_continuation_yield_intrinsic()) {
1280       _cont_doYield_stub = nm;
1281     } else {
1282       guarantee(false, "Unknown Continuation native intrinsic");
1283     }
1284     return nm;
1285   }
1286 
1287   if (method->is_method_handle_intrinsic()) {
1288     vmIntrinsics::ID iid = method->intrinsic_id();
1289     intptr_t start = (intptr_t)__ pc();
1290     int vep_offset = ((intptr_t)__ pc()) - start;
1291 
1292     // First instruction must be a nop as it may need to be patched on deoptimisation
1293     {
1294       Assembler::IncompressibleRegion ir(masm);  // keep the nop as 4 bytes for patching.
1295       MacroAssembler::assert_alignment(__ pc());
1296       __ nop();  // 4 bytes
1297     }
1298     gen_special_dispatch(masm,
1299                          method,
1300                          in_sig_bt,
1301                          in_regs);
1302     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1303     __ flush();
1304     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1305     return nmethod::new_native_nmethod(method,
1306                                        compile_id,
1307                                        masm->code(),
1308                                        vep_offset,
1309                                        frame_complete,
1310                                        stack_slots / VMRegImpl::slots_per_word,
1311                                        in_ByteSize(-1),
1312                                        in_ByteSize(-1),
1313                                        (OopMapSet*)nullptr);
1314   }
1315   address native_func = method->native_function();
1316   assert(native_func != nullptr, "must have function");
1317 
1318   // An OopMap for lock (and class if static)
1319   OopMapSet *oop_maps = new OopMapSet();
1320   assert_cond(oop_maps != nullptr);
1321   intptr_t start = (intptr_t)__ pc();
1322 
1323   // We have received a description of where all the java arg are located
1324   // on entry to the wrapper. We need to convert these args to where
1325   // the jni function will expect them. To figure out where they go
1326   // we convert the java signature to a C signature by inserting
1327   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1328 
1329   const int total_in_args = method->size_of_parameters();
1330   int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1331 
1332   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1333   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1334   BasicType* in_elem_bt = nullptr;
1335 
1336   int argc = 0;
1337   out_sig_bt[argc++] = T_ADDRESS;
1338   if (method->is_static()) {
1339     out_sig_bt[argc++] = T_OBJECT;
1340   }
1341 
1342   for (int i = 0; i < total_in_args ; i++) {
1343     out_sig_bt[argc++] = in_sig_bt[i];
1344   }
1345 
1346   // Now figure out where the args must be stored and how much stack space
1347   // they require.
1348   int out_arg_slots = c_calling_convention(out_sig_bt, out_regs, nullptr, total_c_args);
1349 
1350   // Compute framesize for the wrapper.  We need to handlize all oops in
1351   // incoming registers
1352 
1353   // Calculate the total number of stack slots we will need.
1354 
1355   // First count the abi requirement plus all of the outgoing args
1356   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1357 
1358   // Now the space for the inbound oop handle area
1359   int total_save_slots = 8 * VMRegImpl::slots_per_word;  // 8 arguments passed in registers
1360 
1361   int oop_handle_offset = stack_slots;
1362   stack_slots += total_save_slots;
1363 
1364   // Now any space we need for handlizing a klass if static method
1365 
1366   int klass_slot_offset = 0;
1367   int klass_offset = -1;
1368   int lock_slot_offset = 0;
1369   bool is_static = false;
1370 
1371   if (method->is_static()) {
1372     klass_slot_offset = stack_slots;
1373     stack_slots += VMRegImpl::slots_per_word;
1374     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1375     is_static = true;
1376   }
1377 
1378   // Plus a lock if needed
1379 
1380   if (method->is_synchronized()) {
1381     lock_slot_offset = stack_slots;
1382     stack_slots += VMRegImpl::slots_per_word;
1383   }
1384 
1385   // Now a place (+2) to save return values or temp during shuffling
1386   // + 4 for return address (which we own) and saved fp
1387   stack_slots += 6;
1388 
1389   // Ok The space we have allocated will look like:
1390   //
1391   //
1392   // FP-> |                     |
1393   //      | 2 slots (ra)        |
1394   //      | 2 slots (fp)        |
1395   //      |---------------------|
1396   //      | 2 slots for moves   |
1397   //      |---------------------|
1398   //      | lock box (if sync)  |
1399   //      |---------------------| <- lock_slot_offset
1400   //      | klass (if static)   |
1401   //      |---------------------| <- klass_slot_offset
1402   //      | oopHandle area      |
1403   //      |---------------------| <- oop_handle_offset (8 java arg registers)
1404   //      | outbound memory     |
1405   //      | based arguments     |
1406   //      |                     |
1407   //      |---------------------|
1408   //      |                     |
1409   // SP-> | out_preserved_slots |
1410   //
1411   //
1412 
1413 
1414   // Now compute actual number of stack words we need rounding to make
1415   // stack properly aligned.
1416   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1417 
1418   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1419 
1420   // First thing make an ic check to see if we should even be here
1421 
1422   // We are free to use all registers as temps without saving them and
1423   // restoring them except fp. fp is the only callee save register
1424   // as far as the interpreter and the compiler(s) are concerned.
1425 
1426 
1427   const Register ic_reg = t1;
1428   const Register receiver = j_rarg0;
1429 
1430   Label hit;
1431   Label exception_pending;
1432 
1433   __ verify_oop(receiver);
1434   assert_different_registers(ic_reg, receiver, t0, t2);
1435   __ cmp_klass(receiver, ic_reg, t0, t2 /* call-clobbered t2 as a tmp */, hit);
1436 
1437   __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1438 
1439   // Verified entry point must be aligned
1440   __ align(8);
1441 
1442   __ bind(hit);
1443 
1444   int vep_offset = ((intptr_t)__ pc()) - start;
1445 
1446   // If we have to make this method not-entrant we'll overwrite its
1447   // first instruction with a jump.
1448   {
1449     Assembler::IncompressibleRegion ir(masm);  // keep the nop as 4 bytes for patching.
1450     MacroAssembler::assert_alignment(__ pc());
1451     __ nop();  // 4 bytes
1452   }
1453 
1454   if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1455     Label L_skip_barrier;
1456     __ mov_metadata(t1, method->method_holder()); // InstanceKlass*
1457     __ clinit_barrier(t1, t0, &L_skip_barrier);
1458     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1459 
1460     __ bind(L_skip_barrier);
1461   }
1462 
1463   // Generate stack overflow check
1464   __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1465 
1466   // Generate a new frame for the wrapper.
1467   __ enter();
1468   // -2 because return address is already present and so is saved fp
1469   __ sub(sp, sp, stack_size - 2 * wordSize);
1470 
1471   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1472   assert_cond(bs != nullptr);
1473   bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1474 
1475   // Frame is now completed as far as size and linkage.
1476   int frame_complete = ((intptr_t)__ pc()) - start;
1477 
1478   // We use x18 as the oop handle for the receiver/klass
1479   // It is callee save so it survives the call to native
1480 
1481   const Register oop_handle_reg = x18;
1482 
1483   //
1484   // We immediately shuffle the arguments so that any vm call we have to
1485   // make from here on out (sync slow path, jvmti, etc.) we will have
1486   // captured the oops from our caller and have a valid oopMap for
1487   // them.
1488 
1489   // -----------------
1490   // The Grand Shuffle
1491 
1492   // The Java calling convention is either equal (linux) or denser (win64) than the
1493   // c calling convention. However the because of the jni_env argument the c calling
1494   // convention always has at least one more (and two for static) arguments than Java.
1495   // Therefore if we move the args from java -> c backwards then we will never have
1496   // a register->register conflict and we don't have to build a dependency graph
1497   // and figure out how to break any cycles.
1498   //
1499 
1500   // Record esp-based slot for receiver on stack for non-static methods
1501   int receiver_offset = -1;
1502 
1503   // This is a trick. We double the stack slots so we can claim
1504   // the oops in the caller's frame. Since we are sure to have
1505   // more args than the caller doubling is enough to make
1506   // sure we can capture all the incoming oop args from the
1507   // caller.
1508   //
1509   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1510   assert_cond(map != nullptr);
1511 
1512   int float_args = 0;
1513   int int_args = 0;
1514 
1515 #ifdef ASSERT
1516   bool reg_destroyed[Register::number_of_registers];
1517   bool freg_destroyed[FloatRegister::number_of_registers];
1518   for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1519     reg_destroyed[r] = false;
1520   }
1521   for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1522     freg_destroyed[f] = false;
1523   }
1524 
1525 #endif /* ASSERT */
1526 
1527   // For JNI natives the incoming and outgoing registers are offset upwards.
1528   GrowableArray<int> arg_order(2 * total_in_args);
1529   VMRegPair tmp_vmreg;
1530   tmp_vmreg.set2(x9->as_VMReg());
1531 
1532   for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1533     arg_order.push(i);
1534     arg_order.push(c_arg);
1535   }
1536 
1537   int temploc = -1;
1538   for (int ai = 0; ai < arg_order.length(); ai += 2) {
1539     int i = arg_order.at(ai);
1540     int c_arg = arg_order.at(ai + 1);
1541     __ block_comment(err_msg("mv %d -> %d", i, c_arg));
1542     assert(c_arg != -1 && i != -1, "wrong order");
1543 #ifdef ASSERT
1544     if (in_regs[i].first()->is_Register()) {
1545       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1546     } else if (in_regs[i].first()->is_FloatRegister()) {
1547       assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1548     }
1549     if (out_regs[c_arg].first()->is_Register()) {
1550       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1551     } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1552       freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1553     }
1554 #endif /* ASSERT */
1555     switch (in_sig_bt[i]) {
1556       case T_ARRAY:
1557       case T_OBJECT:
1558         __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1559                        ((i == 0) && (!is_static)),
1560                        &receiver_offset);
1561         int_args++;
1562         break;
1563       case T_VOID:
1564         break;
1565 
1566       case T_FLOAT:
1567         __ float_move(in_regs[i], out_regs[c_arg]);
1568         float_args++;
1569         break;
1570 
1571       case T_DOUBLE:
1572         assert( i + 1 < total_in_args &&
1573                 in_sig_bt[i + 1] == T_VOID &&
1574                 out_sig_bt[c_arg + 1] == T_VOID, "bad arg list");
1575         __ double_move(in_regs[i], out_regs[c_arg]);
1576         float_args++;
1577         break;
1578 
1579       case T_LONG :
1580         __ long_move(in_regs[i], out_regs[c_arg]);
1581         int_args++;
1582         break;
1583 
1584       case T_ADDRESS:
1585         assert(false, "found T_ADDRESS in java args");
1586         break;
1587 
1588       default:
1589         __ move32_64(in_regs[i], out_regs[c_arg]);
1590         int_args++;
1591     }
1592   }
1593 
1594   // point c_arg at the first arg that is already loaded in case we
1595   // need to spill before we call out
1596   int c_arg = total_c_args - total_in_args;
1597 
1598   // Pre-load a static method's oop into c_rarg1.
1599   if (method->is_static()) {
1600 
1601     //  load oop into a register
1602     __ movoop(c_rarg1,
1603               JNIHandles::make_local(method->method_holder()->java_mirror()));
1604 
1605     // Now handlize the static class mirror it's known not-null.
1606     __ sd(c_rarg1, Address(sp, klass_offset));
1607     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1608 
1609     // Now get the handle
1610     __ la(c_rarg1, Address(sp, klass_offset));
1611     // and protect the arg if we must spill
1612     c_arg--;
1613   }
1614 
1615   // Change state to native (we save the return address in the thread, since it might not
1616   // be pushed on the stack when we do a stack traversal).
1617   // We use the same pc/oopMap repeatedly when we call out
1618 
1619   Label native_return;
1620   __ set_last_Java_frame(sp, noreg, native_return, t0);
1621 
1622   Label dtrace_method_entry, dtrace_method_entry_done;
1623   {
1624     ExternalAddress target((address)&DTraceMethodProbes);
1625     __ relocate(target.rspec(), [&] {
1626       int32_t offset;
1627       __ la_patchable(t0, target, offset);
1628       __ lbu(t0, Address(t0, offset));
1629     });
1630     __ bnez(t0, dtrace_method_entry);
1631     __ bind(dtrace_method_entry_done);
1632   }
1633 
1634   // RedefineClasses() tracing support for obsolete method entry
1635   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1636     // protect the args we've loaded
1637     save_args(masm, total_c_args, c_arg, out_regs);
1638     __ mov_metadata(c_rarg1, method());
1639     __ call_VM_leaf(
1640       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1641       xthread, c_rarg1);
1642     restore_args(masm, total_c_args, c_arg, out_regs);
1643   }
1644 
1645   // Lock a synchronized method
1646 
1647   // Register definitions used by locking and unlocking
1648 
1649   const Register swap_reg = x10;
1650   const Register obj_reg  = x9;  // Will contain the oop
1651   const Register lock_reg = x30;  // Address of compiler lock object (BasicLock)
1652   const Register old_hdr  = x30;  // value of old header at unlock time
1653   const Register lock_tmp = x31;  // Temporary used by lightweight_lock/unlock
1654   const Register tmp      = ra;
1655 
1656   Label slow_path_lock;
1657   Label lock_done;
1658 
1659   if (method->is_synchronized()) {
1660     Label count;
1661 
1662     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1663 
1664     // Get the handle (the 2nd argument)
1665     __ mv(oop_handle_reg, c_rarg1);
1666 
1667     // Get address of the box
1668 
1669     __ la(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1670 
1671     // Load the oop from the handle
1672     __ ld(obj_reg, Address(oop_handle_reg, 0));
1673 
1674     if (LockingMode == LM_MONITOR) {
1675       __ j(slow_path_lock);
1676     } else if (LockingMode == LM_LEGACY) {
1677       // Load (object->mark() | 1) into swap_reg % x10
1678       __ ld(t0, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1679       __ ori(swap_reg, t0, 1);
1680 
1681       // Save (object->mark() | 1) into BasicLock's displaced header
1682       __ sd(swap_reg, Address(lock_reg, mark_word_offset));
1683 
1684       // src -> dest if dest == x10 else x10 <- dest
1685       __ cmpxchg_obj_header(x10, lock_reg, obj_reg, t0, count, /*fallthrough*/nullptr);
1686 
1687       // Test if the oopMark is an obvious stack pointer, i.e.,
1688       //  1) (mark & 3) == 0, and
1689       //  2) sp <= mark < mark + os::pagesize()
1690       // These 3 tests can be done by evaluating the following
1691       // expression: ((mark - sp) & (3 - os::vm_page_size())),
1692       // assuming both stack pointer and pagesize have their
1693       // least significant 2 bits clear.
1694       // NOTE: the oopMark is in swap_reg % 10 as the result of cmpxchg
1695 
1696       __ sub(swap_reg, swap_reg, sp);
1697       __ andi(swap_reg, swap_reg, 3 - (int)os::vm_page_size());
1698 
1699       // Save the test result, for recursive case, the result is zero
1700       __ sd(swap_reg, Address(lock_reg, mark_word_offset));
1701       __ bnez(swap_reg, slow_path_lock);
1702     } else {
1703       assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1704       __ lightweight_lock(obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1705     }
1706 
1707     __ bind(count);
1708     __ increment(Address(xthread, JavaThread::held_monitor_count_offset()));
1709 
1710     // Slow path will re-enter here
1711     __ bind(lock_done);
1712   }
1713 
1714 
1715   // Finally just about ready to make the JNI call
1716 
1717   // get JNIEnv* which is first argument to native
1718   __ la(c_rarg0, Address(xthread, in_bytes(JavaThread::jni_environment_offset())));
1719 
1720   // Now set thread in native
1721   __ la(t1, Address(xthread, JavaThread::thread_state_offset()));
1722   __ mv(t0, _thread_in_native);
1723   __ membar(MacroAssembler::LoadStore | MacroAssembler::StoreStore);
1724   __ sw(t0, Address(t1));
1725 
1726   __ rt_call(native_func);
1727 
1728   __ bind(native_return);
1729 
1730   intptr_t return_pc = (intptr_t) __ pc();
1731   oop_maps->add_gc_map(return_pc - start, map);
1732 
1733   // Unpack native results.
1734   if (ret_type != T_OBJECT && ret_type != T_ARRAY) {
1735     __ cast_primitive_type(ret_type, x10);
1736   }
1737 
1738   Label safepoint_in_progress, safepoint_in_progress_done;
1739   Label after_transition;
1740 
1741   // Switch thread to "native transition" state before reading the synchronization state.
1742   // This additional state is necessary because reading and testing the synchronization
1743   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1744   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1745   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1746   //     Thread A is resumed to finish this native method, but doesn't block here since it
1747   //     didn't see any synchronization is progress, and escapes.
1748   __ mv(t0, _thread_in_native_trans);
1749 
1750   __ sw(t0, Address(xthread, JavaThread::thread_state_offset()));
1751 
1752   // Force this write out before the read below
1753   if (!UseSystemMemoryBarrier) {
1754     __ membar(MacroAssembler::AnyAny);
1755   }
1756 
1757   // check for safepoint operation in progress and/or pending suspend requests
1758   {
1759     // We need an acquire here to ensure that any subsequent load of the
1760     // global SafepointSynchronize::_state flag is ordered after this load
1761     // of the thread-local polling word. We don't want this poll to
1762     // return false (i.e. not safepointing) and a later poll of the global
1763     // SafepointSynchronize::_state spuriously to return true.
1764     // This is to avoid a race when we're in a native->Java transition
1765     // racing the code which wakes up from a safepoint.
1766 
1767     __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
1768     __ lwu(t0, Address(xthread, JavaThread::suspend_flags_offset()));
1769     __ bnez(t0, safepoint_in_progress);
1770     __ bind(safepoint_in_progress_done);
1771   }
1772 
1773   // change thread state
1774   __ la(t1, Address(xthread, JavaThread::thread_state_offset()));
1775   __ mv(t0, _thread_in_Java);
1776   __ membar(MacroAssembler::LoadStore | MacroAssembler::StoreStore);
1777   __ sw(t0, Address(t1));
1778   __ bind(after_transition);
1779 
1780   Label reguard;
1781   Label reguard_done;
1782   __ lbu(t0, Address(xthread, JavaThread::stack_guard_state_offset()));
1783   __ mv(t1, StackOverflow::stack_guard_yellow_reserved_disabled);
1784   __ beq(t0, t1, reguard);
1785   __ bind(reguard_done);
1786 
1787   // native result if any is live
1788 
1789   // Unlock
1790   Label unlock_done;
1791   Label slow_path_unlock;
1792   if (method->is_synchronized()) {
1793 
1794     // Get locked oop from the handle we passed to jni
1795     __ ld(obj_reg, Address(oop_handle_reg, 0));
1796 
1797     Label done, not_recursive;
1798 
1799     if (LockingMode == LM_LEGACY) {
1800       // Simple recursive lock?
1801       __ ld(t0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1802       __ bnez(t0, not_recursive);
1803       __ decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
1804       __ j(done);
1805     }
1806 
1807     __ bind(not_recursive);
1808 
1809     // Must save x10 if if it is live now because cmpxchg must use it
1810     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1811       save_native_result(masm, ret_type, stack_slots);
1812     }
1813 
1814     if (LockingMode == LM_MONITOR) {
1815       __ j(slow_path_unlock);
1816     } else if (LockingMode == LM_LEGACY) {
1817       // get address of the stack lock
1818       __ la(x10, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1819       //  get old displaced header
1820       __ ld(old_hdr, Address(x10, 0));
1821 
1822       // Atomic swap old header if oop still contains the stack lock
1823       Label count;
1824       __ cmpxchg_obj_header(x10, old_hdr, obj_reg, t0, count, &slow_path_unlock);
1825       __ bind(count);
1826       __ decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
1827     } else {
1828       assert(LockingMode == LM_LIGHTWEIGHT, "");
1829       __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1830       __ decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
1831     }
1832 
1833     // slow path re-enters here
1834     __ bind(unlock_done);
1835     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1836       restore_native_result(masm, ret_type, stack_slots);
1837     }
1838 
1839     __ bind(done);
1840   }
1841 
1842   Label dtrace_method_exit, dtrace_method_exit_done;
1843   {
1844     ExternalAddress target((address)&DTraceMethodProbes);
1845     __ relocate(target.rspec(), [&] {
1846       int32_t offset;
1847       __ la_patchable(t0, target, offset);
1848       __ lbu(t0, Address(t0, offset));
1849     });
1850     __ bnez(t0, dtrace_method_exit);
1851     __ bind(dtrace_method_exit_done);
1852   }
1853 
1854   __ reset_last_Java_frame(false);
1855 
1856   // Unbox oop result, e.g. JNIHandles::resolve result.
1857   if (is_reference_type(ret_type)) {
1858     __ resolve_jobject(x10, x11, x12);
1859   }
1860 
1861   if (CheckJNICalls) {
1862     // clear_pending_jni_exception_check
1863     __ sd(zr, Address(xthread, JavaThread::pending_jni_exception_check_fn_offset()));
1864   }
1865 
1866   // reset handle block
1867   __ ld(x12, Address(xthread, JavaThread::active_handles_offset()));
1868   __ sd(zr, Address(x12, JNIHandleBlock::top_offset()));
1869 
1870   __ leave();
1871 
1872   // Any exception pending?
1873   __ ld(t0, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1874   __ bnez(t0, exception_pending);
1875 
1876   // We're done
1877   __ ret();
1878 
1879   // Unexpected paths are out of line and go here
1880 
1881   // forward the exception
1882   __ bind(exception_pending);
1883 
1884   // and forward the exception
1885   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1886 
1887   // Slow path locking & unlocking
1888   if (method->is_synchronized()) {
1889 
1890     __ block_comment("Slow path lock {");
1891     __ bind(slow_path_lock);
1892 
1893     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1894     // args are (oop obj, BasicLock* lock, JavaThread* thread)
1895 
1896     // protect the args we've loaded
1897     save_args(masm, total_c_args, c_arg, out_regs);
1898 
1899     __ mv(c_rarg0, obj_reg);
1900     __ mv(c_rarg1, lock_reg);
1901     __ mv(c_rarg2, xthread);
1902 
1903     // Not a leaf but we have last_Java_frame setup as we want
1904     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
1905     restore_args(masm, total_c_args, c_arg, out_regs);
1906 
1907 #ifdef ASSERT
1908     { Label L;
1909       __ ld(t0, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1910       __ beqz(t0, L);
1911       __ stop("no pending exception allowed on exit from monitorenter");
1912       __ bind(L);
1913     }
1914 #endif
1915     __ j(lock_done);
1916 
1917     __ block_comment("} Slow path lock");
1918 
1919     __ block_comment("Slow path unlock {");
1920     __ bind(slow_path_unlock);
1921 
1922     if (ret_type == T_FLOAT || ret_type == T_DOUBLE) {
1923       save_native_result(masm, ret_type, stack_slots);
1924     }
1925 
1926     __ mv(c_rarg2, xthread);
1927     __ la(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1928     __ mv(c_rarg0, obj_reg);
1929 
1930     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1931     // NOTE that obj_reg == x9 currently
1932     __ ld(x9, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1933     __ sd(zr, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1934 
1935     __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
1936 
1937 #ifdef ASSERT
1938     {
1939       Label L;
1940       __ ld(t0, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1941       __ beqz(t0, L);
1942       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1943       __ bind(L);
1944     }
1945 #endif /* ASSERT */
1946 
1947     __ sd(x9, Address(xthread, in_bytes(Thread::pending_exception_offset())));
1948 
1949     if (ret_type == T_FLOAT || ret_type == T_DOUBLE) {
1950       restore_native_result(masm, ret_type, stack_slots);
1951     }
1952     __ j(unlock_done);
1953 
1954     __ block_comment("} Slow path unlock");
1955 
1956   } // synchronized
1957 
1958   // SLOW PATH Reguard the stack if needed
1959 
1960   __ bind(reguard);
1961   save_native_result(masm, ret_type, stack_slots);
1962   __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
1963   restore_native_result(masm, ret_type, stack_slots);
1964   // and continue
1965   __ j(reguard_done);
1966 
1967   // SLOW PATH safepoint
1968   {
1969     __ block_comment("safepoint {");
1970     __ bind(safepoint_in_progress);
1971 
1972     // Don't use call_VM as it will see a possible pending exception and forward it
1973     // and never return here preventing us from clearing _last_native_pc down below.
1974     //
1975     save_native_result(masm, ret_type, stack_slots);
1976     __ mv(c_rarg0, xthread);
1977 #ifndef PRODUCT
1978     assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
1979 #endif
1980     RuntimeAddress target(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans));
1981     __ relocate(target.rspec(), [&] {
1982       int32_t offset;
1983       __ la_patchable(t0, target, offset);
1984       __ jalr(x1, t0, offset);
1985     });
1986 
1987     // Restore any method result value
1988     restore_native_result(masm, ret_type, stack_slots);
1989 
1990     __ j(safepoint_in_progress_done);
1991     __ block_comment("} safepoint");
1992   }
1993 
1994   // SLOW PATH dtrace support
1995   {
1996     __ block_comment("dtrace entry {");
1997     __ bind(dtrace_method_entry);
1998 
1999     // We have all of the arguments setup at this point. We must not touch any register
2000     // argument registers at this point (what if we save/restore them there are no oop?
2001 
2002     save_args(masm, total_c_args, c_arg, out_regs);
2003     __ mov_metadata(c_rarg1, method());
2004     __ call_VM_leaf(
2005       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2006       xthread, c_rarg1);
2007     restore_args(masm, total_c_args, c_arg, out_regs);
2008     __ j(dtrace_method_entry_done);
2009     __ block_comment("} dtrace entry");
2010   }
2011 
2012   {
2013     __ block_comment("dtrace exit {");
2014     __ bind(dtrace_method_exit);
2015     save_native_result(masm, ret_type, stack_slots);
2016     __ mov_metadata(c_rarg1, method());
2017     __ call_VM_leaf(
2018          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2019          xthread, c_rarg1);
2020     restore_native_result(masm, ret_type, stack_slots);
2021     __ j(dtrace_method_exit_done);
2022     __ block_comment("} dtrace exit");
2023   }
2024 
2025   __ flush();
2026 
2027   nmethod *nm = nmethod::new_native_nmethod(method,
2028                                             compile_id,
2029                                             masm->code(),
2030                                             vep_offset,
2031                                             frame_complete,
2032                                             stack_slots / VMRegImpl::slots_per_word,
2033                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2034                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2035                                             oop_maps);
2036   assert(nm != nullptr, "create native nmethod fail!");
2037   return nm;
2038 }
2039 
2040 // this function returns the adjust size (in number of words) to a c2i adapter
2041 // activation for use during deoptimization
2042 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2043   assert(callee_locals >= callee_parameters,
2044          "test and remove; got more parms than locals");
2045   if (callee_locals < callee_parameters) {
2046     return 0;                   // No adjustment for negative locals
2047   }
2048   int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2049   // diff is counted in stack words
2050   return align_up(diff, 2);
2051 }
2052 
2053 //------------------------------generate_deopt_blob----------------------------
2054 void SharedRuntime::generate_deopt_blob() {
2055   // Allocate space for the code
2056   ResourceMark rm;
2057   // Setup code generation tools
2058   int pad = 0;
2059 #if INCLUDE_JVMCI
2060   if (EnableJVMCI) {
2061     pad += 512; // Increase the buffer size when compiling for JVMCI
2062   }
2063 #endif
2064   CodeBuffer buffer("deopt_blob", 2048 + pad, 1024);
2065   MacroAssembler* masm = new MacroAssembler(&buffer);
2066   int frame_size_in_words = -1;
2067   OopMap* map = nullptr;
2068   OopMapSet *oop_maps = new OopMapSet();
2069   assert_cond(masm != nullptr && oop_maps != nullptr);
2070   RegisterSaver reg_saver(COMPILER2_OR_JVMCI != 0);
2071 
2072   // -------------
2073   // This code enters when returning to a de-optimized nmethod.  A return
2074   // address has been pushed on the stack, and return values are in
2075   // registers.
2076   // If we are doing a normal deopt then we were called from the patched
2077   // nmethod from the point we returned to the nmethod. So the return
2078   // address on the stack is wrong by NativeCall::instruction_size
2079   // We will adjust the value so it looks like we have the original return
2080   // address on the stack (like when we eagerly deoptimized).
2081   // In the case of an exception pending when deoptimizing, we enter
2082   // with a return address on the stack that points after the call we patched
2083   // into the exception handler. We have the following register state from,
2084   // e.g., the forward exception stub (see stubGenerator_riscv.cpp).
2085   //    x10: exception oop
2086   //    x9: exception handler
2087   //    x13: throwing pc
2088   // So in this case we simply jam x13 into the useless return address and
2089   // the stack looks just like we want.
2090   //
2091   // At this point we need to de-opt.  We save the argument return
2092   // registers.  We call the first C routine, fetch_unroll_info().  This
2093   // routine captures the return values and returns a structure which
2094   // describes the current frame size and the sizes of all replacement frames.
2095   // The current frame is compiled code and may contain many inlined
2096   // functions, each with their own JVM state.  We pop the current frame, then
2097   // push all the new frames.  Then we call the C routine unpack_frames() to
2098   // populate these frames.  Finally unpack_frames() returns us the new target
2099   // address.  Notice that callee-save registers are BLOWN here; they have
2100   // already been captured in the vframeArray at the time the return PC was
2101   // patched.
2102   address start = __ pc();
2103   Label cont;
2104 
2105   // Prolog for non exception case!
2106 
2107   // Save everything in sight.
2108   map = reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2109 
2110   // Normal deoptimization.  Save exec mode for unpack_frames.
2111   __ mv(xcpool, Deoptimization::Unpack_deopt); // callee-saved
2112   __ j(cont);
2113 
2114   int reexecute_offset = __ pc() - start;
2115 #if INCLUDE_JVMCI && !defined(COMPILER1)
2116   if (EnableJVMCI && UseJVMCICompiler) {
2117     // JVMCI does not use this kind of deoptimization
2118     __ should_not_reach_here();
2119   }
2120 #endif
2121 
2122   // Reexecute case
2123   // return address is the pc describes what bci to do re-execute at
2124 
2125   // No need to update map as each call to save_live_registers will produce identical oopmap
2126   (void) reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2127 
2128   __ mv(xcpool, Deoptimization::Unpack_reexecute); // callee-saved
2129   __ j(cont);
2130 
2131 #if INCLUDE_JVMCI
2132   Label after_fetch_unroll_info_call;
2133   int implicit_exception_uncommon_trap_offset = 0;
2134   int uncommon_trap_offset = 0;
2135 
2136   if (EnableJVMCI) {
2137     implicit_exception_uncommon_trap_offset = __ pc() - start;
2138 
2139     __ ld(ra, Address(xthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2140     __ sd(zr, Address(xthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2141 
2142     uncommon_trap_offset = __ pc() - start;
2143 
2144     // Save everything in sight.
2145     reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2146     // fetch_unroll_info needs to call last_java_frame()
2147     Label retaddr;
2148     __ set_last_Java_frame(sp, noreg, retaddr, t0);
2149 
2150     __ lw(c_rarg1, Address(xthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2151     __ mv(t0, -1);
2152     __ sw(t0, Address(xthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2153 
2154     __ mv(xcpool, Deoptimization::Unpack_reexecute);
2155     __ mv(c_rarg0, xthread);
2156     __ orrw(c_rarg2, zr, xcpool); // exec mode
2157     RuntimeAddress target(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap));
2158     __ relocate(target.rspec(), [&] {
2159       int32_t offset;
2160       __ la_patchable(t0, target, offset);
2161       __ jalr(x1, t0, offset);
2162     });
2163     __ bind(retaddr);
2164     oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2165 
2166     __ reset_last_Java_frame(false);
2167 
2168     __ j(after_fetch_unroll_info_call);
2169   } // EnableJVMCI
2170 #endif // INCLUDE_JVMCI
2171 
2172   int exception_offset = __ pc() - start;
2173 
2174   // Prolog for exception case
2175 
2176   // all registers are dead at this entry point, except for x10, and
2177   // x13 which contain the exception oop and exception pc
2178   // respectively.  Set them in TLS and fall thru to the
2179   // unpack_with_exception_in_tls entry point.
2180 
2181   __ sd(x13, Address(xthread, JavaThread::exception_pc_offset()));
2182   __ sd(x10, Address(xthread, JavaThread::exception_oop_offset()));
2183 
2184   int exception_in_tls_offset = __ pc() - start;
2185 
2186   // new implementation because exception oop is now passed in JavaThread
2187 
2188   // Prolog for exception case
2189   // All registers must be preserved because they might be used by LinearScan
2190   // Exceptiop oop and throwing PC are passed in JavaThread
2191   // tos: stack at point of call to method that threw the exception (i.e. only
2192   // args are on the stack, no return address)
2193 
2194   // The return address pushed by save_live_registers will be patched
2195   // later with the throwing pc. The correct value is not available
2196   // now because loading it from memory would destroy registers.
2197 
2198   // NB: The SP at this point must be the SP of the method that is
2199   // being deoptimized.  Deoptimization assumes that the frame created
2200   // here by save_live_registers is immediately below the method's SP.
2201   // This is a somewhat fragile mechanism.
2202 
2203   // Save everything in sight.
2204   map = reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2205 
2206   // Now it is safe to overwrite any register
2207 
2208   // Deopt during an exception.  Save exec mode for unpack_frames.
2209   __ mv(xcpool, Deoptimization::Unpack_exception); // callee-saved
2210 
2211   // load throwing pc from JavaThread and patch it as the return address
2212   // of the current frame. Then clear the field in JavaThread
2213 
2214   __ ld(x13, Address(xthread, JavaThread::exception_pc_offset()));
2215   __ sd(x13, Address(fp, frame::return_addr_offset * wordSize));
2216   __ sd(zr, Address(xthread, JavaThread::exception_pc_offset()));
2217 
2218 #ifdef ASSERT
2219   // verify that there is really an exception oop in JavaThread
2220   __ ld(x10, Address(xthread, JavaThread::exception_oop_offset()));
2221   __ verify_oop(x10);
2222 
2223   // verify that there is no pending exception
2224   Label no_pending_exception;
2225   __ ld(t0, Address(xthread, Thread::pending_exception_offset()));
2226   __ beqz(t0, no_pending_exception);
2227   __ stop("must not have pending exception here");
2228   __ bind(no_pending_exception);
2229 #endif
2230 
2231   __ bind(cont);
2232 
2233   // Call C code.  Need thread and this frame, but NOT official VM entry
2234   // crud.  We cannot block on this call, no GC can happen.
2235   //
2236   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2237 
2238   // fetch_unroll_info needs to call last_java_frame().
2239 
2240   Label retaddr;
2241   __ set_last_Java_frame(sp, noreg, retaddr, t0);
2242 #ifdef ASSERT
2243   {
2244     Label L;
2245     __ ld(t0, Address(xthread,
2246                               JavaThread::last_Java_fp_offset()));
2247     __ beqz(t0, L);
2248     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2249     __ bind(L);
2250   }
2251 #endif // ASSERT
2252   __ mv(c_rarg0, xthread);
2253   __ mv(c_rarg1, xcpool);
2254   RuntimeAddress target(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info));
2255   __ relocate(target.rspec(), [&] {
2256     int32_t offset;
2257     __ la_patchable(t0, target, offset);
2258     __ jalr(x1, t0, offset);
2259   });
2260   __ bind(retaddr);
2261 
2262   // Need to have an oopmap that tells fetch_unroll_info where to
2263   // find any register it might need.
2264   oop_maps->add_gc_map(__ pc() - start, map);
2265 
2266   __ reset_last_Java_frame(false);
2267 
2268 #if INCLUDE_JVMCI
2269   if (EnableJVMCI) {
2270     __ bind(after_fetch_unroll_info_call);
2271   }
2272 #endif
2273 
2274   // Load UnrollBlock* into x15
2275   __ mv(x15, x10);
2276 
2277   __ lwu(xcpool, Address(x15, Deoptimization::UnrollBlock::unpack_kind_offset()));
2278   Label noException;
2279   __ mv(t0, Deoptimization::Unpack_exception);
2280   __ bne(xcpool, t0, noException); // Was exception pending?
2281   __ ld(x10, Address(xthread, JavaThread::exception_oop_offset()));
2282   __ ld(x13, Address(xthread, JavaThread::exception_pc_offset()));
2283   __ sd(zr, Address(xthread, JavaThread::exception_oop_offset()));
2284   __ sd(zr, Address(xthread, JavaThread::exception_pc_offset()));
2285 
2286   __ verify_oop(x10);
2287 
2288   // Overwrite the result registers with the exception results.
2289   __ sd(x10, Address(sp, reg_saver.reg_offset_in_bytes(x10)));
2290 
2291   __ bind(noException);
2292 
2293   // Only register save data is on the stack.
2294   // Now restore the result registers.  Everything else is either dead
2295   // or captured in the vframeArray.
2296 
2297   // Restore fp result register
2298   __ fld(f10, Address(sp, reg_saver.freg_offset_in_bytes(f10)));
2299   // Restore integer result register
2300   __ ld(x10, Address(sp, reg_saver.reg_offset_in_bytes(x10)));
2301 
2302   // Pop all of the register save area off the stack
2303   __ add(sp, sp, frame_size_in_words * wordSize);
2304 
2305   // All of the register save area has been popped of the stack. Only the
2306   // return address remains.
2307 
2308   // Pop all the frames we must move/replace.
2309   //
2310   // Frame picture (youngest to oldest)
2311   // 1: self-frame (no frame link)
2312   // 2: deopting frame  (no frame link)
2313   // 3: caller of deopting frame (could be compiled/interpreted).
2314   //
2315   // Note: by leaving the return address of self-frame on the stack
2316   // and using the size of frame 2 to adjust the stack
2317   // when we are done the return to frame 3 will still be on the stack.
2318 
2319   // Pop deoptimized frame
2320   __ lwu(x12, Address(x15, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2321   __ sub(x12, x12, 2 * wordSize);
2322   __ add(sp, sp, x12);
2323   __ ld(fp, Address(sp, 0));
2324   __ ld(ra, Address(sp, wordSize));
2325   __ addi(sp, sp, 2 * wordSize);
2326   // RA should now be the return address to the caller (3)
2327 
2328 #ifdef ASSERT
2329   // Compilers generate code that bang the stack by as much as the
2330   // interpreter would need. So this stack banging should never
2331   // trigger a fault. Verify that it does not on non product builds.
2332   __ lwu(x9, Address(x15, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2333   __ bang_stack_size(x9, x12);
2334 #endif
2335   // Load address of array of frame pcs into x12
2336   __ ld(x12, Address(x15, Deoptimization::UnrollBlock::frame_pcs_offset()));
2337 
2338   // Load address of array of frame sizes into x14
2339   __ ld(x14, Address(x15, Deoptimization::UnrollBlock::frame_sizes_offset()));
2340 
2341   // Load counter into x13
2342   __ lwu(x13, Address(x15, Deoptimization::UnrollBlock::number_of_frames_offset()));
2343 
2344   // Now adjust the caller's stack to make up for the extra locals
2345   // but record the original sp so that we can save it in the skeletal interpreter
2346   // frame and the stack walking of interpreter_sender will get the unextended sp
2347   // value and not the "real" sp value.
2348 
2349   const Register sender_sp = x16;
2350 
2351   __ mv(sender_sp, sp);
2352   __ lwu(x9, Address(x15,
2353                      Deoptimization::UnrollBlock::
2354                      caller_adjustment_offset()));
2355   __ sub(sp, sp, x9);
2356 
2357   // Push interpreter frames in a loop
2358   __ mv(t0, 0xDEADDEAD);               // Make a recognizable pattern
2359   __ mv(t1, t0);
2360   Label loop;
2361   __ bind(loop);
2362   __ ld(x9, Address(x14, 0));          // Load frame size
2363   __ addi(x14, x14, wordSize);
2364   __ sub(x9, x9, 2 * wordSize);        // We'll push pc and fp by hand
2365   __ ld(ra, Address(x12, 0));          // Load pc
2366   __ addi(x12, x12, wordSize);
2367   __ enter();                          // Save old & set new fp
2368   __ sub(sp, sp, x9);                  // Prolog
2369   // This value is corrected by layout_activation_impl
2370   __ sd(zr, Address(fp, frame::interpreter_frame_last_sp_offset * wordSize));
2371   __ sd(sender_sp, Address(fp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2372   __ mv(sender_sp, sp);                // Pass sender_sp to next frame
2373   __ addi(x13, x13, -1);               // Decrement counter
2374   __ bnez(x13, loop);
2375 
2376     // Re-push self-frame
2377   __ ld(ra, Address(x12));
2378   __ enter();
2379 
2380   // Allocate a full sized register save area.  We subtract 2 because
2381   // enter() just pushed 2 words
2382   __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2383 
2384   // Restore frame locals after moving the frame
2385   __ fsd(f10, Address(sp, reg_saver.freg_offset_in_bytes(f10)));
2386   __ sd(x10, Address(sp, reg_saver.reg_offset_in_bytes(x10)));
2387 
2388   // Call C code.  Need thread but NOT official VM entry
2389   // crud.  We cannot block on this call, no GC can happen.  Call should
2390   // restore return values to their stack-slots with the new SP.
2391   //
2392   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2393 
2394   // Use fp because the frames look interpreted now
2395   // Don't need the precise return PC here, just precise enough to point into this code blob.
2396   address the_pc = __ pc();
2397   __ set_last_Java_frame(sp, fp, the_pc, t0);
2398 
2399   __ mv(c_rarg0, xthread);
2400   __ mv(c_rarg1, xcpool); // second arg: exec_mode
2401   target = RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames));
2402   __ relocate(target.rspec(), [&] {
2403     int32_t offset;
2404     __ la_patchable(t0, target, offset);
2405     __ jalr(x1, t0, offset);
2406   });
2407 
2408   // Set an oopmap for the call site
2409   // Use the same PC we used for the last java frame
2410   oop_maps->add_gc_map(the_pc - start,
2411                        new OopMap(frame_size_in_words, 0));
2412 
2413   // Clear fp AND pc
2414   __ reset_last_Java_frame(true);
2415 
2416   // Collect return values
2417   __ fld(f10, Address(sp, reg_saver.freg_offset_in_bytes(f10)));
2418   __ ld(x10, Address(sp, reg_saver.reg_offset_in_bytes(x10)));
2419 
2420   // Pop self-frame.
2421   __ leave();                           // Epilog
2422 
2423   // Jump to interpreter
2424   __ ret();
2425 
2426   // Make sure all code is generated
2427   masm->flush();
2428 
2429   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2430   assert(_deopt_blob != nullptr, "create deoptimization blob fail!");
2431   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2432 #if INCLUDE_JVMCI
2433   if (EnableJVMCI) {
2434     _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2435     _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2436   }
2437 #endif
2438 }
2439 
2440 // Number of stack slots between incoming argument block and the start of
2441 // a new frame. The PROLOG must add this many slots to the stack. The
2442 // EPILOG must remove this many slots.
2443 // RISCV needs two words for RA (return address) and FP (frame pointer).
2444 uint SharedRuntime::in_preserve_stack_slots() {
2445   return 2 * VMRegImpl::slots_per_word;
2446 }
2447 
2448 uint SharedRuntime::out_preserve_stack_slots() {
2449   return 0;
2450 }
2451 
2452 #ifdef COMPILER2
2453 //------------------------------generate_uncommon_trap_blob--------------------
2454 void SharedRuntime::generate_uncommon_trap_blob() {
2455   // Allocate space for the code
2456   ResourceMark rm;
2457   // Setup code generation tools
2458   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2459   MacroAssembler* masm = new MacroAssembler(&buffer);
2460   assert_cond(masm != nullptr);
2461 
2462   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2463 
2464   address start = __ pc();
2465 
2466   // Push self-frame.  We get here with a return address in RA
2467   // and sp should be 16 byte aligned
2468   // push fp and retaddr by hand
2469   __ addi(sp, sp, -2 * wordSize);
2470   __ sd(ra, Address(sp, wordSize));
2471   __ sd(fp, Address(sp, 0));
2472   // we don't expect an arg reg save area
2473 #ifndef PRODUCT
2474   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2475 #endif
2476   // compiler left unloaded_class_index in j_rarg0 move to where the
2477   // runtime expects it.
2478   __ sign_extend(c_rarg1, j_rarg0, 32);
2479 
2480   // we need to set the past SP to the stack pointer of the stub frame
2481   // and the pc to the address where this runtime call will return
2482   // although actually any pc in this code blob will do).
2483   Label retaddr;
2484   __ set_last_Java_frame(sp, noreg, retaddr, t0);
2485 
2486   // Call C code.  Need thread but NOT official VM entry
2487   // crud.  We cannot block on this call, no GC can happen.  Call should
2488   // capture callee-saved registers as well as return values.
2489   //
2490   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index, jint exec_mode)
2491   //
2492   // n.b. 3 gp args, 0 fp args, integral return type
2493 
2494   __ mv(c_rarg0, xthread);
2495   __ mv(c_rarg2, Deoptimization::Unpack_uncommon_trap);
2496   RuntimeAddress target(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap));
2497   __ relocate(target.rspec(), [&] {
2498     int32_t offset;
2499     __ la_patchable(t0, target, offset);
2500     __ jalr(x1, t0, offset);
2501   });
2502   __ bind(retaddr);
2503 
2504   // Set an oopmap for the call site
2505   OopMapSet* oop_maps = new OopMapSet();
2506   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2507   assert_cond(oop_maps != nullptr && map != nullptr);
2508 
2509   // location of fp is known implicitly by the frame sender code
2510 
2511   oop_maps->add_gc_map(__ pc() - start, map);
2512 
2513   __ reset_last_Java_frame(false);
2514 
2515   // move UnrollBlock* into x14
2516   __ mv(x14, x10);
2517 
2518 #ifdef ASSERT
2519   { Label L;
2520     __ lwu(t0, Address(x14, Deoptimization::UnrollBlock::unpack_kind_offset()));
2521     __ mv(t1, Deoptimization::Unpack_uncommon_trap);
2522     __ beq(t0, t1, L);
2523     __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2524     __ bind(L);
2525   }
2526 #endif
2527 
2528   // Pop all the frames we must move/replace.
2529   //
2530   // Frame picture (youngest to oldest)
2531   // 1: self-frame (no frame link)
2532   // 2: deopting frame  (no frame link)
2533   // 3: caller of deopting frame (could be compiled/interpreted).
2534 
2535   __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2536 
2537   // Pop deoptimized frame (int)
2538   __ lwu(x12, Address(x14,
2539                       Deoptimization::UnrollBlock::
2540                       size_of_deoptimized_frame_offset()));
2541   __ sub(x12, x12, 2 * wordSize);
2542   __ add(sp, sp, x12);
2543   __ ld(fp, Address(sp, 0));
2544   __ ld(ra, Address(sp, wordSize));
2545   __ addi(sp, sp, 2 * wordSize);
2546   // RA should now be the return address to the caller (3) frame
2547 
2548 #ifdef ASSERT
2549   // Compilers generate code that bang the stack by as much as the
2550   // interpreter would need. So this stack banging should never
2551   // trigger a fault. Verify that it does not on non product builds.
2552   __ lwu(x11, Address(x14,
2553                       Deoptimization::UnrollBlock::
2554                       total_frame_sizes_offset()));
2555   __ bang_stack_size(x11, x12);
2556 #endif
2557 
2558   // Load address of array of frame pcs into x12 (address*)
2559   __ ld(x12, Address(x14,
2560                      Deoptimization::UnrollBlock::frame_pcs_offset()));
2561 
2562   // Load address of array of frame sizes into x15 (intptr_t*)
2563   __ ld(x15, Address(x14,
2564                      Deoptimization::UnrollBlock::
2565                      frame_sizes_offset()));
2566 
2567   // Counter
2568   __ lwu(x13, Address(x14,
2569                       Deoptimization::UnrollBlock::
2570                       number_of_frames_offset())); // (int)
2571 
2572   // Now adjust the caller's stack to make up for the extra locals but
2573   // record the original sp so that we can save it in the skeletal
2574   // interpreter frame and the stack walking of interpreter_sender
2575   // will get the unextended sp value and not the "real" sp value.
2576 
2577   const Register sender_sp = t1; // temporary register
2578 
2579   __ lwu(x11, Address(x14,
2580                       Deoptimization::UnrollBlock::
2581                       caller_adjustment_offset())); // (int)
2582   __ mv(sender_sp, sp);
2583   __ sub(sp, sp, x11);
2584 
2585   // Push interpreter frames in a loop
2586   Label loop;
2587   __ bind(loop);
2588   __ ld(x11, Address(x15, 0));       // Load frame size
2589   __ sub(x11, x11, 2 * wordSize);    // We'll push pc and fp by hand
2590   __ ld(ra, Address(x12, 0));        // Save return address
2591   __ enter();                        // and old fp & set new fp
2592   __ sub(sp, sp, x11);               // Prolog
2593   __ sd(sender_sp, Address(fp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2594   // This value is corrected by layout_activation_impl
2595   __ sd(zr, Address(fp, frame::interpreter_frame_last_sp_offset * wordSize));
2596   __ mv(sender_sp, sp);              // Pass sender_sp to next frame
2597   __ add(x15, x15, wordSize);        // Bump array pointer (sizes)
2598   __ add(x12, x12, wordSize);        // Bump array pointer (pcs)
2599   __ subw(x13, x13, 1);              // Decrement counter
2600   __ bgtz(x13, loop);
2601   __ ld(ra, Address(x12, 0));        // save final return address
2602   // Re-push self-frame
2603   __ enter();                        // & old fp & set new fp
2604 
2605   // Use fp because the frames look interpreted now
2606   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2607   // Don't need the precise return PC here, just precise enough to point into this code blob.
2608   address the_pc = __ pc();
2609   __ set_last_Java_frame(sp, fp, the_pc, t0);
2610 
2611   // Call C code.  Need thread but NOT official VM entry
2612   // crud.  We cannot block on this call, no GC can happen.  Call should
2613   // restore return values to their stack-slots with the new SP.
2614   //
2615   // BasicType unpack_frames(JavaThread* thread, int exec_mode)
2616   //
2617 
2618   // n.b. 2 gp args, 0 fp args, integral return type
2619 
2620   // sp should already be aligned
2621   __ mv(c_rarg0, xthread);
2622   __ mv(c_rarg1, Deoptimization::Unpack_uncommon_trap);
2623   target = RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames));
2624   __ relocate(target.rspec(), [&] {
2625     int32_t offset;
2626     __ la_patchable(t0, target, offset);
2627     __ jalr(x1, t0, offset);
2628   });
2629 
2630   // Set an oopmap for the call site
2631   // Use the same PC we used for the last java frame
2632   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2633 
2634   // Clear fp AND pc
2635   __ reset_last_Java_frame(true);
2636 
2637   // Pop self-frame.
2638   __ leave();                 // Epilog
2639 
2640   // Jump to interpreter
2641   __ ret();
2642 
2643   // Make sure all code is generated
2644   masm->flush();
2645 
2646   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
2647                                                   SimpleRuntimeFrame::framesize >> 1);
2648 }
2649 #endif // COMPILER2
2650 
2651 //------------------------------generate_handler_blob------
2652 //
2653 // Generate a special Compile2Runtime blob that saves all registers,
2654 // and setup oopmap.
2655 //
2656 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2657   ResourceMark rm;
2658   OopMapSet *oop_maps = new OopMapSet();
2659   assert_cond(oop_maps != nullptr);
2660   OopMap* map = nullptr;
2661 
2662   // Allocate space for the code.  Setup code generation tools.
2663   CodeBuffer buffer("handler_blob", 2048, 1024);
2664   MacroAssembler* masm = new MacroAssembler(&buffer);
2665   assert_cond(masm != nullptr);
2666 
2667   address start   = __ pc();
2668   address call_pc = nullptr;
2669   int frame_size_in_words = -1;
2670   bool cause_return = (poll_type == POLL_AT_RETURN);
2671   RegisterSaver reg_saver(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2672 
2673   // Save Integer and Float registers.
2674   map = reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2675 
2676   // The following is basically a call_VM.  However, we need the precise
2677   // address of the call in order to generate an oopmap. Hence, we do all the
2678   // work ourselves.
2679 
2680   Label retaddr;
2681   __ set_last_Java_frame(sp, noreg, retaddr, t0);
2682 
2683   // The return address must always be correct so that frame constructor never
2684   // sees an invalid pc.
2685 
2686   if (!cause_return) {
2687     // overwrite the return address pushed by save_live_registers
2688     // Additionally, x18 is a callee-saved register so we can look at
2689     // it later to determine if someone changed the return address for
2690     // us!
2691     __ ld(x18, Address(xthread, JavaThread::saved_exception_pc_offset()));
2692     __ sd(x18, Address(fp, frame::return_addr_offset * wordSize));
2693   }
2694 
2695   // Do the call
2696   __ mv(c_rarg0, xthread);
2697   RuntimeAddress target(call_ptr);
2698   __ relocate(target.rspec(), [&] {
2699     int32_t offset;
2700     __ la_patchable(t0, target, offset);
2701     __ jalr(x1, t0, offset);
2702   });
2703   __ bind(retaddr);
2704 
2705   // Set an oopmap for the call site.  This oopmap will map all
2706   // oop-registers and debug-info registers as callee-saved.  This
2707   // will allow deoptimization at this safepoint to find all possible
2708   // debug-info recordings, as well as let GC find all oops.
2709 
2710   oop_maps->add_gc_map( __ pc() - start, map);
2711 
2712   Label noException;
2713 
2714   __ reset_last_Java_frame(false);
2715 
2716   __ membar(MacroAssembler::LoadLoad | MacroAssembler::LoadStore);
2717 
2718   __ ld(t0, Address(xthread, Thread::pending_exception_offset()));
2719   __ beqz(t0, noException);
2720 
2721   // Exception pending
2722 
2723   reg_saver.restore_live_registers(masm);
2724 
2725   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2726 
2727   // No exception case
2728   __ bind(noException);
2729 
2730   Label no_adjust, bail;
2731   if (!cause_return) {
2732     // If our stashed return pc was modified by the runtime we avoid touching it
2733     __ ld(t0, Address(fp, frame::return_addr_offset * wordSize));
2734     __ bne(x18, t0, no_adjust);
2735 
2736 #ifdef ASSERT
2737     // Verify the correct encoding of the poll we're about to skip.
2738     // See NativeInstruction::is_lwu_to_zr()
2739     __ lwu(t0, Address(x18));
2740     __ andi(t1, t0, 0b0000011);
2741     __ mv(t2, 0b0000011);
2742     __ bne(t1, t2, bail); // 0-6:0b0000011
2743     __ srli(t1, t0, 7);
2744     __ andi(t1, t1, 0b00000);
2745     __ bnez(t1, bail);    // 7-11:0b00000
2746     __ srli(t1, t0, 12);
2747     __ andi(t1, t1, 0b110);
2748     __ mv(t2, 0b110);
2749     __ bne(t1, t2, bail); // 12-14:0b110
2750 #endif
2751     // Adjust return pc forward to step over the safepoint poll instruction
2752     __ add(x18, x18, NativeInstruction::instruction_size);
2753     __ sd(x18, Address(fp, frame::return_addr_offset * wordSize));
2754   }
2755 
2756   __ bind(no_adjust);
2757   // Normal exit, restore registers and exit.
2758 
2759   reg_saver.restore_live_registers(masm);
2760   __ ret();
2761 
2762 #ifdef ASSERT
2763   __ bind(bail);
2764   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2765 #endif
2766 
2767   // Make sure all code is generated
2768   masm->flush();
2769 
2770   // Fill-out other meta info
2771   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2772 }
2773 
2774 //
2775 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2776 //
2777 // Generate a stub that calls into vm to find out the proper destination
2778 // of a java call. All the argument registers are live at this point
2779 // but since this is generic code we don't know what they are and the caller
2780 // must do any gc of the args.
2781 //
2782 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2783   assert(StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2784 
2785   // allocate space for the code
2786   ResourceMark rm;
2787 
2788   CodeBuffer buffer(name, 1000, 512);
2789   MacroAssembler* masm = new MacroAssembler(&buffer);
2790   assert_cond(masm != nullptr);
2791 
2792   int frame_size_in_words = -1;
2793   RegisterSaver reg_saver(false /* save_vectors */);
2794 
2795   OopMapSet *oop_maps = new OopMapSet();
2796   assert_cond(oop_maps != nullptr);
2797   OopMap* map = nullptr;
2798 
2799   int start = __ offset();
2800 
2801   map = reg_saver.save_live_registers(masm, 0, &frame_size_in_words);
2802 
2803   int frame_complete = __ offset();
2804 
2805   {
2806     Label retaddr;
2807     __ set_last_Java_frame(sp, noreg, retaddr, t0);
2808 
2809     __ mv(c_rarg0, xthread);
2810     RuntimeAddress target(destination);
2811     __ relocate(target.rspec(), [&] {
2812       int32_t offset;
2813       __ la_patchable(t0, target, offset);
2814       __ jalr(x1, t0, offset);
2815     });
2816     __ bind(retaddr);
2817   }
2818 
2819   // Set an oopmap for the call site.
2820   // We need this not only for callee-saved registers, but also for volatile
2821   // registers that the compiler might be keeping live across a safepoint.
2822 
2823   oop_maps->add_gc_map( __ offset() - start, map);
2824 
2825   // x10 contains the address we are going to jump to assuming no exception got installed
2826 
2827   // clear last_Java_sp
2828   __ reset_last_Java_frame(false);
2829   // check for pending exceptions
2830   Label pending;
2831   __ ld(t0, Address(xthread, Thread::pending_exception_offset()));
2832   __ bnez(t0, pending);
2833 
2834   // get the returned Method*
2835   __ get_vm_result_2(xmethod, xthread);
2836   __ sd(xmethod, Address(sp, reg_saver.reg_offset_in_bytes(xmethod)));
2837 
2838   // x10 is where we want to jump, overwrite t0 which is saved and temporary
2839   __ sd(x10, Address(sp, reg_saver.reg_offset_in_bytes(t0)));
2840   reg_saver.restore_live_registers(masm);
2841 
2842   // We are back to the original state on entry and ready to go.
2843 
2844   __ jr(t0);
2845 
2846   // Pending exception after the safepoint
2847 
2848   __ bind(pending);
2849 
2850   reg_saver.restore_live_registers(masm);
2851 
2852   // exception pending => remove activation and forward to exception handler
2853 
2854   __ sd(zr, Address(xthread, JavaThread::vm_result_offset()));
2855 
2856   __ ld(x10, Address(xthread, Thread::pending_exception_offset()));
2857   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2858 
2859   // -------------
2860   // make sure all code is generated
2861   masm->flush();
2862 
2863   // return the  blob
2864   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2865 }
2866 
2867 #ifdef COMPILER2
2868 //------------------------------generate_exception_blob---------------------------
2869 // creates exception blob at the end
2870 // Using exception blob, this code is jumped from a compiled method.
2871 // (see emit_exception_handler in riscv.ad file)
2872 //
2873 // Given an exception pc at a call we call into the runtime for the
2874 // handler in this method. This handler might merely restore state
2875 // (i.e. callee save registers) unwind the frame and jump to the
2876 // exception handler for the nmethod if there is no Java level handler
2877 // for the nmethod.
2878 //
2879 // This code is entered with a jmp.
2880 //
2881 // Arguments:
2882 //   x10: exception oop
2883 //   x13: exception pc
2884 //
2885 // Results:
2886 //   x10: exception oop
2887 //   x13: exception pc in caller
2888 //   destination: exception handler of caller
2889 //
2890 // Note: the exception pc MUST be at a call (precise debug information)
2891 //       Registers x10, x13, x12, x14, x15, t0 are not callee saved.
2892 //
2893 
2894 void OptoRuntime::generate_exception_blob() {
2895   assert(!OptoRuntime::is_callee_saved_register(R13_num), "");
2896   assert(!OptoRuntime::is_callee_saved_register(R10_num), "");
2897   assert(!OptoRuntime::is_callee_saved_register(R12_num), "");
2898 
2899   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2900 
2901   // Allocate space for the code
2902   ResourceMark rm;
2903   // Setup code generation tools
2904   CodeBuffer buffer("exception_blob", 2048, 1024);
2905   MacroAssembler* masm = new MacroAssembler(&buffer);
2906   assert_cond(masm != nullptr);
2907 
2908   // TODO check various assumptions made here
2909   //
2910   // make sure we do so before running this
2911 
2912   address start = __ pc();
2913 
2914   // push fp and retaddr by hand
2915   // Exception pc is 'return address' for stack walker
2916   __ addi(sp, sp, -2 * wordSize);
2917   __ sd(ra, Address(sp, wordSize));
2918   __ sd(fp, Address(sp));
2919   // there are no callee save registers and we don't expect an
2920   // arg reg save area
2921 #ifndef PRODUCT
2922   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2923 #endif
2924   // Store exception in Thread object. We cannot pass any arguments to the
2925   // handle_exception call, since we do not want to make any assumption
2926   // about the size of the frame where the exception happened in.
2927   __ sd(x10, Address(xthread, JavaThread::exception_oop_offset()));
2928   __ sd(x13, Address(xthread, JavaThread::exception_pc_offset()));
2929 
2930   // This call does all the hard work.  It checks if an exception handler
2931   // exists in the method.
2932   // If so, it returns the handler address.
2933   // If not, it prepares for stack-unwinding, restoring the callee-save
2934   // registers of the frame being removed.
2935   //
2936   // address OptoRuntime::handle_exception_C(JavaThread* thread)
2937   //
2938   // n.b. 1 gp arg, 0 fp args, integral return type
2939 
2940   // the stack should always be aligned
2941   address the_pc = __ pc();
2942   __ set_last_Java_frame(sp, noreg, the_pc, t0);
2943   __ mv(c_rarg0, xthread);
2944   RuntimeAddress target(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C));
2945   __ relocate(target.rspec(), [&] {
2946     int32_t offset;
2947     __ la_patchable(t0, target, offset);
2948     __ jalr(x1, t0, offset);
2949   });
2950 
2951 
2952   // handle_exception_C is a special VM call which does not require an explicit
2953   // instruction sync afterwards.
2954 
2955   // Set an oopmap for the call site.  This oopmap will only be used if we
2956   // are unwinding the stack.  Hence, all locations will be dead.
2957   // Callee-saved registers will be the same as the frame above (i.e.,
2958   // handle_exception_stub), since they were restored when we got the
2959   // exception.
2960 
2961   OopMapSet* oop_maps = new OopMapSet();
2962   assert_cond(oop_maps != nullptr);
2963 
2964   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2965 
2966   __ reset_last_Java_frame(false);
2967 
2968   // Restore callee-saved registers
2969 
2970   // fp is an implicitly saved callee saved register (i.e. the calling
2971   // convention will save restore it in prolog/epilog) Other than that
2972   // there are no callee save registers now that adapter frames are gone.
2973   // and we dont' expect an arg reg save area
2974   __ ld(fp, Address(sp));
2975   __ ld(x13, Address(sp, wordSize));
2976   __ addi(sp, sp , 2 * wordSize);
2977 
2978   // x10: exception handler
2979 
2980   // We have a handler in x10 (could be deopt blob).
2981   __ mv(t0, x10);
2982 
2983   // Get the exception oop
2984   __ ld(x10, Address(xthread, JavaThread::exception_oop_offset()));
2985   // Get the exception pc in case we are deoptimized
2986   __ ld(x14, Address(xthread, JavaThread::exception_pc_offset()));
2987 #ifdef ASSERT
2988   __ sd(zr, Address(xthread, JavaThread::exception_handler_pc_offset()));
2989   __ sd(zr, Address(xthread, JavaThread::exception_pc_offset()));
2990 #endif
2991   // Clear the exception oop so GC no longer processes it as a root.
2992   __ sd(zr, Address(xthread, JavaThread::exception_oop_offset()));
2993 
2994   // x10: exception oop
2995   // t0:  exception handler
2996   // x14: exception pc
2997   // Jump to handler
2998 
2999   __ jr(t0);
3000 
3001   // Make sure all code is generated
3002   masm->flush();
3003 
3004   // Set exception blob
3005   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3006 }
3007 #endif // COMPILER2