1 /*
   2  * Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_CodeStubs.hpp"
  27 #include "c1/c1_InstructionPrinter.hpp"
  28 #include "c1/c1_LIR.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_ValueStack.hpp"
  31 #include "ci/ciInstance.hpp"
  32 #include "runtime/safepointMechanism.inline.hpp"
  33 #include "runtime/sharedRuntime.hpp"
  34 #include "runtime/vm_version.hpp"
  35 
  36 Register LIR_Opr::as_register() const {
  37   return FrameMap::cpu_rnr2reg(cpu_regnr());
  38 }
  39 
  40 Register LIR_Opr::as_register_lo() const {
  41   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  42 }
  43 
  44 Register LIR_Opr::as_register_hi() const {
  45   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  46 }
  47 
  48 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  49 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr();
  50 
  51 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  52   ValueTag tag = type->tag();
  53   switch (tag) {
  54   case metaDataTag : {
  55     ClassConstant* c = type->as_ClassConstant();
  56     if (c != nullptr && !c->value()->is_loaded()) {
  57       return LIR_OprFact::metadataConst(nullptr);
  58     } else if (c != nullptr) {
  59       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  60     } else {
  61       MethodConstant* m = type->as_MethodConstant();
  62       assert (m != nullptr, "not a class or a method?");
  63       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  64     }
  65   }
  66   case objectTag : {
  67       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
  68     }
  69   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
  70   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
  71   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
  72   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
  73   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
  74   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
  75   }
  76 }
  77 
  78 
  79 //---------------------------------------------------
  80 
  81 
  82 LIR_Address::Scale LIR_Address::scale(BasicType type) {
  83   int elem_size = type2aelembytes(type);
  84   switch (elem_size) {
  85   case 1: return LIR_Address::times_1;
  86   case 2: return LIR_Address::times_2;
  87   case 4: return LIR_Address::times_4;
  88   case 8: return LIR_Address::times_8;
  89   }
  90   ShouldNotReachHere();
  91   return LIR_Address::times_1;
  92 }
  93 
  94 //---------------------------------------------------
  95 
  96 char LIR_Opr::type_char(BasicType t) {
  97   switch (t) {
  98     case T_ARRAY:
  99       t = T_OBJECT;
 100     case T_BOOLEAN:
 101     case T_CHAR:
 102     case T_FLOAT:
 103     case T_DOUBLE:
 104     case T_BYTE:
 105     case T_SHORT:
 106     case T_INT:
 107     case T_LONG:
 108     case T_OBJECT:
 109     case T_ADDRESS:
 110     case T_VOID:
 111       return ::type2char(t);
 112     case T_METADATA:
 113       return 'M';
 114     case T_ILLEGAL:
 115       return '?';
 116 
 117     default:
 118       ShouldNotReachHere();
 119       return '?';
 120   }
 121 }
 122 
 123 #ifndef PRODUCT
 124 void LIR_Opr::validate_type() const {
 125 
 126 #ifdef ASSERT
 127   if (!is_pointer() && !is_illegal()) {
 128     OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
 129     switch (as_BasicType(type_field())) {
 130     case T_LONG:
 131       assert((kindfield == cpu_register || kindfield == stack_value) &&
 132              size_field() == double_size, "must match");
 133       break;
 134     case T_FLOAT:
 135       // FP return values can be also in CPU registers on ARM (softfp ABI)
 136       assert((kindfield == fpu_register || kindfield == stack_value
 137              ARM_ONLY(|| kindfield == cpu_register) ) &&
 138              size_field() == single_size, "must match");
 139       break;
 140     case T_DOUBLE:
 141       // FP return values can be also in CPU registers on ARM (softfp ABI)
 142       assert((kindfield == fpu_register || kindfield == stack_value
 143              ARM_ONLY(|| kindfield == cpu_register) ) &&
 144              size_field() == double_size, "must match");
 145       break;
 146     case T_BOOLEAN:
 147     case T_CHAR:
 148     case T_BYTE:
 149     case T_SHORT:
 150     case T_INT:
 151     case T_ADDRESS:
 152     case T_OBJECT:
 153     case T_METADATA:
 154     case T_ARRAY:
 155       assert((kindfield == cpu_register || kindfield == stack_value) &&
 156              size_field() == single_size, "must match");
 157       break;
 158 
 159     case T_ILLEGAL:
 160       // XXX TKR also means unknown right now
 161       // assert(is_illegal(), "must match");
 162       break;
 163 
 164     default:
 165       ShouldNotReachHere();
 166     }
 167   }
 168 #endif
 169 
 170 }
 171 #endif // PRODUCT
 172 
 173 
 174 bool LIR_Opr::is_oop() const {
 175   if (is_pointer()) {
 176     return pointer()->is_oop_pointer();
 177   } else {
 178     OprType t= type_field();
 179     assert(t != unknown_type, "not set");
 180     return t == object_type;
 181   }
 182 }
 183 
 184 
 185 
 186 void LIR_Op2::verify() const {
 187 #ifdef ASSERT
 188   switch (code()) {
 189     case lir_xchg:
 190       break;
 191 
 192     default:
 193       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 194              "can't produce oops from arith");
 195   }
 196 
 197   if (two_operand_lir_form) {
 198 
 199 #ifdef ASSERT
 200     bool threeOperandForm = false;
 201 #ifdef S390
 202     // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
 203     threeOperandForm =
 204       code() == lir_shl ||
 205       ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
 206 #endif
 207 #endif
 208 
 209     switch (code()) {
 210     case lir_add:
 211     case lir_sub:
 212     case lir_mul:
 213     case lir_div:
 214     case lir_rem:
 215     case lir_logic_and:
 216     case lir_logic_or:
 217     case lir_logic_xor:
 218     case lir_shl:
 219     case lir_shr:
 220       assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
 221       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 222       break;
 223 
 224     // special handling for lir_ushr because of write barriers
 225     case lir_ushr:
 226       assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
 227       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 228       break;
 229 
 230     default:
 231       break;
 232     }
 233   }
 234 #endif
 235 }
 236 
 237 
 238 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
 239   : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
 240   , _label(block->label())
 241   , _block(block)
 242   , _ublock(nullptr)
 243   , _stub(nullptr) {
 244 }
 245 
 246 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
 247   LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
 248   , _label(stub->entry())
 249   , _block(nullptr)
 250   , _ublock(nullptr)
 251   , _stub(stub) {
 252 }
 253 
 254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
 255   : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
 256   , _label(block->label())
 257   , _block(block)
 258   , _ublock(ublock)
 259   , _stub(nullptr)
 260 {
 261 }
 262 
 263 void LIR_OpBranch::change_block(BlockBegin* b) {
 264   assert(_block != nullptr, "must have old block");
 265   assert(_block->label() == label(), "must be equal");
 266 
 267   _block = b;
 268   _label = b->label();
 269 }
 270 
 271 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 272   assert(_ublock != nullptr, "must have old block");
 273   _ublock = b;
 274 }
 275 
 276 void LIR_OpBranch::negate_cond() {
 277   switch (cond()) {
 278     case lir_cond_equal:        set_cond(lir_cond_notEqual);     break;
 279     case lir_cond_notEqual:     set_cond(lir_cond_equal);        break;
 280     case lir_cond_less:         set_cond(lir_cond_greaterEqual); break;
 281     case lir_cond_lessEqual:    set_cond(lir_cond_greater);      break;
 282     case lir_cond_greaterEqual: set_cond(lir_cond_less);         break;
 283     case lir_cond_greater:      set_cond(lir_cond_lessEqual);    break;
 284     default: ShouldNotReachHere();
 285   }
 286 }
 287 
 288 
 289 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 290                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 291                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 292                                  CodeStub* stub)
 293 
 294   : LIR_Op(code, result, nullptr)
 295   , _object(object)
 296   , _array(LIR_OprFact::illegalOpr)
 297   , _klass(klass)
 298   , _tmp1(tmp1)
 299   , _tmp2(tmp2)
 300   , _tmp3(tmp3)
 301   , _fast_check(fast_check)
 302   , _info_for_patch(info_for_patch)
 303   , _info_for_exception(info_for_exception)
 304   , _stub(stub)
 305   , _profiled_method(nullptr)
 306   , _profiled_bci(-1)
 307   , _should_profile(false)
 308 {
 309   if (code == lir_checkcast) {
 310     assert(info_for_exception != nullptr, "checkcast throws exceptions");
 311   } else if (code == lir_instanceof) {
 312     assert(info_for_exception == nullptr, "instanceof throws no exceptions");
 313   } else {
 314     ShouldNotReachHere();
 315   }
 316 }
 317 
 318 
 319 
 320 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 321   : LIR_Op(code, LIR_OprFact::illegalOpr, nullptr)
 322   , _object(object)
 323   , _array(array)
 324   , _klass(nullptr)
 325   , _tmp1(tmp1)
 326   , _tmp2(tmp2)
 327   , _tmp3(tmp3)
 328   , _fast_check(false)
 329   , _info_for_patch(nullptr)
 330   , _info_for_exception(info_for_exception)
 331   , _stub(nullptr)
 332   , _profiled_method(nullptr)
 333   , _profiled_bci(-1)
 334   , _should_profile(false)
 335 {
 336   if (code == lir_store_check) {
 337     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 338     assert(info_for_exception != nullptr, "store_check throws exceptions");
 339   } else {
 340     ShouldNotReachHere();
 341   }
 342 }
 343 
 344 
 345 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 346                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 347   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 348   , _src(src)
 349   , _src_pos(src_pos)
 350   , _dst(dst)
 351   , _dst_pos(dst_pos)
 352   , _length(length)
 353   , _tmp(tmp)
 354   , _expected_type(expected_type)
 355   , _flags(flags) {
 356   _stub = new ArrayCopyStub(this);
 357 }
 358 
 359 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
 360   : LIR_Op(lir_updatecrc32, res, nullptr)
 361   , _crc(crc)
 362   , _val(val) {
 363 }
 364 
 365 //-------------------verify--------------------------
 366 
 367 void LIR_Op1::verify() const {
 368   switch(code()) {
 369   case lir_move:
 370     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 371     break;
 372   case lir_null_check:
 373     assert(in_opr()->is_register(), "must be");
 374     break;
 375   case lir_return:
 376     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 377     break;
 378   default:
 379     break;
 380   }
 381 }
 382 
 383 void LIR_OpRTCall::verify() const {
 384   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 385 }
 386 
 387 //-------------------visits--------------------------
 388 
 389 // complete rework of LIR instruction visitor.
 390 // The virtual call for each instruction type is replaced by a big
 391 // switch that adds the operands for each instruction
 392 
 393 void LIR_OpVisitState::visit(LIR_Op* op) {
 394   // copy information from the LIR_Op
 395   reset();
 396   set_op(op);
 397 
 398   switch (op->code()) {
 399 
 400 // LIR_Op0
 401     case lir_fpop_raw:                 // result and info always invalid
 402     case lir_breakpoint:               // result and info always invalid
 403     case lir_membar:                   // result and info always invalid
 404     case lir_membar_acquire:           // result and info always invalid
 405     case lir_membar_release:           // result and info always invalid
 406     case lir_membar_loadload:          // result and info always invalid
 407     case lir_membar_storestore:        // result and info always invalid
 408     case lir_membar_loadstore:         // result and info always invalid
 409     case lir_membar_storeload:         // result and info always invalid
 410     case lir_on_spin_wait:
 411     {
 412       assert(op->as_Op0() != nullptr, "must be");
 413       assert(op->_info == nullptr, "info not used by this instruction");
 414       assert(op->_result->is_illegal(), "not used");
 415       break;
 416     }
 417 
 418     case lir_nop:                      // may have info, result always invalid
 419     case lir_std_entry:                // may have result, info always invalid
 420     case lir_osr_entry:                // may have result, info always invalid
 421     case lir_get_thread:               // may have result, info always invalid
 422     {
 423       assert(op->as_Op0() != nullptr, "must be");
 424       if (op->_info != nullptr)           do_info(op->_info);
 425       if (op->_result->is_valid())     do_output(op->_result);
 426       break;
 427     }
 428 
 429 
 430 // LIR_OpLabel
 431     case lir_label:                    // result and info always invalid
 432     {
 433       assert(op->as_OpLabel() != nullptr, "must be");
 434       assert(op->_info == nullptr, "info not used by this instruction");
 435       assert(op->_result->is_illegal(), "not used");
 436       break;
 437     }
 438 
 439 
 440 // LIR_Op1
 441     case lir_fxch:           // input always valid, result and info always invalid
 442     case lir_fld:            // input always valid, result and info always invalid
 443     case lir_push:           // input always valid, result and info always invalid
 444     case lir_pop:            // input always valid, result and info always invalid
 445     case lir_leal:           // input and result always valid, info always invalid
 446     case lir_monaddr:        // input and result always valid, info always invalid
 447     case lir_null_check:     // input and info always valid, result always invalid
 448     case lir_move:           // input and result always valid, may have info
 449     {
 450       assert(op->as_Op1() != nullptr, "must be");
 451       LIR_Op1* op1 = (LIR_Op1*)op;
 452 
 453       if (op1->_info)                  do_info(op1->_info);
 454       if (op1->_opr->is_valid())       do_input(op1->_opr);
 455       if (op1->_result->is_valid())    do_output(op1->_result);
 456 
 457       break;
 458     }
 459 
 460     case lir_return:
 461     {
 462       assert(op->as_OpReturn() != nullptr, "must be");
 463       LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
 464 
 465       if (op_ret->_info)               do_info(op_ret->_info);
 466       if (op_ret->_opr->is_valid())    do_input(op_ret->_opr);
 467       if (op_ret->_result->is_valid()) do_output(op_ret->_result);
 468       if (op_ret->stub() != nullptr)      do_stub(op_ret->stub());
 469 
 470       break;
 471     }
 472 
 473     case lir_safepoint:
 474     {
 475       assert(op->as_Op1() != nullptr, "must be");
 476       LIR_Op1* op1 = (LIR_Op1*)op;
 477 
 478       assert(op1->_info != nullptr, "");  do_info(op1->_info);
 479       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 480       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 481 
 482       break;
 483     }
 484 
 485 // LIR_OpConvert;
 486     case lir_convert:        // input and result always valid, info always invalid
 487     {
 488       assert(op->as_OpConvert() != nullptr, "must be");
 489       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 490 
 491       assert(opConvert->_info == nullptr, "must be");
 492       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 493       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 494       do_stub(opConvert->_stub);
 495 
 496       break;
 497     }
 498 
 499 // LIR_OpBranch;
 500     case lir_branch:                   // may have info, input and result register always invalid
 501     case lir_cond_float_branch:        // may have info, input and result register always invalid
 502     {
 503       assert(op->as_OpBranch() != nullptr, "must be");
 504       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 505 
 506       assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() &&
 507              opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() &&
 508              opBranch->_tmp5->is_illegal(), "not used");
 509 
 510       if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1);
 511       if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2);
 512 
 513       if (opBranch->_info != nullptr)  do_info(opBranch->_info);
 514       assert(opBranch->_result->is_illegal(), "not used");
 515       if (opBranch->_stub != nullptr)  opBranch->stub()->visit(this);
 516 
 517       break;
 518     }
 519 
 520 
 521 // LIR_OpAllocObj
 522     case lir_alloc_object:
 523     {
 524       assert(op->as_OpAllocObj() != nullptr, "must be");
 525       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 526 
 527       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 528       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 529                                                  do_temp(opAllocObj->_opr);
 530                                         }
 531       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 532       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 533       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 534       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 535       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 536       if (opAllocObj->_stub != nullptr)          do_stub(opAllocObj->_stub);
 537       break;
 538     }
 539 
 540 
 541 // LIR_OpRoundFP;
 542     case lir_roundfp: {
 543       assert(op->as_OpRoundFP() != nullptr, "must be");
 544       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 545 
 546       assert(op->_info == nullptr, "info not used by this instruction");
 547       assert(opRoundFP->_tmp->is_illegal(), "not used");
 548       do_input(opRoundFP->_opr);
 549       do_output(opRoundFP->_result);
 550 
 551       break;
 552     }
 553 
 554 
 555 // LIR_Op2
 556     case lir_cmp:
 557     case lir_cmp_l2i:
 558     case lir_ucmp_fd2i:
 559     case lir_cmp_fd2i:
 560     case lir_add:
 561     case lir_sub:
 562     case lir_rem:
 563     case lir_sqrt:
 564     case lir_abs:
 565     case lir_neg:
 566     case lir_f2hf:
 567     case lir_hf2f:
 568     case lir_logic_and:
 569     case lir_logic_or:
 570     case lir_logic_xor:
 571     case lir_shl:
 572     case lir_shr:
 573     case lir_ushr:
 574     case lir_xadd:
 575     case lir_xchg:
 576     case lir_assert:
 577     {
 578       assert(op->as_Op2() != nullptr, "must be");
 579       LIR_Op2* op2 = (LIR_Op2*)op;
 580       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 581              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 582 
 583       if (op2->_info)                     do_info(op2->_info);
 584       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 585       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 586       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 587       if (op2->_result->is_valid())       do_output(op2->_result);
 588       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 589         // on ARM and PPC, return value is loaded first so could
 590         // destroy inputs. On other platforms that implement those
 591         // (x86, sparc), the extra constrainsts are harmless.
 592         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 593         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 594       }
 595 
 596       break;
 597     }
 598 
 599     // special handling for cmove: right input operand must not be equal
 600     // to the result operand, otherwise the backend fails
 601     case lir_cmove:
 602     {
 603       assert(op->as_Op4() != nullptr, "must be");
 604       LIR_Op4* op4 = (LIR_Op4*)op;
 605 
 606       assert(op4->_info == nullptr && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() &&
 607              op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used");
 608       assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used");
 609 
 610       do_input(op4->_opr1);
 611       do_input(op4->_opr2);
 612       if (op4->_opr3->is_valid()) do_input(op4->_opr3);
 613       if (op4->_opr4->is_valid()) do_input(op4->_opr4);
 614       do_temp(op4->_opr2);
 615       do_output(op4->_result);
 616 
 617       break;
 618     }
 619 
 620     // vspecial handling for strict operations: register input operands
 621     // as temp to guarantee that they do not overlap with other
 622     // registers
 623     case lir_mul:
 624     case lir_div:
 625     {
 626       assert(op->as_Op2() != nullptr, "must be");
 627       LIR_Op2* op2 = (LIR_Op2*)op;
 628 
 629       assert(op2->_info == nullptr, "not used");
 630       assert(op2->_opr1->is_valid(), "used");
 631       assert(op2->_opr2->is_valid(), "used");
 632       assert(op2->_result->is_valid(), "used");
 633       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 634              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 635 
 636       do_input(op2->_opr1); do_temp(op2->_opr1);
 637       do_input(op2->_opr2); do_temp(op2->_opr2);
 638       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 639       do_output(op2->_result);
 640 
 641       break;
 642     }
 643 
 644     case lir_throw: {
 645       assert(op->as_Op2() != nullptr, "must be");
 646       LIR_Op2* op2 = (LIR_Op2*)op;
 647 
 648       if (op2->_info)                     do_info(op2->_info);
 649       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 650       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 651       assert(op2->_result->is_illegal(), "no result");
 652       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 653              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 654 
 655       break;
 656     }
 657 
 658     case lir_unwind: {
 659       assert(op->as_Op1() != nullptr, "must be");
 660       LIR_Op1* op1 = (LIR_Op1*)op;
 661 
 662       assert(op1->_info == nullptr, "no info");
 663       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 664       assert(op1->_result->is_illegal(), "no result");
 665 
 666       break;
 667     }
 668 
 669 // LIR_Op3
 670     case lir_idiv:
 671     case lir_irem: {
 672       assert(op->as_Op3() != nullptr, "must be");
 673       LIR_Op3* op3= (LIR_Op3*)op;
 674 
 675       if (op3->_info)                     do_info(op3->_info);
 676       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 677 
 678       // second operand is input and temp, so ensure that second operand
 679       // and third operand get not the same register
 680       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 681       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 682       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 683 
 684       if (op3->_result->is_valid())       do_output(op3->_result);
 685 
 686       break;
 687     }
 688 
 689     case lir_fmad:
 690     case lir_fmaf: {
 691       assert(op->as_Op3() != nullptr, "must be");
 692       LIR_Op3* op3= (LIR_Op3*)op;
 693       assert(op3->_info == nullptr, "no info");
 694       do_input(op3->_opr1);
 695       do_input(op3->_opr2);
 696       do_input(op3->_opr3);
 697       do_output(op3->_result);
 698       break;
 699     }
 700 
 701 // LIR_OpJavaCall
 702     case lir_static_call:
 703     case lir_optvirtual_call:
 704     case lir_icvirtual_call:
 705     case lir_dynamic_call: {
 706       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 707       assert(opJavaCall != nullptr, "must be");
 708 
 709       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 710 
 711       // only visit register parameters
 712       int n = opJavaCall->_arguments->length();
 713       for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
 714         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 715           do_input(*opJavaCall->_arguments->adr_at(i));
 716         }
 717       }
 718 
 719       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 720       if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
 721           opJavaCall->is_method_handle_invoke()) {
 722         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 723         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 724       }
 725       do_call();
 726       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 727 
 728       break;
 729     }
 730 
 731 
 732 // LIR_OpRTCall
 733     case lir_rtcall: {
 734       assert(op->as_OpRTCall() != nullptr, "must be");
 735       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 736 
 737       // only visit register parameters
 738       int n = opRTCall->_arguments->length();
 739       for (int i = 0; i < n; i++) {
 740         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 741           do_input(*opRTCall->_arguments->adr_at(i));
 742         }
 743       }
 744       if (opRTCall->_info)                     do_info(opRTCall->_info);
 745       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 746       do_call();
 747       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 748 
 749       break;
 750     }
 751 
 752 
 753 // LIR_OpArrayCopy
 754     case lir_arraycopy: {
 755       assert(op->as_OpArrayCopy() != nullptr, "must be");
 756       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 757 
 758       assert(opArrayCopy->_result->is_illegal(), "unused");
 759       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 760       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 761       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 762       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 763       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 764       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 765       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 766 
 767       // the implementation of arraycopy always has a call into the runtime
 768       do_call();
 769 
 770       break;
 771     }
 772 
 773 
 774 // LIR_OpUpdateCRC32
 775     case lir_updatecrc32: {
 776       assert(op->as_OpUpdateCRC32() != nullptr, "must be");
 777       LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
 778 
 779       assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
 780       assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
 781       assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
 782       assert(opUp->_info == nullptr, "no info for LIR_OpUpdateCRC32");
 783 
 784       break;
 785     }
 786 
 787 
 788 // LIR_OpLock
 789     case lir_lock:
 790     case lir_unlock: {
 791       assert(op->as_OpLock() != nullptr, "must be");
 792       LIR_OpLock* opLock = (LIR_OpLock*)op;
 793 
 794       if (opLock->_info)                          do_info(opLock->_info);
 795 
 796       // TODO: check if these operands really have to be temp
 797       // (or if input is sufficient). This may have influence on the oop map!
 798       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 799       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 800       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 801 
 802       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 803       assert(opLock->_result->is_illegal(), "unused");
 804 
 805       do_stub(opLock->_stub);
 806 
 807       break;
 808     }
 809 
 810 
 811 // LIR_OpDelay
 812     case lir_delay_slot: {
 813       assert(op->as_OpDelay() != nullptr, "must be");
 814       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 815 
 816       visit(opDelay->delay_op());
 817       break;
 818     }
 819 
 820 // LIR_OpTypeCheck
 821     case lir_instanceof:
 822     case lir_checkcast:
 823     case lir_store_check: {
 824       assert(op->as_OpTypeCheck() != nullptr, "must be");
 825       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 826 
 827       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 828       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 829       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 830       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 831         do_temp(opTypeCheck->_object);
 832       }
 833       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 834       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 835       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 836       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 837       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 838       if (opTypeCheck->_stub != nullptr)          do_stub(opTypeCheck->_stub);
 839       break;
 840     }
 841 
 842 // LIR_OpCompareAndSwap
 843     case lir_cas_long:
 844     case lir_cas_obj:
 845     case lir_cas_int: {
 846       assert(op->as_OpCompareAndSwap() != nullptr, "must be");
 847       LIR_OpCompareAndSwap* opCmpAndSwap = (LIR_OpCompareAndSwap*)op;
 848 
 849       if (opCmpAndSwap->_info)                              do_info(opCmpAndSwap->_info);
 850       assert(opCmpAndSwap->_addr->is_valid(), "used");      do_input(opCmpAndSwap->_addr);
 851                                                             do_temp(opCmpAndSwap->_addr);
 852       assert(opCmpAndSwap->_cmp_value->is_valid(), "used"); do_input(opCmpAndSwap->_cmp_value);
 853                                                             do_temp(opCmpAndSwap->_cmp_value);
 854       assert(opCmpAndSwap->_new_value->is_valid(), "used"); do_input(opCmpAndSwap->_new_value);
 855                                                             do_temp(opCmpAndSwap->_new_value);
 856       if (opCmpAndSwap->_tmp1->is_valid())                  do_temp(opCmpAndSwap->_tmp1);
 857       if (opCmpAndSwap->_tmp2->is_valid())                  do_temp(opCmpAndSwap->_tmp2);
 858       if (opCmpAndSwap->_result->is_valid())                do_output(opCmpAndSwap->_result);
 859 
 860       break;
 861     }
 862 
 863 
 864 // LIR_OpAllocArray;
 865     case lir_alloc_array: {
 866       assert(op->as_OpAllocArray() != nullptr, "must be");
 867       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 868 
 869       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 870       if (opAllocArray->_klass->is_valid()) {         do_input(opAllocArray->_klass);
 871                                                       do_temp(opAllocArray->_klass);
 872                                             }
 873       if (opAllocArray->_len->is_valid())   {         do_input(opAllocArray->_len);
 874                                                       do_temp(opAllocArray->_len);
 875                                             }
 876       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 877       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 878       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 879       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 880       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 881       if (opAllocArray->_stub != nullptr)             do_stub(opAllocArray->_stub);
 882       break;
 883     }
 884 
 885 // LIR_OpLoadKlass
 886     case lir_load_klass:
 887     {
 888       LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass();
 889       assert(opLoadKlass != nullptr, "must be");
 890 
 891       do_input(opLoadKlass->_obj);
 892       do_output(opLoadKlass->_result);
 893       if (opLoadKlass->_stub) do_stub(opLoadKlass->_stub);
 894       if (opLoadKlass->_info) do_info(opLoadKlass->_info);
 895       break;
 896     }
 897 
 898 
 899 // LIR_OpProfileCall:
 900     case lir_profile_call: {
 901       assert(op->as_OpProfileCall() != nullptr, "must be");
 902       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 903 
 904       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 905       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 906       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 907       break;
 908     }
 909 
 910 // LIR_OpProfileType:
 911     case lir_profile_type: {
 912       assert(op->as_OpProfileType() != nullptr, "must be");
 913       LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
 914 
 915       do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
 916       do_input(opProfileType->_obj);
 917       do_temp(opProfileType->_tmp);
 918       break;
 919     }
 920   default:
 921     op->visit(this);
 922   }
 923 }
 924 
 925 void LIR_Op::visit(LIR_OpVisitState* state) {
 926   ShouldNotReachHere();
 927 }
 928 
 929 void LIR_OpVisitState::do_stub(CodeStub* stub) {
 930   if (stub != nullptr) {
 931     stub->visit(this);
 932   }
 933 }
 934 
 935 XHandlers* LIR_OpVisitState::all_xhandler() {
 936   XHandlers* result = nullptr;
 937 
 938   int i;
 939   for (i = 0; i < info_count(); i++) {
 940     if (info_at(i)->exception_handlers() != nullptr) {
 941       result = info_at(i)->exception_handlers();
 942       break;
 943     }
 944   }
 945 
 946 #ifdef ASSERT
 947   for (i = 0; i < info_count(); i++) {
 948     assert(info_at(i)->exception_handlers() == nullptr ||
 949            info_at(i)->exception_handlers() == result,
 950            "only one xhandler list allowed per LIR-operation");
 951   }
 952 #endif
 953 
 954   if (result != nullptr) {
 955     return result;
 956   } else {
 957     return new XHandlers();
 958   }
 959 
 960   return result;
 961 }
 962 
 963 
 964 #ifdef ASSERT
 965 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
 966   visit(op);
 967 
 968   return opr_count(inputMode) == 0 &&
 969          opr_count(outputMode) == 0 &&
 970          opr_count(tempMode) == 0 &&
 971          info_count() == 0 &&
 972          !has_call() &&
 973          !has_slow_case();
 974 }
 975 #endif
 976 
 977 // LIR_OpReturn
 978 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
 979     LIR_Op1(lir_return, opr, (CodeEmitInfo*)nullptr /* info */),
 980     _stub(nullptr) {
 981   if (VM_Version::supports_stack_watermark_barrier()) {
 982     _stub = new C1SafepointPollStub();
 983   }
 984 }
 985 
 986 //---------------------------------------------------
 987 
 988 
 989 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
 990   masm->emit_call(this);
 991 }
 992 
 993 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
 994   masm->emit_rtcall(this);
 995 }
 996 
 997 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
 998   masm->emit_opLabel(this);
 999 }
1000 
1001 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1002   masm->emit_arraycopy(this);
1003   masm->append_code_stub(stub());
1004 }
1005 
1006 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1007   masm->emit_updatecrc32(this);
1008 }
1009 
1010 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1011   masm->emit_op0(this);
1012 }
1013 
1014 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1015   masm->emit_op1(this);
1016 }
1017 
1018 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1019   masm->emit_alloc_obj(this);
1020   masm->append_code_stub(stub());
1021 }
1022 
1023 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1024   masm->emit_opBranch(this);
1025   if (stub()) {
1026     masm->append_code_stub(stub());
1027   }
1028 }
1029 
1030 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1031   masm->emit_opConvert(this);
1032   if (stub() != nullptr) {
1033     masm->append_code_stub(stub());
1034   }
1035 }
1036 
1037 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1038   masm->emit_op2(this);
1039 }
1040 
1041 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1042   masm->emit_alloc_array(this);
1043   masm->append_code_stub(stub());
1044 }
1045 
1046 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1047   masm->emit_opTypeCheck(this);
1048   if (stub()) {
1049     masm->append_code_stub(stub());
1050   }
1051 }
1052 
1053 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1054   masm->emit_compare_and_swap(this);
1055 }
1056 
1057 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1058   masm->emit_op3(this);
1059 }
1060 
1061 void LIR_Op4::emit_code(LIR_Assembler* masm) {
1062   masm->emit_op4(this);
1063 }
1064 
1065 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1066   masm->emit_lock(this);
1067   if (stub()) {
1068     masm->append_code_stub(stub());
1069   }
1070 }
1071 
1072 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1073   masm->emit_load_klass(this);
1074   if (stub()) {
1075     masm->append_code_stub(stub());
1076   }
1077 }
1078 
1079 #ifdef ASSERT
1080 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1081   masm->emit_assert(this);
1082 }
1083 #endif
1084 
1085 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1086   masm->emit_delay(this);
1087 }
1088 
1089 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1090   masm->emit_profile_call(this);
1091 }
1092 
1093 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1094   masm->emit_profile_type(this);
1095 }
1096 
1097 // LIR_List
1098 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1099   : _operations(8)
1100   , _compilation(compilation)
1101 #ifndef PRODUCT
1102   , _block(block)
1103 #endif
1104 #ifdef ASSERT
1105   , _file(nullptr)
1106   , _line(0)
1107 #endif
1108 #ifdef RISCV
1109   , _cmp_opr1(LIR_OprFact::illegalOpr)
1110   , _cmp_opr2(LIR_OprFact::illegalOpr)
1111 #endif
1112 { }
1113 
1114 
1115 #ifdef ASSERT
1116 void LIR_List::set_file_and_line(const char * file, int line) {
1117   const char * f = strrchr(file, '/');
1118   if (f == nullptr) f = strrchr(file, '\\');
1119   if (f == nullptr) {
1120     f = file;
1121   } else {
1122     f++;
1123   }
1124   _file = f;
1125   _line = line;
1126 }
1127 #endif
1128 
1129 #ifdef RISCV
1130 void LIR_List::set_cmp_oprs(LIR_Op* op) {
1131   switch (op->code()) {
1132     case lir_cmp:
1133       _cmp_opr1 = op->as_Op2()->in_opr1();
1134       _cmp_opr2 = op->as_Op2()->in_opr2();
1135       break;
1136     case lir_branch: // fall through
1137     case lir_cond_float_branch:
1138       assert(op->as_OpBranch()->cond() == lir_cond_always ||
1139             (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
1140             "conditional branches must have legal operands");
1141       if (op->as_OpBranch()->cond() != lir_cond_always) {
1142         op->as_Op2()->set_in_opr1(_cmp_opr1);
1143         op->as_Op2()->set_in_opr2(_cmp_opr2);
1144       }
1145       break;
1146     case lir_cmove:
1147       op->as_Op4()->set_in_opr3(_cmp_opr1);
1148       op->as_Op4()->set_in_opr4(_cmp_opr2);
1149       break;
1150     case lir_cas_long:
1151     case lir_cas_obj:
1152     case lir_cas_int:
1153       _cmp_opr1 = op->as_OpCompareAndSwap()->result_opr();
1154       _cmp_opr2 = LIR_OprFact::intConst(0);
1155       break;
1156 #if INCLUDE_ZGC
1157     case lir_xloadbarrier_test:
1158       _cmp_opr1 = FrameMap::as_opr(t1);
1159       _cmp_opr2 = LIR_OprFact::intConst(0);
1160       break;
1161 #endif
1162     default:
1163       break;
1164   }
1165 }
1166 #endif
1167 
1168 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1169   assert(this == buffer->lir_list(), "wrong lir list");
1170   const int n = _operations.length();
1171 
1172   if (buffer->number_of_ops() > 0) {
1173     // increase size of instructions list
1174     _operations.at_grow(n + buffer->number_of_ops() - 1, nullptr);
1175     // insert ops from buffer into instructions list
1176     int op_index = buffer->number_of_ops() - 1;
1177     int ip_index = buffer->number_of_insertion_points() - 1;
1178     int from_index = n - 1;
1179     int to_index = _operations.length() - 1;
1180     for (; ip_index >= 0; ip_index --) {
1181       int index = buffer->index_at(ip_index);
1182       // make room after insertion point
1183       while (index < from_index) {
1184         _operations.at_put(to_index --, _operations.at(from_index --));
1185       }
1186       // insert ops from buffer
1187       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1188         _operations.at_put(to_index --, buffer->op_at(op_index --));
1189       }
1190     }
1191   }
1192 
1193   buffer->finish();
1194 }
1195 
1196 
1197 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1198   assert(reg->type() == T_OBJECT, "bad reg");
1199   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1200 }
1201 
1202 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1203   assert(reg->type() == T_METADATA, "bad reg");
1204   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1205 }
1206 
1207 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1208   append(new LIR_Op1(
1209             lir_move,
1210             LIR_OprFact::address(addr),
1211             src,
1212             addr->type(),
1213             patch_code,
1214             info));
1215 }
1216 
1217 
1218 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1219   append(new LIR_Op1(
1220             lir_move,
1221             LIR_OprFact::address(address),
1222             dst,
1223             address->type(),
1224             patch_code,
1225             info, lir_move_volatile));
1226 }
1227 
1228 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1229   append(new LIR_Op1(
1230             lir_move,
1231             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1232             dst,
1233             type,
1234             patch_code,
1235             info, lir_move_volatile));
1236 }
1237 
1238 
1239 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1240   append(new LIR_Op1(
1241             lir_move,
1242             LIR_OprFact::intConst(v),
1243             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1244             type,
1245             patch_code,
1246             info));
1247 }
1248 
1249 
1250 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1251   append(new LIR_Op1(
1252             lir_move,
1253             LIR_OprFact::oopConst(o),
1254             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1255             type,
1256             patch_code,
1257             info));
1258 }
1259 
1260 
1261 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1262   append(new LIR_Op1(
1263             lir_move,
1264             src,
1265             LIR_OprFact::address(addr),
1266             addr->type(),
1267             patch_code,
1268             info));
1269 }
1270 
1271 
1272 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1273   append(new LIR_Op1(
1274             lir_move,
1275             src,
1276             LIR_OprFact::address(addr),
1277             addr->type(),
1278             patch_code,
1279             info,
1280             lir_move_volatile));
1281 }
1282 
1283 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1284   append(new LIR_Op1(
1285             lir_move,
1286             src,
1287             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1288             type,
1289             patch_code,
1290             info, lir_move_volatile));
1291 }
1292 
1293 
1294 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1295   append(new LIR_Op3(
1296                     lir_idiv,
1297                     left,
1298                     right,
1299                     tmp,
1300                     res,
1301                     info));
1302 }
1303 
1304 
1305 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1306   append(new LIR_Op3(
1307                     lir_idiv,
1308                     left,
1309                     LIR_OprFact::intConst(right),
1310                     tmp,
1311                     res,
1312                     info));
1313 }
1314 
1315 
1316 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1317   append(new LIR_Op3(
1318                     lir_irem,
1319                     left,
1320                     right,
1321                     tmp,
1322                     res,
1323                     info));
1324 }
1325 
1326 
1327 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1328   append(new LIR_Op3(
1329                     lir_irem,
1330                     left,
1331                     LIR_OprFact::intConst(right),
1332                     tmp,
1333                     res,
1334                     info));
1335 }
1336 
1337 
1338 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1339   append(new LIR_Op2(
1340                     lir_cmp,
1341                     condition,
1342                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1343                     LIR_OprFact::intConst(c),
1344                     info));
1345 }
1346 
1347 
1348 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1349   append(new LIR_Op2(
1350                     lir_cmp,
1351                     condition,
1352                     reg,
1353                     LIR_OprFact::address(addr),
1354                     info));
1355 }
1356 
1357 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1358                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1359   append(new LIR_OpAllocObj(
1360                            klass,
1361                            dst,
1362                            t1,
1363                            t2,
1364                            t3,
1365                            t4,
1366                            header_size,
1367                            object_size,
1368                            init_check,
1369                            stub));
1370 }
1371 
1372 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1373   append(new LIR_OpAllocArray(
1374                            klass,
1375                            len,
1376                            dst,
1377                            t1,
1378                            t2,
1379                            t3,
1380                            t4,
1381                            type,
1382                            stub));
1383 }
1384 
1385 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1386  append(new LIR_Op2(
1387                     lir_shl,
1388                     value,
1389                     count,
1390                     dst,
1391                     tmp));
1392 }
1393 
1394 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1395  append(new LIR_Op2(
1396                     lir_shr,
1397                     value,
1398                     count,
1399                     dst,
1400                     tmp));
1401 }
1402 
1403 
1404 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1405  append(new LIR_Op2(
1406                     lir_ushr,
1407                     value,
1408                     count,
1409                     dst,
1410                     tmp));
1411 }
1412 
1413 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1414   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1415                      left,
1416                      right,
1417                      dst));
1418 }
1419 
1420 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1421   append(new LIR_OpLock(
1422                     lir_lock,
1423                     hdr,
1424                     obj,
1425                     lock,
1426                     scratch,
1427                     stub,
1428                     info));
1429 }
1430 
1431 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1432   append(new LIR_OpLock(
1433                     lir_unlock,
1434                     hdr,
1435                     obj,
1436                     lock,
1437                     scratch,
1438                     stub,
1439                     nullptr));
1440 }
1441 
1442 
1443 void check_LIR() {
1444   // cannot do the proper checking as PRODUCT and other modes return different results
1445   // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table");
1446 }
1447 
1448 
1449 
1450 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1451                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1452                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1453                           ciMethod* profiled_method, int profiled_bci) {
1454   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1455                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1456   if (profiled_method != nullptr) {
1457     c->set_profiled_method(profiled_method);
1458     c->set_profiled_bci(profiled_bci);
1459     c->set_should_profile(true);
1460   }
1461   append(c);
1462 }
1463 
1464 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1465   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, nullptr, info_for_patch, nullptr);
1466   if (profiled_method != nullptr) {
1467     c->set_profiled_method(profiled_method);
1468     c->set_profiled_bci(profiled_bci);
1469     c->set_should_profile(true);
1470   }
1471   append(c);
1472 }
1473 
1474 
1475 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1476                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1477   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1478   if (profiled_method != nullptr) {
1479     c->set_profiled_method(profiled_method);
1480     c->set_profiled_bci(profiled_bci);
1481     c->set_should_profile(true);
1482   }
1483   append(c);
1484 }
1485 
1486 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1487   if (deoptimize_on_null) {
1488     // Emit an explicit null check and deoptimize if opr is null
1489     CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1490     cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(nullptr));
1491     branch(lir_cond_equal, deopt);
1492   } else {
1493     // Emit an implicit null check
1494     append(new LIR_Op1(lir_null_check, opr, info));
1495   }
1496 }
1497 
1498 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1499                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1500   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1501 }
1502 
1503 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1504                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1505   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1506 }
1507 
1508 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1509                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1510   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1511 }
1512 
1513 
1514 #ifdef PRODUCT
1515 
1516 void print_LIR(BlockList* blocks) {
1517 }
1518 
1519 #else
1520 // LIR_Opr
1521 void LIR_Opr::print() const {
1522   print(tty);
1523 }
1524 
1525 void LIR_Opr::print(outputStream* out) const {
1526   if (is_illegal()) {
1527     return;
1528   }
1529 
1530   out->print("[");
1531   if (is_pointer()) {
1532     pointer()->print_value_on(out);
1533   } else if (is_single_stack()) {
1534     out->print("stack:%d", single_stack_ix());
1535   } else if (is_double_stack()) {
1536     out->print("dbl_stack:%d",double_stack_ix());
1537   } else if (is_virtual()) {
1538     out->print("R%d", vreg_number());
1539   } else if (is_single_cpu()) {
1540     out->print("%s", as_register()->name());
1541   } else if (is_double_cpu()) {
1542     out->print("%s", as_register_hi()->name());
1543     out->print("%s", as_register_lo()->name());
1544 #if defined(X86)
1545   } else if (is_single_xmm()) {
1546     out->print("%s", as_xmm_float_reg()->name());
1547   } else if (is_double_xmm()) {
1548     out->print("%s", as_xmm_double_reg()->name());
1549   } else if (is_single_fpu()) {
1550     out->print("fpu%d", fpu_regnr());
1551   } else if (is_double_fpu()) {
1552     out->print("fpu%d", fpu_regnrLo());
1553 #elif defined(AARCH64)
1554   } else if (is_single_fpu()) {
1555     out->print("fpu%d", fpu_regnr());
1556   } else if (is_double_fpu()) {
1557     out->print("fpu%d", fpu_regnrLo());
1558 #elif defined(ARM)
1559   } else if (is_single_fpu()) {
1560     out->print("s%d", fpu_regnr());
1561   } else if (is_double_fpu()) {
1562     out->print("d%d", fpu_regnrLo() >> 1);
1563 #else
1564   } else if (is_single_fpu()) {
1565     out->print("%s", as_float_reg()->name());
1566   } else if (is_double_fpu()) {
1567     out->print("%s", as_double_reg()->name());
1568 #endif
1569 
1570   } else if (is_illegal()) {
1571     out->print("-");
1572   } else {
1573     out->print("Unknown Operand");
1574   }
1575   if (!is_illegal()) {
1576     out->print("|%c", type_char());
1577   }
1578   if (is_register() && is_last_use()) {
1579     out->print("(last_use)");
1580   }
1581   out->print("]");
1582 }
1583 
1584 
1585 // LIR_Address
1586 void LIR_Const::print_value_on(outputStream* out) const {
1587   switch (type()) {
1588     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1589     case T_INT:    out->print("int:%d",   as_jint());           break;
1590     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1591     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1592     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1593     case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
1594     case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1595     default:       out->print("%3d:" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1596   }
1597 }
1598 
1599 // LIR_Address
1600 void LIR_Address::print_value_on(outputStream* out) const {
1601   out->print("Base:"); _base->print(out);
1602   if (!_index->is_illegal()) {
1603     out->print(" Index:"); _index->print(out);
1604     switch (scale()) {
1605     case times_1: break;
1606     case times_2: out->print(" * 2"); break;
1607     case times_4: out->print(" * 4"); break;
1608     case times_8: out->print(" * 8"); break;
1609     }
1610   }
1611   out->print(" Disp: " INTX_FORMAT, _disp);
1612 }
1613 
1614 // debug output of block header without InstructionPrinter
1615 //       (because phi functions are not necessary for LIR)
1616 static void print_block(BlockBegin* x) {
1617   // print block id
1618   BlockEnd* end = x->end();
1619   tty->print("B%d ", x->block_id());
1620 
1621   // print flags
1622   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1623   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1624   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1625   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1626   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1627   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1628   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1629 
1630   // print block bci range
1631   tty->print("[%d, %d] ", x->bci(), (end == nullptr ? -1 : end->printable_bci()));
1632 
1633   // print predecessors and successors
1634   if (x->number_of_preds() > 0) {
1635     tty->print("preds: ");
1636     for (int i = 0; i < x->number_of_preds(); i ++) {
1637       tty->print("B%d ", x->pred_at(i)->block_id());
1638     }
1639   }
1640 
1641   if (end != nullptr && x->number_of_sux() > 0) {
1642     tty->print("sux: ");
1643     for (int i = 0; i < x->number_of_sux(); i ++) {
1644       tty->print("B%d ", x->sux_at(i)->block_id());
1645     }
1646   }
1647 
1648   // print exception handlers
1649   if (x->number_of_exception_handlers() > 0) {
1650     tty->print("xhandler: ");
1651     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1652       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1653     }
1654   }
1655 
1656   tty->cr();
1657 }
1658 
1659 void print_LIR(BlockList* blocks) {
1660   tty->print_cr("LIR:");
1661   int i;
1662   for (i = 0; i < blocks->length(); i++) {
1663     BlockBegin* bb = blocks->at(i);
1664     print_block(bb);
1665     tty->print("__id_Instruction___________________________________________"); tty->cr();
1666     bb->lir()->print_instructions();
1667   }
1668 }
1669 
1670 void LIR_List::print_instructions() {
1671   for (int i = 0; i < _operations.length(); i++) {
1672     _operations.at(i)->print(); tty->cr();
1673   }
1674   tty->cr();
1675 }
1676 
1677 // LIR_Ops printing routines
1678 // LIR_Op
1679 void LIR_Op::print_on(outputStream* out) const {
1680   if (id() != -1 || PrintCFGToFile) {
1681     out->print("%4d ", id());
1682   } else {
1683     out->print("     ");
1684   }
1685   out->print("%s ", name());
1686   print_instr(out);
1687   if (info() != nullptr) out->print(" [bci:%d]", info()->stack()->bci());
1688 #ifdef ASSERT
1689   if (Verbose && _file != nullptr) {
1690     out->print(" (%s:%d)", _file, _line);
1691   }
1692 #endif
1693 }
1694 
1695 const char * LIR_Op::name() const {
1696   const char* s = nullptr;
1697   switch(code()) {
1698      // LIR_Op0
1699      case lir_membar:                s = "membar";        break;
1700      case lir_membar_acquire:        s = "membar_acquire"; break;
1701      case lir_membar_release:        s = "membar_release"; break;
1702      case lir_membar_loadload:       s = "membar_loadload";   break;
1703      case lir_membar_storestore:     s = "membar_storestore"; break;
1704      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1705      case lir_membar_storeload:      s = "membar_storeload";  break;
1706      case lir_label:                 s = "label";         break;
1707      case lir_nop:                   s = "nop";           break;
1708      case lir_on_spin_wait:          s = "on_spin_wait";  break;
1709      case lir_std_entry:             s = "std_entry";     break;
1710      case lir_osr_entry:             s = "osr_entry";     break;
1711      case lir_fpop_raw:              s = "fpop_raw";      break;
1712      case lir_breakpoint:            s = "breakpoint";    break;
1713      case lir_get_thread:            s = "get_thread";    break;
1714      // LIR_Op1
1715      case lir_fxch:                  s = "fxch";          break;
1716      case lir_fld:                   s = "fld";           break;
1717      case lir_push:                  s = "push";          break;
1718      case lir_pop:                   s = "pop";           break;
1719      case lir_null_check:            s = "null_check";    break;
1720      case lir_return:                s = "return";        break;
1721      case lir_safepoint:             s = "safepoint";     break;
1722      case lir_leal:                  s = "leal";          break;
1723      case lir_branch:                s = "branch";        break;
1724      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1725      case lir_move:                  s = "move";          break;
1726      case lir_roundfp:               s = "roundfp";       break;
1727      case lir_rtcall:                s = "rtcall";        break;
1728      case lir_throw:                 s = "throw";         break;
1729      case lir_unwind:                s = "unwind";        break;
1730      case lir_convert:               s = "convert";       break;
1731      case lir_alloc_object:          s = "alloc_obj";     break;
1732      case lir_monaddr:               s = "mon_addr";      break;
1733      // LIR_Op2
1734      case lir_cmp:                   s = "cmp";           break;
1735      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1736      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1737      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1738      case lir_add:                   s = "add";           break;
1739      case lir_sub:                   s = "sub";           break;
1740      case lir_mul:                   s = "mul";           break;
1741      case lir_div:                   s = "div";           break;
1742      case lir_rem:                   s = "rem";           break;
1743      case lir_abs:                   s = "abs";           break;
1744      case lir_neg:                   s = "neg";           break;
1745      case lir_sqrt:                  s = "sqrt";          break;
1746      case lir_f2hf:                  s = "f2hf";          break;
1747      case lir_hf2f:                  s = "hf2f";          break;
1748      case lir_logic_and:             s = "logic_and";     break;
1749      case lir_logic_or:              s = "logic_or";      break;
1750      case lir_logic_xor:             s = "logic_xor";     break;
1751      case lir_shl:                   s = "shift_left";    break;
1752      case lir_shr:                   s = "shift_right";   break;
1753      case lir_ushr:                  s = "ushift_right";  break;
1754      case lir_alloc_array:           s = "alloc_array";   break;
1755      case lir_xadd:                  s = "xadd";          break;
1756      case lir_xchg:                  s = "xchg";          break;
1757      // LIR_Op3
1758      case lir_idiv:                  s = "idiv";          break;
1759      case lir_irem:                  s = "irem";          break;
1760      case lir_fmad:                  s = "fmad";          break;
1761      case lir_fmaf:                  s = "fmaf";          break;
1762      // LIR_Op4
1763      case lir_cmove:                 s = "cmove";         break;
1764      // LIR_OpJavaCall
1765      case lir_static_call:           s = "static";        break;
1766      case lir_optvirtual_call:       s = "optvirtual";    break;
1767      case lir_icvirtual_call:        s = "icvirtual";     break;
1768      case lir_dynamic_call:          s = "dynamic";       break;
1769      // LIR_OpArrayCopy
1770      case lir_arraycopy:             s = "arraycopy";     break;
1771      // LIR_OpUpdateCRC32
1772      case lir_updatecrc32:           s = "updatecrc32";   break;
1773      // LIR_OpLock
1774      case lir_lock:                  s = "lock";          break;
1775      case lir_unlock:                s = "unlock";        break;
1776      // LIR_OpDelay
1777      case lir_delay_slot:            s = "delay";         break;
1778      // LIR_OpTypeCheck
1779      case lir_instanceof:            s = "instanceof";    break;
1780      case lir_checkcast:             s = "checkcast";     break;
1781      case lir_store_check:           s = "store_check";   break;
1782      // LIR_OpCompareAndSwap
1783      case lir_cas_long:              s = "cas_long";      break;
1784      case lir_cas_obj:               s = "cas_obj";      break;
1785      case lir_cas_int:               s = "cas_int";      break;
1786      // LIR_OpProfileCall
1787      case lir_profile_call:          s = "profile_call";  break;
1788      // LIR_OpProfileType
1789      case lir_profile_type:          s = "profile_type";  break;
1790      // LIR_OpAssert
1791 #ifdef ASSERT
1792      case lir_assert:                s = "assert";        break;
1793 #endif
1794      case lir_none:                  ShouldNotReachHere();break;
1795     default:                         s = "illegal_op";    break;
1796   }
1797   return s;
1798 }
1799 
1800 // LIR_OpJavaCall
1801 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1802   out->print("call: ");
1803   out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1804   if (receiver()->is_valid()) {
1805     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1806   }
1807   if (result_opr()->is_valid()) {
1808     out->print(" [result: "); result_opr()->print(out); out->print("]");
1809   }
1810 }
1811 
1812 // LIR_OpLabel
1813 void LIR_OpLabel::print_instr(outputStream* out) const {
1814   out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1815 }
1816 
1817 // LIR_OpArrayCopy
1818 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1819   src()->print(out);     out->print(" ");
1820   src_pos()->print(out); out->print(" ");
1821   dst()->print(out);     out->print(" ");
1822   dst_pos()->print(out); out->print(" ");
1823   length()->print(out);  out->print(" ");
1824   tmp()->print(out);     out->print(" ");
1825 }
1826 
1827 // LIR_OpUpdateCRC32
1828 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1829   crc()->print(out);     out->print(" ");
1830   val()->print(out);     out->print(" ");
1831   result_opr()->print(out); out->print(" ");
1832 }
1833 
1834 // LIR_OpCompareAndSwap
1835 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1836   addr()->print(out);      out->print(" ");
1837   cmp_value()->print(out); out->print(" ");
1838   new_value()->print(out); out->print(" ");
1839   tmp1()->print(out);      out->print(" ");
1840   tmp2()->print(out);      out->print(" ");
1841 
1842 }
1843 
1844 // LIR_Op0
1845 void LIR_Op0::print_instr(outputStream* out) const {
1846   result_opr()->print(out);
1847 }
1848 
1849 // LIR_Op1
1850 const char * LIR_Op1::name() const {
1851   if (code() == lir_move) {
1852     switch (move_kind()) {
1853     case lir_move_normal:
1854       return "move";
1855     case lir_move_volatile:
1856       return "volatile_move";
1857     case lir_move_wide:
1858       return "wide_move";
1859     default:
1860       ShouldNotReachHere();
1861     return "illegal_op";
1862     }
1863   } else {
1864     return LIR_Op::name();
1865   }
1866 }
1867 
1868 
1869 void LIR_Op1::print_instr(outputStream* out) const {
1870   _opr->print(out);         out->print(" ");
1871   result_opr()->print(out); out->print(" ");
1872   print_patch_code(out, patch_code());
1873 }
1874 
1875 
1876 // LIR_Op1
1877 void LIR_OpRTCall::print_instr(outputStream* out) const {
1878   intx a = (intx)addr();
1879   out->print("%s", Runtime1::name_for_address(addr()));
1880   out->print(" ");
1881   tmp()->print(out);
1882 }
1883 
1884 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1885   switch(code) {
1886     case lir_patch_none:                                 break;
1887     case lir_patch_low:    out->print("[patch_low]");    break;
1888     case lir_patch_high:   out->print("[patch_high]");   break;
1889     case lir_patch_normal: out->print("[patch_normal]"); break;
1890     default: ShouldNotReachHere();
1891   }
1892 }
1893 
1894 // LIR_OpBranch
1895 void LIR_OpBranch::print_instr(outputStream* out) const {
1896   print_condition(out, cond());             out->print(" ");
1897   in_opr1()->print(out); out->print(" ");
1898   in_opr2()->print(out); out->print(" ");
1899   if (block() != nullptr) {
1900     out->print("[B%d] ", block()->block_id());
1901   } else if (stub() != nullptr) {
1902     out->print("[");
1903     stub()->print_name(out);
1904     out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1905     if (stub()->info() != nullptr) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1906   } else {
1907     out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1908   }
1909   if (ublock() != nullptr) {
1910     out->print("unordered: [B%d] ", ublock()->block_id());
1911   }
1912 }
1913 
1914 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1915   switch(cond) {
1916     case lir_cond_equal:           out->print("[EQ]");      break;
1917     case lir_cond_notEqual:        out->print("[NE]");      break;
1918     case lir_cond_less:            out->print("[LT]");      break;
1919     case lir_cond_lessEqual:       out->print("[LE]");      break;
1920     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1921     case lir_cond_greater:         out->print("[GT]");      break;
1922     case lir_cond_belowEqual:      out->print("[BE]");      break;
1923     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1924     case lir_cond_always:          out->print("[AL]");      break;
1925     default:                       out->print("[%d]",cond); break;
1926   }
1927 }
1928 
1929 // LIR_OpConvert
1930 void LIR_OpConvert::print_instr(outputStream* out) const {
1931   print_bytecode(out, bytecode());
1932   in_opr()->print(out);                  out->print(" ");
1933   result_opr()->print(out);              out->print(" ");
1934 }
1935 
1936 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1937   switch(code) {
1938     case Bytecodes::_d2f: out->print("[d2f] "); break;
1939     case Bytecodes::_d2i: out->print("[d2i] "); break;
1940     case Bytecodes::_d2l: out->print("[d2l] "); break;
1941     case Bytecodes::_f2d: out->print("[f2d] "); break;
1942     case Bytecodes::_f2i: out->print("[f2i] "); break;
1943     case Bytecodes::_f2l: out->print("[f2l] "); break;
1944     case Bytecodes::_i2b: out->print("[i2b] "); break;
1945     case Bytecodes::_i2c: out->print("[i2c] "); break;
1946     case Bytecodes::_i2d: out->print("[i2d] "); break;
1947     case Bytecodes::_i2f: out->print("[i2f] "); break;
1948     case Bytecodes::_i2l: out->print("[i2l] "); break;
1949     case Bytecodes::_i2s: out->print("[i2s] "); break;
1950     case Bytecodes::_l2i: out->print("[l2i] "); break;
1951     case Bytecodes::_l2f: out->print("[l2f] "); break;
1952     case Bytecodes::_l2d: out->print("[l2d] "); break;
1953     default:
1954       out->print("[?%d]",code);
1955     break;
1956   }
1957 }
1958 
1959 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1960   klass()->print(out);                      out->print(" ");
1961   obj()->print(out);                        out->print(" ");
1962   tmp1()->print(out);                       out->print(" ");
1963   tmp2()->print(out);                       out->print(" ");
1964   tmp3()->print(out);                       out->print(" ");
1965   tmp4()->print(out);                       out->print(" ");
1966   out->print("[hdr:%d]", header_size()); out->print(" ");
1967   out->print("[obj:%d]", object_size()); out->print(" ");
1968   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1969 }
1970 
1971 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1972   _opr->print(out);         out->print(" ");
1973   tmp()->print(out);        out->print(" ");
1974   result_opr()->print(out); out->print(" ");
1975 }
1976 
1977 // LIR_Op2
1978 void LIR_Op2::print_instr(outputStream* out) const {
1979   if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) {
1980     print_condition(out, condition());         out->print(" ");
1981   }
1982   in_opr1()->print(out);    out->print(" ");
1983   in_opr2()->print(out);    out->print(" ");
1984   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1985   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1986   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1987   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1988   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1989   result_opr()->print(out);
1990 }
1991 
1992 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1993   klass()->print(out);                   out->print(" ");
1994   len()->print(out);                     out->print(" ");
1995   obj()->print(out);                     out->print(" ");
1996   tmp1()->print(out);                    out->print(" ");
1997   tmp2()->print(out);                    out->print(" ");
1998   tmp3()->print(out);                    out->print(" ");
1999   tmp4()->print(out);                    out->print(" ");
2000   out->print("[type:0x%x]", type());     out->print(" ");
2001   out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2002 }
2003 
2004 
2005 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
2006   object()->print(out);                  out->print(" ");
2007   if (code() == lir_store_check) {
2008     array()->print(out);                 out->print(" ");
2009   }
2010   if (code() != lir_store_check) {
2011     klass()->print_name_on(out);         out->print(" ");
2012     if (fast_check())                 out->print("fast_check ");
2013   }
2014   tmp1()->print(out);                    out->print(" ");
2015   tmp2()->print(out);                    out->print(" ");
2016   tmp3()->print(out);                    out->print(" ");
2017   result_opr()->print(out);              out->print(" ");
2018   if (info_for_exception() != nullptr) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
2019 }
2020 
2021 
2022 // LIR_Op3
2023 void LIR_Op3::print_instr(outputStream* out) const {
2024   in_opr1()->print(out);    out->print(" ");
2025   in_opr2()->print(out);    out->print(" ");
2026   in_opr3()->print(out);    out->print(" ");
2027   result_opr()->print(out);
2028 }
2029 
2030 // LIR_Op4
2031 void LIR_Op4::print_instr(outputStream* out) const {
2032   print_condition(out, condition()); out->print(" ");
2033   in_opr1()->print(out);             out->print(" ");
2034   in_opr2()->print(out);             out->print(" ");
2035   in_opr3()->print(out);             out->print(" ");
2036   in_opr4()->print(out);             out->print(" ");
2037   result_opr()->print(out);
2038 }
2039 
2040 void LIR_OpLock::print_instr(outputStream* out) const {
2041   hdr_opr()->print(out);   out->print(" ");
2042   obj_opr()->print(out);   out->print(" ");
2043   lock_opr()->print(out);  out->print(" ");
2044   if (_scratch->is_valid()) {
2045     _scratch->print(out);  out->print(" ");
2046   }
2047   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2048 }
2049 
2050 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
2051   obj()->print(out);        out->print(" ");
2052   result_opr()->print(out); out->print(" ");
2053   if (stub()) {
2054     out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2055   }
2056 }
2057 
2058 #ifdef ASSERT
2059 void LIR_OpAssert::print_instr(outputStream* out) const {
2060   print_condition(out, condition()); out->print(" ");
2061   in_opr1()->print(out);             out->print(" ");
2062   in_opr2()->print(out);             out->print(", \"");
2063   out->print("%s", msg());          out->print("\"");
2064 }
2065 #endif
2066 
2067 
2068 void LIR_OpDelay::print_instr(outputStream* out) const {
2069   _op->print_on(out);
2070 }
2071 
2072 
2073 // LIR_OpProfileCall
2074 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2075   profiled_method()->name()->print_symbol_on(out);
2076   out->print(".");
2077   profiled_method()->holder()->name()->print_symbol_on(out);
2078   out->print(" @ %d ", profiled_bci());
2079   mdo()->print(out);           out->print(" ");
2080   recv()->print(out);          out->print(" ");
2081   tmp1()->print(out);          out->print(" ");
2082 }
2083 
2084 // LIR_OpProfileType
2085 void LIR_OpProfileType::print_instr(outputStream* out) const {
2086   out->print("exact = ");
2087   if (exact_klass() == nullptr) {
2088     out->print("unknown");
2089   } else {
2090     exact_klass()->print_name_on(out);
2091   }
2092   out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2093   out->print(" ");
2094   mdp()->print(out);          out->print(" ");
2095   obj()->print(out);          out->print(" ");
2096   tmp()->print(out);          out->print(" ");
2097 }
2098 
2099 #endif // PRODUCT
2100 
2101 // Implementation of LIR_InsertionBuffer
2102 
2103 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2104   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2105 
2106   int i = number_of_insertion_points() - 1;
2107   if (i < 0 || index_at(i) < index) {
2108     append_new(index, 1);
2109   } else {
2110     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2111     assert(count_at(i) > 0, "check");
2112     set_count_at(i, count_at(i) + 1);
2113   }
2114   _ops.push(op);
2115 
2116   DEBUG_ONLY(verify());
2117 }
2118 
2119 #ifdef ASSERT
2120 void LIR_InsertionBuffer::verify() {
2121   int sum = 0;
2122   int prev_idx = -1;
2123 
2124   for (int i = 0; i < number_of_insertion_points(); i++) {
2125     assert(prev_idx < index_at(i), "index must be ordered ascending");
2126     sum += count_at(i);
2127   }
2128   assert(sum == number_of_ops(), "wrong total sum");
2129 }
2130 #endif