1 /*
2 * Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.hpp"
28 #include "c1/c1_CodeStubs.hpp"
29 #include "c1/c1_Defs.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "compiler/disassembler.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/cardTable.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/collectedHeap.hpp"
37 #include "gc/shared/tlab_globals.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "memory/universe.hpp"
40 #include "nativeInst_aarch64.hpp"
41 #include "oops/compiledICHolder.hpp"
42 #include "oops/oop.inline.hpp"
43 #include "prims/jvmtiExport.hpp"
44 #include "register_aarch64.hpp"
45 #include "runtime/sharedRuntime.hpp"
46 #include "runtime/signature.hpp"
47 #include "runtime/stubRoutines.hpp"
48 #include "runtime/vframe.hpp"
49 #include "runtime/vframeArray.hpp"
50 #include "utilities/powerOfTwo.hpp"
51 #include "vmreg_aarch64.inline.hpp"
52
53
54 // Implementation of StubAssembler
55
56 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
57 // setup registers
58 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
59 assert(oop_result1 != rthread && metadata_result != rthread, "registers must be different");
60 assert(args_size >= 0, "illegal args_size");
61 bool align_stack = false;
62
63 mov(c_rarg0, rthread);
64 set_num_rt_args(0); // Nothing on stack
65
66 Label retaddr;
67 set_last_Java_frame(sp, rfp, retaddr, rscratch1);
68
69 // do the call
70 lea(rscratch1, RuntimeAddress(entry));
71 blr(rscratch1);
72 bind(retaddr);
73 int call_offset = offset();
74 // verify callee-saved register
75 #ifdef ASSERT
76 push(r0, sp);
77 { Label L;
78 get_thread(r0);
79 cmp(rthread, r0);
80 br(Assembler::EQ, L);
81 stop("StubAssembler::call_RT: rthread not callee saved?");
82 bind(L);
83 }
84 pop(r0, sp);
85 #endif
86 reset_last_Java_frame(true);
87
88 // check for pending exceptions
89 { Label L;
90 // check for pending exceptions (java_thread is set upon return)
91 ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
92 cbz(rscratch1, L);
93 // exception pending => remove activation and forward to exception handler
94 // make sure that the vm_results are cleared
95 if (oop_result1->is_valid()) {
96 str(zr, Address(rthread, JavaThread::vm_result_offset()));
97 }
98 if (metadata_result->is_valid()) {
99 str(zr, Address(rthread, JavaThread::vm_result_2_offset()));
100 }
101 if (frame_size() == no_frame_size) {
102 leave();
103 far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
104 } else if (_stub_id == Runtime1::forward_exception_id) {
105 should_not_reach_here();
106 } else {
107 far_jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
108 }
109 bind(L);
110 }
111 // get oop results if there are any and reset the values in the thread
112 if (oop_result1->is_valid()) {
113 get_vm_result(oop_result1, rthread);
114 }
115 if (metadata_result->is_valid()) {
116 get_vm_result_2(metadata_result, rthread);
117 }
118 return call_offset;
119 }
120
121
122 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
123 mov(c_rarg1, arg1);
124 return call_RT(oop_result1, metadata_result, entry, 1);
125 }
126
127
128 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
129 if (c_rarg1 == arg2) {
130 if (c_rarg2 == arg1) {
131 mov(rscratch1, arg1);
132 mov(arg1, arg2);
133 mov(arg2, rscratch1);
134 } else {
135 mov(c_rarg2, arg2);
136 mov(c_rarg1, arg1);
137 }
138 } else {
139 mov(c_rarg1, arg1);
140 mov(c_rarg2, arg2);
141 }
142 return call_RT(oop_result1, metadata_result, entry, 2);
143 }
144
145
146 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
147 // if there is any conflict use the stack
148 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
149 arg2 == c_rarg1 || arg2 == c_rarg3 ||
150 arg3 == c_rarg1 || arg3 == c_rarg2) {
151 stp(arg3, arg2, Address(pre(sp, -2 * wordSize)));
152 stp(arg1, zr, Address(pre(sp, -2 * wordSize)));
153 ldp(c_rarg1, zr, Address(post(sp, 2 * wordSize)));
154 ldp(c_rarg3, c_rarg2, Address(post(sp, 2 * wordSize)));
155 } else {
156 mov(c_rarg1, arg1);
157 mov(c_rarg2, arg2);
158 mov(c_rarg3, arg3);
159 }
160 return call_RT(oop_result1, metadata_result, entry, 3);
161 }
162
163 enum return_state_t {
164 does_not_return, requires_return
165 };
166
167
168 // Implementation of StubFrame
169
170 class StubFrame: public StackObj {
171 private:
172 StubAssembler* _sasm;
173 bool _return_state;
174
175 public:
176 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, return_state_t return_state=requires_return);
177 void load_argument(int offset_in_words, Register reg);
178
179 ~StubFrame();
180 };;
181
182 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
183 set_info(name, must_gc_arguments);
184 enter();
185 }
186
187 void StubAssembler::epilogue() {
188 leave();
189 ret(lr);
190 }
191
192 #define __ _sasm->
193
194 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, return_state_t return_state) {
195 _sasm = sasm;
196 _return_state = return_state;
197 __ prologue(name, must_gc_arguments);
198 }
199
200 // load parameters that were stored with LIR_Assembler::store_parameter
201 // Note: offsets for store_parameter and load_argument must match
202 void StubFrame::load_argument(int offset_in_words, Register reg) {
203 __ load_parameter(offset_in_words, reg);
204 }
205
206 StubFrame::~StubFrame() {
207 if (_return_state == requires_return) {
208 __ epilogue();
209 } else {
210 __ should_not_reach_here();
211 }
212 }
213
214 #undef __
215
216
217 // Implementation of Runtime1
218
219 #define __ sasm->
220
221 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
222
223 // Stack layout for saving/restoring all the registers needed during a runtime
224 // call (this includes deoptimization)
225 // Note: note that users of this frame may well have arguments to some runtime
226 // while these values are on the stack. These positions neglect those arguments
227 // but the code in save_live_registers will take the argument count into
228 // account.
229 //
230
231 enum reg_save_layout {
232 reg_save_frame_size = 32 /* float */ + 32 /* integer */
233 };
234
235 // Save off registers which might be killed by calls into the runtime.
236 // Tries to smart of about FP registers. In particular we separate
237 // saving and describing the FPU registers for deoptimization since we
238 // have to save the FPU registers twice if we describe them. The
239 // deopt blob is the only thing which needs to describe FPU registers.
240 // In all other cases it should be sufficient to simply save their
241 // current value.
242
243 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
244 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
245 static int reg_save_size_in_words;
246 static int frame_size_in_bytes = -1;
247
248 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
249 int frame_size_in_bytes = reg_save_frame_size * BytesPerWord;
250 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
251 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
252 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
253
254 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
255 Register r = as_Register(i);
256 if (i <= 18 && i != rscratch1->encoding() && i != rscratch2->encoding()) {
257 int sp_offset = cpu_reg_save_offsets[i];
258 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
259 r->as_VMReg());
260 }
261 }
262
263 if (save_fpu_registers) {
264 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
265 FloatRegister r = as_FloatRegister(i);
266 {
267 int sp_offset = fpu_reg_save_offsets[i];
268 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
269 r->as_VMReg());
270 }
271 }
272 }
273 return oop_map;
274 }
275
276 static OopMap* save_live_registers(StubAssembler* sasm,
277 bool save_fpu_registers = true) {
278 __ block_comment("save_live_registers");
279
280 __ push(RegSet::range(r0, r29), sp); // integer registers except lr & sp
281
282 if (save_fpu_registers) {
283 for (int i = 31; i>= 0; i -= 4) {
284 __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
285 __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
286 as_FloatRegister(i), __ T1D, Address(sp));
287 }
288 } else {
289 __ add(sp, sp, -32 * wordSize);
290 }
291
292 return generate_oop_map(sasm, save_fpu_registers);
293 }
294
295 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
296 if (restore_fpu_registers) {
297 for (int i = 0; i < 32; i += 4)
298 __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
299 as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
300 } else {
301 __ add(sp, sp, 32 * wordSize);
302 }
303
304 __ pop(RegSet::range(r0, r29), sp);
305 }
306
307 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true) {
308
309 if (restore_fpu_registers) {
310 for (int i = 0; i < 32; i += 4)
311 __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
312 as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
313 } else {
314 __ add(sp, sp, 32 * wordSize);
315 }
316
317 __ ldp(zr, r1, Address(__ post(sp, 16)));
318 __ pop(RegSet::range(r2, r29), sp);
319 }
320
321
322
323 void Runtime1::initialize_pd() {
324 int i;
325 int sp_offset = 0;
326
327 // all float registers are saved explicitly
328 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
329 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
330 fpu_reg_save_offsets[i] = sp_offset;
331 sp_offset += 2; // SP offsets are in halfwords
332 }
333
334 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
335 Register r = as_Register(i);
336 cpu_reg_save_offsets[i] = sp_offset;
337 sp_offset += 2; // SP offsets are in halfwords
338 }
339 }
340
341
342 // target: the entry point of the method that creates and posts the exception oop
343 // has_argument: true if the exception needs arguments (passed in rscratch1 and rscratch2)
344
345 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
346 // make a frame and preserve the caller's caller-save registers
347 OopMap* oop_map = save_live_registers(sasm);
348 int call_offset;
349 if (!has_argument) {
350 call_offset = __ call_RT(noreg, noreg, target);
351 } else {
352 __ mov(c_rarg1, rscratch1);
353 __ mov(c_rarg2, rscratch2);
354 call_offset = __ call_RT(noreg, noreg, target);
355 }
356 OopMapSet* oop_maps = new OopMapSet();
357 oop_maps->add_gc_map(call_offset, oop_map);
358 return oop_maps;
359 }
360
361
362 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
363 __ block_comment("generate_handle_exception");
364
365 // incoming parameters
366 const Register exception_oop = r0;
367 const Register exception_pc = r3;
368 // other registers used in this stub
369
370 // Save registers, if required.
371 OopMapSet* oop_maps = new OopMapSet();
372 OopMap* oop_map = NULL;
373 switch (id) {
374 case forward_exception_id:
375 // We're handling an exception in the context of a compiled frame.
376 // The registers have been saved in the standard places. Perform
377 // an exception lookup in the caller and dispatch to the handler
378 // if found. Otherwise unwind and dispatch to the callers
379 // exception handler.
380 oop_map = generate_oop_map(sasm, 1 /*thread*/);
381
382 // load and clear pending exception oop into r0
383 __ ldr(exception_oop, Address(rthread, Thread::pending_exception_offset()));
384 __ str(zr, Address(rthread, Thread::pending_exception_offset()));
385
386 // load issuing PC (the return address for this stub) into r3
387 __ ldr(exception_pc, Address(rfp, 1*BytesPerWord));
388
389 // make sure that the vm_results are cleared (may be unnecessary)
390 __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
391 __ str(zr, Address(rthread, JavaThread::vm_result_2_offset()));
392 break;
393 case handle_exception_nofpu_id:
394 case handle_exception_id:
395 // At this point all registers MAY be live.
396 oop_map = save_live_registers(sasm, id != handle_exception_nofpu_id);
397 break;
398 case handle_exception_from_callee_id: {
399 // At this point all registers except exception oop (r0) and
400 // exception pc (lr) are dead.
401 const int frame_size = 2 /*fp, return address*/;
402 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
403 sasm->set_frame_size(frame_size);
404 break;
405 }
406 default: ShouldNotReachHere();
407 }
408
409 // verify that only r0 and r3 are valid at this time
410 __ invalidate_registers(false, true, true, false, true, true);
411 // verify that r0 contains a valid exception
412 __ verify_not_null_oop(exception_oop);
413
414 #ifdef ASSERT
415 // check that fields in JavaThread for exception oop and issuing pc are
416 // empty before writing to them
417 Label oop_empty;
418 __ ldr(rscratch1, Address(rthread, JavaThread::exception_oop_offset()));
419 __ cbz(rscratch1, oop_empty);
420 __ stop("exception oop already set");
421 __ bind(oop_empty);
422
423 Label pc_empty;
424 __ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset()));
425 __ cbz(rscratch1, pc_empty);
426 __ stop("exception pc already set");
427 __ bind(pc_empty);
428 #endif
429
430 // save exception oop and issuing pc into JavaThread
431 // (exception handler will load it from here)
432 __ str(exception_oop, Address(rthread, JavaThread::exception_oop_offset()));
433 __ str(exception_pc, Address(rthread, JavaThread::exception_pc_offset()));
434
435 // patch throwing pc into return address (has bci & oop map)
436 __ str(exception_pc, Address(rfp, 1*BytesPerWord));
437
438 // compute the exception handler.
439 // the exception oop and the throwing pc are read from the fields in JavaThread
440 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
441 oop_maps->add_gc_map(call_offset, oop_map);
442
443 // r0: handler address
444 // will be the deopt blob if nmethod was deoptimized while we looked up
445 // handler regardless of whether handler existed in the nmethod.
446
447 // only r0 is valid at this time, all other registers have been destroyed by the runtime call
448 __ invalidate_registers(false, true, true, true, true, true);
449
450 // patch the return address, this stub will directly return to the exception handler
451 __ str(r0, Address(rfp, 1*BytesPerWord));
452
453 switch (id) {
454 case forward_exception_id:
455 case handle_exception_nofpu_id:
456 case handle_exception_id:
457 // Restore the registers that were saved at the beginning.
458 restore_live_registers(sasm, id != handle_exception_nofpu_id);
459 break;
460 case handle_exception_from_callee_id:
461 break;
462 default: ShouldNotReachHere();
463 }
464
465 return oop_maps;
466 }
467
468
469 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
470 // incoming parameters
471 const Register exception_oop = r0;
472 // callee-saved copy of exception_oop during runtime call
473 const Register exception_oop_callee_saved = r19;
474 // other registers used in this stub
475 const Register exception_pc = r3;
476 const Register handler_addr = r1;
477
478 // verify that only r0, is valid at this time
479 __ invalidate_registers(false, true, true, true, true, true);
480
481 #ifdef ASSERT
482 // check that fields in JavaThread for exception oop and issuing pc are empty
483 Label oop_empty;
484 __ ldr(rscratch1, Address(rthread, JavaThread::exception_oop_offset()));
485 __ cbz(rscratch1, oop_empty);
486 __ stop("exception oop must be empty");
487 __ bind(oop_empty);
488
489 Label pc_empty;
490 __ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset()));
491 __ cbz(rscratch1, pc_empty);
492 __ stop("exception pc must be empty");
493 __ bind(pc_empty);
494 #endif
495
496 // Save our return address because
497 // exception_handler_for_return_address will destroy it. We also
498 // save exception_oop
499 __ stp(lr, exception_oop, Address(__ pre(sp, -2 * wordSize)));
500
501 // search the exception handler address of the caller (using the return address)
502 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, lr);
503 // r0: exception handler address of the caller
504
505 // Only R0 is valid at this time; all other registers have been
506 // destroyed by the call.
507 __ invalidate_registers(false, true, true, true, false, true);
508
509 // move result of call into correct register
510 __ mov(handler_addr, r0);
511
512 // get throwing pc (= return address).
513 // lr has been destroyed by the call
514 __ ldp(lr, exception_oop, Address(__ post(sp, 2 * wordSize)));
515 __ mov(r3, lr);
516
517 __ verify_not_null_oop(exception_oop);
518
519 // continue at exception handler (return address removed)
520 // note: do *not* remove arguments when unwinding the
521 // activation since the caller assumes having
522 // all arguments on the stack when entering the
523 // runtime to determine the exception handler
524 // (GC happens at call site with arguments!)
525 // r0: exception oop
526 // r3: throwing pc
527 // r1: exception handler
528 __ br(handler_addr);
529 }
530
531
532
533 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
534 // use the maximum number of runtime-arguments here because it is difficult to
535 // distinguish each RT-Call.
536 // Note: This number affects also the RT-Call in generate_handle_exception because
537 // the oop-map is shared for all calls.
538 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
539 assert(deopt_blob != NULL, "deoptimization blob must have been created");
540
541 OopMap* oop_map = save_live_registers(sasm);
542
543 __ mov(c_rarg0, rthread);
544 Label retaddr;
545 __ set_last_Java_frame(sp, rfp, retaddr, rscratch1);
546 // do the call
547 __ lea(rscratch1, RuntimeAddress(target));
548 __ blr(rscratch1);
549 __ bind(retaddr);
550 OopMapSet* oop_maps = new OopMapSet();
551 oop_maps->add_gc_map(__ offset(), oop_map);
552 // verify callee-saved register
553 #ifdef ASSERT
554 { Label L;
555 __ get_thread(rscratch1);
556 __ cmp(rthread, rscratch1);
557 __ br(Assembler::EQ, L);
558 __ stop("StubAssembler::call_RT: rthread not callee saved?");
559 __ bind(L);
560 }
561 #endif
562
563 __ reset_last_Java_frame(true);
564
565 #ifdef ASSERT
566 // check that fields in JavaThread for exception oop and issuing pc are empty
567 Label oop_empty;
568 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
569 __ cbz(rscratch1, oop_empty);
570 __ stop("exception oop must be empty");
571 __ bind(oop_empty);
572
573 Label pc_empty;
574 __ ldr(rscratch1, Address(rthread, JavaThread::exception_pc_offset()));
575 __ cbz(rscratch1, pc_empty);
576 __ stop("exception pc must be empty");
577 __ bind(pc_empty);
578 #endif
579
580 // Runtime will return true if the nmethod has been deoptimized, this is the
581 // expected scenario and anything else is an error. Note that we maintain a
582 // check on the result purely as a defensive measure.
583 Label no_deopt;
584 __ cbz(r0, no_deopt); // Have we deoptimized?
585
586 // Perform a re-execute. The proper return address is already on the stack,
587 // we just need to restore registers, pop all of our frame but the return
588 // address and jump to the deopt blob.
589 restore_live_registers(sasm);
590 __ leave();
591 __ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
592
593 __ bind(no_deopt);
594 __ stop("deopt not performed");
595
596 return oop_maps;
597 }
598
599
600 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
601
602 const Register exception_oop = r0;
603 const Register exception_pc = r3;
604
605 // for better readability
606 const bool must_gc_arguments = true;
607 const bool dont_gc_arguments = false;
608
609 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
610 bool save_fpu_registers = true;
611
612 // stub code & info for the different stubs
613 OopMapSet* oop_maps = NULL;
614 OopMap* oop_map = NULL;
615 switch (id) {
616 {
617 case forward_exception_id:
618 {
619 oop_maps = generate_handle_exception(id, sasm);
620 __ leave();
621 __ ret(lr);
622 }
623 break;
624
625 case throw_div0_exception_id:
626 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments, does_not_return);
627 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
628 }
629 break;
630
631 case throw_null_pointer_exception_id:
632 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments, does_not_return);
633 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
634 }
635 break;
636
637 case new_instance_id:
638 case fast_new_instance_id:
639 case fast_new_instance_init_check_id:
640 {
641 Register klass = r3; // Incoming
642 Register obj = r0; // Result
643
644 if (id == new_instance_id) {
645 __ set_info("new_instance", dont_gc_arguments);
646 } else if (id == fast_new_instance_id) {
647 __ set_info("fast new_instance", dont_gc_arguments);
648 } else {
649 assert(id == fast_new_instance_init_check_id, "bad StubID");
650 __ set_info("fast new_instance init check", dont_gc_arguments);
651 }
652
653 // If TLAB is disabled, see if there is support for inlining contiguous
654 // allocations.
655 // Otherwise, just go to the slow path.
656 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
657 !UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
658 Label slow_path;
659 Register obj_size = r19;
660 Register t1 = r10;
661 Register t2 = r11;
662 assert_different_registers(klass, obj, obj_size, t1, t2);
663
664 __ stp(r19, zr, Address(__ pre(sp, -2 * wordSize)));
665
666 if (id == fast_new_instance_init_check_id) {
667 // make sure the klass is initialized
668 __ ldrb(rscratch1, Address(klass, InstanceKlass::init_state_offset()));
669 __ cmpw(rscratch1, InstanceKlass::fully_initialized);
670 __ br(Assembler::NE, slow_path);
671 }
672
673 #ifdef ASSERT
674 // assert object can be fast path allocated
675 {
676 Label ok, not_ok;
677 __ ldrw(obj_size, Address(klass, Klass::layout_helper_offset()));
678 __ cmp(obj_size, (u1)0);
679 __ br(Assembler::LE, not_ok); // make sure it's an instance (LH > 0)
680 __ tstw(obj_size, Klass::_lh_instance_slow_path_bit);
681 __ br(Assembler::EQ, ok);
682 __ bind(not_ok);
683 __ stop("assert(can be fast path allocated)");
684 __ should_not_reach_here();
685 __ bind(ok);
686 }
687 #endif // ASSERT
688
689 // get the instance size (size is postive so movl is fine for 64bit)
690 __ ldrw(obj_size, Address(klass, Klass::layout_helper_offset()));
691
692 __ eden_allocate(obj, obj_size, 0, t1, slow_path);
693
694 __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false);
695 __ verify_oop(obj);
696 __ ldp(r19, zr, Address(__ post(sp, 2 * wordSize)));
697 __ ret(lr);
698
699 __ bind(slow_path);
700 __ ldp(r19, zr, Address(__ post(sp, 2 * wordSize)));
701 }
702
703 __ enter();
704 OopMap* map = save_live_registers(sasm);
705 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
706 oop_maps = new OopMapSet();
707 oop_maps->add_gc_map(call_offset, map);
708 restore_live_registers_except_r0(sasm);
709 __ verify_oop(obj);
710 __ leave();
711 __ ret(lr);
712
713 // r0,: new instance
714 }
715
716 break;
717
718 case counter_overflow_id:
719 {
720 Register bci = r0, method = r1;
721 __ enter();
722 OopMap* map = save_live_registers(sasm);
723 // Retrieve bci
724 __ ldrw(bci, Address(rfp, 2*BytesPerWord));
725 // And a pointer to the Method*
726 __ ldr(method, Address(rfp, 3*BytesPerWord));
727 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
728 oop_maps = new OopMapSet();
729 oop_maps->add_gc_map(call_offset, map);
730 restore_live_registers(sasm);
731 __ leave();
732 __ ret(lr);
733 }
734 break;
735
736 case new_type_array_id:
737 case new_object_array_id:
738 {
739 Register length = r19; // Incoming
740 Register klass = r3; // Incoming
741 Register obj = r0; // Result
742
743 if (id == new_type_array_id) {
744 __ set_info("new_type_array", dont_gc_arguments);
745 } else {
746 __ set_info("new_object_array", dont_gc_arguments);
747 }
748
749 #ifdef ASSERT
750 // assert object type is really an array of the proper kind
751 {
752 Label ok;
753 Register t0 = obj;
754 __ ldrw(t0, Address(klass, Klass::layout_helper_offset()));
755 __ asrw(t0, t0, Klass::_lh_array_tag_shift);
756 int tag = ((id == new_type_array_id)
757 ? Klass::_lh_array_tag_type_value
758 : Klass::_lh_array_tag_obj_value);
759 __ mov(rscratch1, tag);
760 __ cmpw(t0, rscratch1);
761 __ br(Assembler::EQ, ok);
762 __ stop("assert(is an array klass)");
763 __ should_not_reach_here();
764 __ bind(ok);
765 }
766 #endif // ASSERT
767
768 // If TLAB is disabled, see if there is support for inlining contiguous
769 // allocations.
770 // Otherwise, just go to the slow path.
771 if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
772 Register arr_size = r5;
773 Register t1 = r10;
774 Register t2 = r11;
775 Label slow_path;
776 assert_different_registers(length, klass, obj, arr_size, t1, t2);
777
778 // check that array length is small enough for fast path.
779 __ mov(rscratch1, C1_MacroAssembler::max_array_allocation_length);
780 __ cmpw(length, rscratch1);
781 __ br(Assembler::HI, slow_path);
782
783 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
784 // since size is positive ldrw does right thing on 64bit
785 __ ldrw(t1, Address(klass, Klass::layout_helper_offset()));
786 // since size is positive movw does right thing on 64bit
787 __ movw(arr_size, length);
788 __ lslvw(arr_size, length, t1);
789 __ ubfx(t1, t1, Klass::_lh_header_size_shift,
790 exact_log2(Klass::_lh_header_size_mask + 1));
791 __ add(arr_size, arr_size, t1);
792 __ add(arr_size, arr_size, MinObjAlignmentInBytesMask); // align up
793 __ andr(arr_size, arr_size, ~MinObjAlignmentInBytesMask);
794
795 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
796
797 __ initialize_header(obj, klass, length, t1, t2);
798 __ ldrb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
799 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
800 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
801 __ andr(t1, t1, Klass::_lh_header_size_mask);
802 __ sub(arr_size, arr_size, t1); // body length
803 __ add(t1, t1, obj); // body start
804 __ initialize_body(t1, arr_size, 0, t1, t2);
805 __ membar(Assembler::StoreStore);
806 __ verify_oop(obj);
807
808 __ ret(lr);
809
810 __ bind(slow_path);
811 }
812
813 __ enter();
814 OopMap* map = save_live_registers(sasm);
815 int call_offset;
816 if (id == new_type_array_id) {
817 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
818 } else {
819 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
820 }
821
822 oop_maps = new OopMapSet();
823 oop_maps->add_gc_map(call_offset, map);
824 restore_live_registers_except_r0(sasm);
825
826 __ verify_oop(obj);
827 __ leave();
828 __ ret(lr);
829
830 // r0: new array
831 }
832 break;
833
834 case new_multi_array_id:
835 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
836 // r0,: klass
837 // r19,: rank
838 // r2: address of 1st dimension
839 OopMap* map = save_live_registers(sasm);
840 __ mov(c_rarg1, r0);
841 __ mov(c_rarg3, r2);
842 __ mov(c_rarg2, r19);
843 int call_offset = __ call_RT(r0, noreg, CAST_FROM_FN_PTR(address, new_multi_array), r1, r2, r3);
844
845 oop_maps = new OopMapSet();
846 oop_maps->add_gc_map(call_offset, map);
847 restore_live_registers_except_r0(sasm);
848
849 // r0,: new multi array
850 __ verify_oop(r0);
851 }
852 break;
853
854 case register_finalizer_id:
855 {
856 __ set_info("register_finalizer", dont_gc_arguments);
857
858 // This is called via call_runtime so the arguments
859 // will be place in C abi locations
860
861 __ verify_oop(c_rarg0);
862
863 // load the klass and check the has finalizer flag
864 Label register_finalizer;
865 Register t = r5;
866 __ load_klass(t, r0);
867 __ ldrw(t, Address(t, Klass::access_flags_offset()));
868 __ tbnz(t, exact_log2(JVM_ACC_HAS_FINALIZER), register_finalizer);
869 __ ret(lr);
870
871 __ bind(register_finalizer);
872 __ enter();
873 OopMap* oop_map = save_live_registers(sasm);
874 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), r0);
875 oop_maps = new OopMapSet();
876 oop_maps->add_gc_map(call_offset, oop_map);
877
878 // Now restore all the live registers
879 restore_live_registers(sasm);
880
881 __ leave();
882 __ ret(lr);
883 }
884 break;
885
886 case throw_class_cast_exception_id:
887 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments, does_not_return);
888 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
889 }
890 break;
891
892 case throw_incompatible_class_change_error_id:
893 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments, does_not_return);
894 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
895 }
896 break;
897
898 case slow_subtype_check_id:
899 {
900 // Typical calling sequence:
901 // __ push(klass_RInfo); // object klass or other subclass
902 // __ push(sup_k_RInfo); // array element klass or other superclass
903 // __ bl(slow_subtype_check);
904 // Note that the subclass is pushed first, and is therefore deepest.
905 enum layout {
906 r0_off, r0_off_hi,
907 r2_off, r2_off_hi,
908 r4_off, r4_off_hi,
909 r5_off, r5_off_hi,
910 sup_k_off, sup_k_off_hi,
911 klass_off, klass_off_hi,
912 framesize,
913 result_off = sup_k_off
914 };
915
916 __ set_info("slow_subtype_check", dont_gc_arguments);
917 __ push(RegSet::of(r0, r2, r4, r5), sp);
918
919 // This is called by pushing args and not with C abi
920 // __ ldr(r4, Address(sp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
921 // __ ldr(r0, Address(sp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
922
923 __ ldp(r4, r0, Address(sp, (sup_k_off) * VMRegImpl::stack_slot_size));
924
925 Label miss;
926 __ check_klass_subtype_slow_path(r4, r0, r2, r5, NULL, &miss);
927
928 // fallthrough on success:
929 __ mov(rscratch1, 1);
930 __ str(rscratch1, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result
931 __ pop(RegSet::of(r0, r2, r4, r5), sp);
932 __ ret(lr);
933
934 __ bind(miss);
935 __ str(zr, Address(sp, (result_off) * VMRegImpl::stack_slot_size)); // result
936 __ pop(RegSet::of(r0, r2, r4, r5), sp);
937 __ ret(lr);
938 }
939 break;
940
941 case monitorenter_nofpu_id:
942 save_fpu_registers = false;
943 // fall through
944 case monitorenter_id:
945 {
946 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
947 OopMap* map = save_live_registers(sasm, save_fpu_registers);
948
949 // Called with store_parameter and not C abi
950
951 f.load_argument(1, r0); // r0,: object
952 f.load_argument(0, r1); // r1,: lock address
953
954 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), r0, r1);
955
956 oop_maps = new OopMapSet();
957 oop_maps->add_gc_map(call_offset, map);
958 restore_live_registers(sasm, save_fpu_registers);
959 }
960 break;
961
962 case monitorexit_nofpu_id:
963 save_fpu_registers = false;
964 // fall through
965 case monitorexit_id:
966 {
967 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
968 OopMap* map = save_live_registers(sasm, save_fpu_registers);
969
970 // Called with store_parameter and not C abi
971
972 f.load_argument(0, r0); // r0,: lock address
973
974 // note: really a leaf routine but must setup last java sp
975 // => use call_RT for now (speed can be improved by
976 // doing last java sp setup manually)
977 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), r0);
978
979 oop_maps = new OopMapSet();
980 oop_maps->add_gc_map(call_offset, map);
981 restore_live_registers(sasm, save_fpu_registers);
982 }
983 break;
984
985 case deoptimize_id:
986 {
987 StubFrame f(sasm, "deoptimize", dont_gc_arguments, does_not_return);
988 OopMap* oop_map = save_live_registers(sasm);
989 f.load_argument(0, c_rarg1);
990 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), c_rarg1);
991
992 oop_maps = new OopMapSet();
993 oop_maps->add_gc_map(call_offset, oop_map);
994 restore_live_registers(sasm);
995 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
996 assert(deopt_blob != NULL, "deoptimization blob must have been created");
997 __ leave();
998 __ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
999 }
1000 break;
1001
1002 case throw_range_check_failed_id:
1003 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments, does_not_return);
1004 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1005 }
1006 break;
1007
1008 case unwind_exception_id:
1009 { __ set_info("unwind_exception", dont_gc_arguments);
1010 // note: no stubframe since we are about to leave the current
1011 // activation and we are calling a leaf VM function only.
1012 generate_unwind_exception(sasm);
1013 }
1014 break;
1015
1016 case access_field_patching_id:
1017 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments, does_not_return);
1018 // we should set up register map
1019 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1020 }
1021 break;
1022
1023 case load_klass_patching_id:
1024 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments, does_not_return);
1025 // we should set up register map
1026 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1027 }
1028 break;
1029
1030 case load_mirror_patching_id:
1031 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments, does_not_return);
1032 // we should set up register map
1033 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1034 }
1035 break;
1036
1037 case load_appendix_patching_id:
1038 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments, does_not_return);
1039 // we should set up register map
1040 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1041 }
1042 break;
1043
1044 case handle_exception_nofpu_id:
1045 case handle_exception_id:
1046 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1047 oop_maps = generate_handle_exception(id, sasm);
1048 }
1049 break;
1050
1051 case handle_exception_from_callee_id:
1052 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1053 oop_maps = generate_handle_exception(id, sasm);
1054 }
1055 break;
1056
1057 case throw_index_exception_id:
1058 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments, does_not_return);
1059 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1060 }
1061 break;
1062
1063 case throw_array_store_exception_id:
1064 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments, does_not_return);
1065 // tos + 0: link
1066 // + 1: return address
1067 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1068 }
1069 break;
1070
1071 case predicate_failed_trap_id:
1072 {
1073 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments, does_not_return);
1074
1075 OopMap* map = save_live_registers(sasm);
1076
1077 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1078 oop_maps = new OopMapSet();
1079 oop_maps->add_gc_map(call_offset, map);
1080 restore_live_registers(sasm);
1081 __ leave();
1082 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1083 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1084
1085 __ far_jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1086 }
1087 break;
1088
1089 case dtrace_object_alloc_id:
1090 { // c_rarg0: object
1091 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1092 save_live_registers(sasm);
1093
1094 __ call_VM_leaf(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc)), c_rarg0);
1095
1096 restore_live_registers(sasm);
1097 }
1098 break;
1099
1100 default:
1101 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments, does_not_return);
1102 __ mov(r0, (int)id);
1103 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), r0);
1104 }
1105 break;
1106 }
1107 }
1108 return oop_maps;
1109 }
1110
1111 #undef __
1112
1113 const char *Runtime1::pd_name_for_address(address entry) { Unimplemented(); return 0; }