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src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp

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 256     if (i <= 18 && i != rscratch1->encoding() && i != rscratch2->encoding()) {
 257       int sp_offset = cpu_reg_save_offsets[i];
 258       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
 259                                 r->as_VMReg());
 260     }
 261   }
 262 
 263   if (save_fpu_registers) {
 264     for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
 265       FloatRegister r = as_FloatRegister(i);
 266       {
 267         int sp_offset = fpu_reg_save_offsets[i];
 268         oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
 269                                   r->as_VMReg());
 270       }
 271     }
 272   }
 273   return oop_map;
 274 }
 275 
 276 static OopMap* save_live_registers(StubAssembler* sasm,
 277                                    bool save_fpu_registers = true) {
 278   __ block_comment("save_live_registers");
 279 
 280   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
 281 
 282   if (save_fpu_registers) {
 283     for (int i = 31; i>= 0; i -= 4) {
 284       __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
 285       __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
 286           as_FloatRegister(i), __ T1D, Address(sp));
 287     }
 288   } else {
 289     __ add(sp, sp, -32 * wordSize);
 290   }

 291 



 292   return generate_oop_map(sasm, save_fpu_registers);
 293 }
 294 
 295 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 296   if (restore_fpu_registers) {
 297     for (int i = 0; i < 32; i += 4)
 298       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
 299           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
 300   } else {
 301     __ add(sp, sp, 32 * wordSize);
 302   }
 303 
 304   __ pop(RegSet::range(r0, r29), sp);
 305 }
 306 
 307 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
 308 
 309   if (restore_fpu_registers) {
 310     for (int i = 0; i < 32; i += 4)
 311       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),

 704 
 705           __ bind(slow_path);
 706           __ ldp(r19, zr, Address(__ post(sp, 2 * wordSize)));
 707         }
 708 
 709         __ enter();
 710         OopMap* map = save_live_registers(sasm);
 711         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
 712         oop_maps = new OopMapSet();
 713         oop_maps->add_gc_map(call_offset, map);
 714         restore_live_registers_except_r0(sasm);
 715         __ verify_oop(obj);
 716         __ leave();
 717         __ ret(lr);
 718 
 719         // r0,: new instance
 720       }
 721 
 722       break;
 723 










 724     case counter_overflow_id:
 725       {
 726         Register bci = r0, method = r1;
 727         __ enter();
 728         OopMap* map = save_live_registers(sasm);
 729         // Retrieve bci
 730         __ ldrw(bci, Address(rfp, 2*BytesPerWord));
 731         // And a pointer to the Method*
 732         __ ldr(method, Address(rfp, 3*BytesPerWord));
 733         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
 734         oop_maps = new OopMapSet();
 735         oop_maps->add_gc_map(call_offset, map);
 736         restore_live_registers(sasm);
 737         __ leave();
 738         __ ret(lr);
 739       }
 740       break;
 741 
 742     case new_type_array_id:
 743     case new_object_array_id:

 256     if (i <= 18 && i != rscratch1->encoding() && i != rscratch2->encoding()) {
 257       int sp_offset = cpu_reg_save_offsets[i];
 258       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
 259                                 r->as_VMReg());
 260     }
 261   }
 262 
 263   if (save_fpu_registers) {
 264     for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
 265       FloatRegister r = as_FloatRegister(i);
 266       {
 267         int sp_offset = fpu_reg_save_offsets[i];
 268         oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
 269                                   r->as_VMReg());
 270       }
 271     }
 272   }
 273   return oop_map;
 274 }
 275 
 276 static void save_live_registers_no_oop_map(StubAssembler* sasm,
 277                                               bool save_fpu_registers = true) {
 278   __ block_comment("save_live_registers");
 279 
 280   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
 281 
 282   if (save_fpu_registers) {
 283     for (int i = 31; i>= 0; i -= 4) {
 284       __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
 285       __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
 286           as_FloatRegister(i), __ T1D, Address(sp));
 287     }
 288   } else {
 289     __ add(sp, sp, -32 * wordSize);
 290   }
 291 }
 292 
 293 static OopMap* save_live_registers(StubAssembler* sasm,
 294                                    bool save_fpu_registers = true) {
 295   save_live_registers_no_oop_map(sasm, save_fpu_registers);
 296   return generate_oop_map(sasm, save_fpu_registers);
 297 }
 298 
 299 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 300   if (restore_fpu_registers) {
 301     for (int i = 0; i < 32; i += 4)
 302       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
 303           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
 304   } else {
 305     __ add(sp, sp, 32 * wordSize);
 306   }
 307 
 308   __ pop(RegSet::range(r0, r29), sp);
 309 }
 310 
 311 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
 312 
 313   if (restore_fpu_registers) {
 314     for (int i = 0; i < 32; i += 4)
 315       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),

 708 
 709           __ bind(slow_path);
 710           __ ldp(r19, zr, Address(__ post(sp, 2 * wordSize)));
 711         }
 712 
 713         __ enter();
 714         OopMap* map = save_live_registers(sasm);
 715         int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
 716         oop_maps = new OopMapSet();
 717         oop_maps->add_gc_map(call_offset, map);
 718         restore_live_registers_except_r0(sasm);
 719         __ verify_oop(obj);
 720         __ leave();
 721         __ ret(lr);
 722 
 723         // r0,: new instance
 724       }
 725 
 726       break;
 727 
 728     case load_klass_id:
 729       {
 730         StubFrame f(sasm, "load_klass", dont_gc_arguments);
 731         save_live_registers_no_oop_map(sasm, true);
 732         f.load_argument(0, r0); // obj
 733         __ call_VM_leaf(CAST_FROM_FN_PTR(address, oopDesc::load_nklass_runtime), r0);
 734         restore_live_registers_except_r0(sasm, true);
 735       }
 736       break;
 737 
 738     case counter_overflow_id:
 739       {
 740         Register bci = r0, method = r1;
 741         __ enter();
 742         OopMap* map = save_live_registers(sasm);
 743         // Retrieve bci
 744         __ ldrw(bci, Address(rfp, 2*BytesPerWord));
 745         // And a pointer to the Method*
 746         __ ldr(method, Address(rfp, 3*BytesPerWord));
 747         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
 748         oop_maps = new OopMapSet();
 749         oop_maps->add_gc_map(call_offset, map);
 750         restore_live_registers(sasm);
 751         __ leave();
 752         __ ret(lr);
 753       }
 754       break;
 755 
 756     case new_type_array_id:
 757     case new_object_array_id:
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