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src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp

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 271     }
 272   }
 273   return oop_map;
 274 }
 275 
 276 static OopMap* save_live_registers(StubAssembler* sasm,
 277                                    bool save_fpu_registers = true) {
 278   __ block_comment("save_live_registers");
 279 
 280   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
 281 
 282   if (save_fpu_registers) {
 283     for (int i = 31; i>= 0; i -= 4) {
 284       __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
 285       __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
 286           as_FloatRegister(i), __ T1D, Address(sp));
 287     }
 288   } else {
 289     __ add(sp, sp, -32 * wordSize);
 290   }
 291 
 292   return generate_oop_map(sasm, save_fpu_registers);
 293 }
 294 
 295 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 296   if (restore_fpu_registers) {
 297     for (int i = 0; i < 32; i += 4)
 298       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
 299           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
 300   } else {
 301     __ add(sp, sp, 32 * wordSize);
 302   }
 303 
 304   __ pop(RegSet::range(r0, r29), sp);
 305 }
 306 
 307 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
 308 
 309   if (restore_fpu_registers) {
 310     for (int i = 0; i < 32; i += 4)
 311       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),

 271     }
 272   }
 273   return oop_map;
 274 }
 275 
 276 static OopMap* save_live_registers(StubAssembler* sasm,
 277                                    bool save_fpu_registers = true) {
 278   __ block_comment("save_live_registers");
 279 
 280   __ push(RegSet::range(r0, r29), sp);         // integer registers except lr & sp
 281 
 282   if (save_fpu_registers) {
 283     for (int i = 31; i>= 0; i -= 4) {
 284       __ sub(sp, sp, 4 * wordSize); // no pre-increment for st1. Emulate it without modifying other registers
 285       __ st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
 286           as_FloatRegister(i), __ T1D, Address(sp));
 287     }
 288   } else {
 289     __ add(sp, sp, -32 * wordSize);
 290   }

 291   return generate_oop_map(sasm, save_fpu_registers);
 292 }
 293 
 294 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 295   if (restore_fpu_registers) {
 296     for (int i = 0; i < 32; i += 4)
 297       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
 298           as_FloatRegister(i+3), __ T1D, Address(__ post(sp, 4 * wordSize)));
 299   } else {
 300     __ add(sp, sp, 32 * wordSize);
 301   }
 302 
 303   __ pop(RegSet::range(r0, r29), sp);
 304 }
 305 
 306 static void restore_live_registers_except_r0(StubAssembler* sasm, bool restore_fpu_registers = true)  {
 307 
 308   if (restore_fpu_registers) {
 309     for (int i = 0; i < 32; i += 4)
 310       __ ld1(as_FloatRegister(i), as_FloatRegister(i+1), as_FloatRegister(i+2),
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