1 /*
2 * Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_MacroAssembler.hpp"
27 #include "c1/c1_Runtime1.hpp"
28 #include "gc/shared/barrierSet.hpp"
29 #include "gc/shared/barrierSetAssembler.hpp"
30 #include "gc/shared/collectedHeap.hpp"
31 #include "gc/shared/tlab_globals.hpp"
32 #include "interpreter/interpreter.hpp"
33 #include "oops/arrayOop.hpp"
34 #include "oops/markWord.hpp"
35 #include "runtime/basicLock.hpp"
36 #include "runtime/os.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/powerOfTwo.hpp"
40
41 // Note: Rtemp usage is this file should not impact C2 and should be
42 // correct as long as it is not implicitly used in lower layers (the
43 // arm [macro]assembler) and used with care in the other C1 specific
44 // files.
45
46 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
47 Label verified;
48 load_klass(Rtemp, receiver);
49 cmp(Rtemp, iCache);
50 b(verified, eq); // jump over alignment no-ops
51 jump(SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
52 align(CodeEntryAlignment);
53 bind(verified);
54 }
55
56 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes) {
57 assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
58 assert((frame_size_in_bytes % StackAlignmentInBytes) == 0, "frame size should be aligned");
59
60
61 arm_stack_overflow_check(bang_size_in_bytes, Rtemp);
62
63 // FP can no longer be used to memorize SP. It may be modified
64 // if this method contains a methodHandle call site
65 raw_push(FP, LR);
66 sub_slow(SP, SP, frame_size_in_bytes);
67
68 // Insert nmethod entry barrier into frame.
69 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
70 bs->nmethod_entry_barrier(this);
71 }
72
73 void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
74 add_slow(SP, SP, frame_size_in_bytes);
75 raw_pop(FP, LR);
76 }
77
78 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
79 if (breakAtEntry) {
80 breakpoint();
81 }
82 }
83
84 // Puts address of allocated object into register `obj` and end of allocated object into register `obj_end`.
85 void C1_MacroAssembler::try_allocate(Register obj, Register obj_end, Register tmp1, Register tmp2,
86 RegisterOrConstant size_expression, Label& slow_case) {
87 if (UseTLAB) {
88 tlab_allocate(obj, obj_end, tmp1, size_expression, slow_case);
89 } else {
90 b(slow_case);
91 }
92 }
93
94
95 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp) {
96 assert_different_registers(obj, klass, len, tmp);
97
98 mov(tmp, (intptr_t)markWord::prototype().value());
99
100 str(tmp, Address(obj, oopDesc::mark_offset_in_bytes()));
101 str(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
102
103 if (len->is_valid()) {
104 str_32(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
105 }
106 }
107
108
109 // Cleans object body [base..obj_end]. Clobbers `base` and `tmp` registers.
110 void C1_MacroAssembler::initialize_body(Register base, Register obj_end, Register tmp) {
111 zero_memory(base, obj_end, tmp);
112 }
113
114
115 void C1_MacroAssembler::initialize_object(Register obj, Register obj_end, Register klass,
116 Register len, Register tmp1, Register tmp2,
117 RegisterOrConstant header_size, int obj_size_in_bytes,
118 bool is_tlab_allocated)
119 {
120 assert_different_registers(obj, obj_end, klass, len, tmp1, tmp2);
121 initialize_header(obj, klass, len, tmp1);
122
123 const Register ptr = tmp2;
124
125 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
126 if (obj_size_in_bytes >= 0 && obj_size_in_bytes <= 8 * BytesPerWord) {
127 mov(tmp1, 0);
128 const int base = instanceOopDesc::header_size() * HeapWordSize;
129 for (int i = base; i < obj_size_in_bytes; i += wordSize) {
130 str(tmp1, Address(obj, i));
131 }
132 } else {
133 assert(header_size.is_constant() || header_size.as_register() == ptr, "code assumption");
134 add(ptr, obj, header_size);
135 initialize_body(ptr, obj_end, tmp1);
136 }
137 }
138
139 // StoreStore barrier required after complete initialization
140 // (headers + content zeroing), before the object may escape.
141 membar(MacroAssembler::StoreStore, tmp1);
142 }
143
144 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, Register tmp3,
145 int header_size, int object_size,
146 Register klass, Label& slow_case) {
147 assert_different_registers(obj, tmp1, tmp2, tmp3, klass, Rtemp);
148 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
149 const int object_size_in_bytes = object_size * BytesPerWord;
150
151 const Register obj_end = tmp1;
152 const Register len = noreg;
153
154 if (Assembler::is_arith_imm_in_range(object_size_in_bytes)) {
155 try_allocate(obj, obj_end, tmp2, tmp3, object_size_in_bytes, slow_case);
156 } else {
157 // Rtemp should be free at c1 LIR level
158 mov_slow(Rtemp, object_size_in_bytes);
159 try_allocate(obj, obj_end, tmp2, tmp3, Rtemp, slow_case);
160 }
161 initialize_object(obj, obj_end, klass, len, tmp2, tmp3, instanceOopDesc::header_size() * HeapWordSize, object_size_in_bytes, /* is_tlab_allocated */ UseTLAB);
162 }
163
164 void C1_MacroAssembler::allocate_array(Register obj, Register len,
165 Register tmp1, Register tmp2, Register tmp3,
166 int header_size_in_bytes, int element_size,
167 Register klass, Label& slow_case) {
168 assert_different_registers(obj, len, tmp1, tmp2, tmp3, klass, Rtemp);
169 const int scale_shift = exact_log2(element_size);
170 const Register obj_size = Rtemp; // Rtemp should be free at c1 LIR level
171
172 cmp_32(len, max_array_allocation_length);
173 b(slow_case, hs);
174
175 bool align_header = ((header_size_in_bytes | element_size) & MinObjAlignmentInBytesMask) != 0;
176 assert(align_header || ((header_size_in_bytes & MinObjAlignmentInBytesMask) == 0), "must be");
177 assert(align_header || ((element_size & MinObjAlignmentInBytesMask) == 0), "must be");
178
179 mov(obj_size, header_size_in_bytes + (align_header ? (MinObjAlignmentInBytes - 1) : 0));
180 add_ptr_scaled_int32(obj_size, obj_size, len, scale_shift);
181
182 if (align_header) {
183 align_reg(obj_size, obj_size, MinObjAlignmentInBytes);
184 }
185
186 try_allocate(obj, tmp1, tmp2, tmp3, obj_size, slow_case);
187 initialize_object(obj, tmp1, klass, len, tmp2, tmp3, header_size_in_bytes, -1, /* is_tlab_allocated */ UseTLAB);
188 }
189
190 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
191 Label done, fast_lock, fast_lock_done;
192 int null_check_offset = 0;
193
194 const Register tmp2 = Rtemp; // Rtemp should be free at c1 LIR level
195 assert_different_registers(hdr, obj, disp_hdr, tmp2);
196
197 assert(BasicObjectLock::lock_offset() == 0, "adjust this code");
198 const ByteSize obj_offset = BasicObjectLock::obj_offset();
199 const int mark_offset = BasicLock::displaced_header_offset_in_bytes();
200
201 // save object being locked into the BasicObjectLock
202 str(obj, Address(disp_hdr, obj_offset));
203
204 null_check_offset = offset();
205
206 if (DiagnoseSyncOnValueBasedClasses != 0) {
207 load_klass(tmp2, obj);
208 ldr_u32(tmp2, Address(tmp2, Klass::access_flags_offset()));
209 tst(tmp2, JVM_ACC_IS_VALUE_BASED_CLASS);
210 b(slow_case, ne);
211 }
212
213 assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
214
215 if (LockingMode == LM_LIGHTWEIGHT) {
216
217 Register t1 = disp_hdr; // Needs saving, probably
218 Register t2 = hdr; // blow
219 Register t3 = Rtemp; // blow
220
221 lightweight_lock(obj /* obj */, t1, t2, t3, 1 /* savemask - save t1 */, slow_case);
222 // Success: fall through
223
224 } else if (LockingMode == LM_LEGACY) {
225
226 // On MP platforms the next load could return a 'stale' value if the memory location has been modified by another thread.
227 // That would be acceptable as ether CAS or slow case path is taken in that case.
228
229 // Must be the first instruction here, because implicit null check relies on it
230 ldr(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
231
232 tst(hdr, markWord::unlocked_value);
233 b(fast_lock, ne);
234
235 // Check for recursive locking
236 // See comments in InterpreterMacroAssembler::lock_object for
237 // explanations on the fast recursive locking check.
238 // -1- test low 2 bits
239 movs(tmp2, AsmOperand(hdr, lsl, 30));
240 // -2- test (hdr - SP) if the low two bits are 0
241 sub(tmp2, hdr, SP, eq);
242 movs(tmp2, AsmOperand(tmp2, lsr, exact_log2(os::vm_page_size())), eq);
243 // If still 'eq' then recursive locking OK
244 // set to zero if recursive lock, set to non zero otherwise (see discussion in JDK-8267042)
245 str(tmp2, Address(disp_hdr, mark_offset));
246 b(fast_lock_done, eq);
247 // else need slow case
248 b(slow_case);
249
250
251 bind(fast_lock);
252 // Save previous object header in BasicLock structure and update the header
253 str(hdr, Address(disp_hdr, mark_offset));
254
255 cas_for_lock_acquire(hdr, disp_hdr, obj, tmp2, slow_case);
256
257 bind(fast_lock_done);
258 }
259 bind(done);
260
261 return null_check_offset;
262 }
263
264 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
265 assert_different_registers(hdr, obj, disp_hdr, Rtemp);
266 Register tmp2 = Rtemp;
267
268 assert(BasicObjectLock::lock_offset() == 0, "adjust this code");
269 const ByteSize obj_offset = BasicObjectLock::obj_offset();
270 const int mark_offset = BasicLock::displaced_header_offset_in_bytes();
271
272 Label done;
273
274 assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions");
275
276 if (LockingMode == LM_LIGHTWEIGHT) {
277
278 ldr(obj, Address(disp_hdr, obj_offset));
279
280 Register t1 = disp_hdr; // Needs saving, probably
281 Register t2 = hdr; // blow
282 Register t3 = Rtemp; // blow
283
284 lightweight_unlock(obj /* object */, t1, t2, t3, 1 /* savemask (save t1) */,
285 slow_case);
286 // Success: Fall through
287
288 } else if (LockingMode == LM_LEGACY) {
289
290 // Load displaced header and object from the lock
291 ldr(hdr, Address(disp_hdr, mark_offset));
292 // If hdr is null, we've got recursive locking and there's nothing more to do
293 cbz(hdr, done);
294
295 // load object
296 ldr(obj, Address(disp_hdr, obj_offset));
297
298 // Restore the object header
299 cas_for_lock_release(disp_hdr, hdr, obj, tmp2, slow_case);
300 }
301 bind(done);
302 }
303
304 #ifndef PRODUCT
305
306 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
307 if (!VerifyOops) return;
308 verify_oop_addr(Address(SP, stack_offset));
309 }
310
311 void C1_MacroAssembler::verify_not_null_oop(Register r) {
312 Label not_null;
313 cbnz(r, not_null);
314 stop("non-null oop required");
315 bind(not_null);
316 if (!VerifyOops) return;
317 verify_oop(r);
318 }
319
320 #endif // !PRODUCT