1 /*
2 * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "classfile/systemDictionary.hpp"
32 #include "gc/shared/barrierSetAssembler.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "oops/arrayOop.hpp"
36 #include "oops/markWord.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/os.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/stubRoutines.hpp"
41
42 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
43 FloatRegister freg0, FloatRegister freg1,
44 Register result) {
45 if (is_float) {
46 float_compare(result, freg0, freg1, unordered_result);
47 } else {
48 double_compare(result, freg0, freg1, unordered_result);
49 }
50 }
51
52 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
53 const int aligned_mask = BytesPerWord - 1;
54 const int hdr_offset = oopDesc::mark_offset_in_bytes();
55 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
56 Label done;
57 int null_check_offset = -1;
58
59 verify_oop(obj);
60
61 // save object being locked into the BasicObjectLock
62 sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
63
64 null_check_offset = offset();
65
66 if (DiagnoseSyncOnValueBasedClasses != 0) {
67 load_klass(hdr, obj);
68 lwu(hdr, Address(hdr, Klass::access_flags_offset()));
69 andi(t0, hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
70 bnez(t0, slow_case, true /* is_far */);
71 }
72
73 // Load object header
74 ld(hdr, Address(obj, hdr_offset));
75 // and mark it as unlocked
76 ori(hdr, hdr, markWord::unlocked_value);
77 // save unlocked object header into the displaced header location on the stack
78 sd(hdr, Address(disp_hdr, 0));
79 // test if object header is still the same (i.e. unlocked), and if so, store the
80 // displaced header address in the object header - if it is not the same, get the
81 // object header instead
82 la(t1, Address(obj, hdr_offset));
83 cmpxchgptr(hdr, disp_hdr, t1, t0, done, /*fallthough*/NULL);
84 // if the object header was the same, we're done
85 // if the object header was not the same, it is now in the hdr register
86 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
87 //
88 // 1) (hdr & aligned_mask) == 0
89 // 2) sp <= hdr
90 // 3) hdr <= sp + page_size
91 //
92 // these 3 tests can be done by evaluating the following expression:
93 //
94 // (hdr -sp) & (aligned_mask - page_size)
95 //
96 // assuming both the stack pointer and page_size have their least
97 // significant 2 bits cleared and page_size is a power of 2
98 sub(hdr, hdr, sp);
99 mv(t0, aligned_mask - (int)os::vm_page_size());
100 andr(hdr, hdr, t0);
101 // for recursive locking, the result is zero => save it in the displaced header
102 // location (NULL in the displaced hdr location indicates recursive locking)
103 sd(hdr, Address(disp_hdr, 0));
104 // otherwise we don't care about the result and handle locking via runtime call
105 bnez(hdr, slow_case, /* is_far */ true);
106 // done
107 bind(done);
108 increment(Address(xthread, JavaThread::held_monitor_count_offset()));
109 return null_check_offset;
110 }
111
112 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
113 const int aligned_mask = BytesPerWord - 1;
114 const int hdr_offset = oopDesc::mark_offset_in_bytes();
115 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
116 Label done;
117
118 // load displaced header
119 ld(hdr, Address(disp_hdr, 0));
120 // if the loaded hdr is NULL we had recursive locking
121 // if we had recursive locking, we are done
122 beqz(hdr, done);
123 // load object
124 ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
125 verify_oop(obj);
126 // test if object header is pointing to the displaced header, and if so, restore
127 // the displaced header in the object - if the object header is not pointing to
128 // the displaced header, get the object header instead
129 // if the object header was not pointing to the displaced header,
130 // we do unlocking via runtime call
131 if (hdr_offset) {
132 la(t0, Address(obj, hdr_offset));
133 cmpxchgptr(disp_hdr, hdr, t0, t1, done, &slow_case);
134 } else {
135 cmpxchgptr(disp_hdr, hdr, obj, t1, done, &slow_case);
136 }
137 // done
138 bind(done);
139 decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
140 }
141
142 // Defines obj, preserves var_size_in_bytes
143 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
144 if (UseTLAB) {
145 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
146 } else {
147 j(slow_case);
148 }
149 }
150
151 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
152 assert_different_registers(obj, klass, len, tmp1, tmp2);
153 // This assumes that all prototype bits fitr in an int32_t
154 mv(tmp1, (int32_t)(intptr_t)markWord::prototype().value());
155 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
156
157 if (UseCompressedClassPointers) { // Take care not to kill klass
158 encode_klass_not_null(tmp1, klass, tmp2);
159 sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
160 } else {
161 sd(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
162 }
163
164 if (len->is_valid()) {
165 sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
166 } else if (UseCompressedClassPointers) {
167 store_klass_gap(obj, zr);
168 }
169 }
170
171 // preserves obj, destroys len_in_bytes
172 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
173 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
174 Label done;
175
176 // len_in_bytes is positive and ptr sized
177 sub(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
178 beqz(len_in_bytes, done);
179
180 // Preserve obj
181 if (hdr_size_in_bytes) {
182 add(obj, obj, hdr_size_in_bytes);
183 }
184 zero_memory(obj, len_in_bytes, tmp);
185 if (hdr_size_in_bytes) {
186 sub(obj, obj, hdr_size_in_bytes);
187 }
188
189 bind(done);
190 }
191
192 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
193 assert_different_registers(obj, tmp1, tmp2);
194 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
195
196 try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
197
198 initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
199 }
200
201 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
202 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
203 "con_size_in_bytes is not multiple of alignment");
204 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
205
206 initialize_header(obj, klass, noreg, tmp1, tmp2);
207
208 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
209 // clear rest of allocated space
210 const Register index = tmp2;
211 // 16: multiplier for threshold
212 const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below)
213 if (var_size_in_bytes != noreg) {
214 mv(index, var_size_in_bytes);
215 initialize_body(obj, index, hdr_size_in_bytes, tmp1);
216 } else if (con_size_in_bytes <= threshold) {
217 // use explicit null stores
218 int i = hdr_size_in_bytes;
219 if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord
220 sd(zr, Address(obj, i));
221 i += BytesPerWord;
222 }
223 for (; i < con_size_in_bytes; i += BytesPerWord) {
224 sd(zr, Address(obj, i));
225 }
226 } else if (con_size_in_bytes > hdr_size_in_bytes) {
227 block_comment("zero memory");
228 // use loop to null out the fields
229 int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
230 mv(index, words / 8); // 8: byte size
231
232 const int unroll = 8; // Number of sd(zr) instructions we'll unroll
233 int remainder = words % unroll;
234 la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
235
236 Label entry_point, loop;
237 j(entry_point);
238
239 bind(loop);
240 sub(index, index, 1);
241 for (int i = -unroll; i < 0; i++) {
242 if (-i == remainder) {
243 bind(entry_point);
244 }
245 sd(zr, Address(t0, i * wordSize));
246 }
247 if (remainder == 0) {
248 bind(entry_point);
249 }
250 add(t0, t0, unroll * wordSize);
251 bnez(index, loop);
252 }
253 }
254
255 membar(MacroAssembler::StoreStore);
256
257 if (CURRENT_ENV->dtrace_alloc_probes()) {
258 assert(obj == x10, "must be");
259 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
260 }
261
262 verify_oop(obj);
263 }
264
265 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int header_size, int f, Register klass, Label& slow_case) {
266 assert_different_registers(obj, len, tmp1, tmp2, klass);
267
268 // determine alignment mask
269 assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
270
271 // check for negative or excessive length
272 mv(t0, (int32_t)max_array_allocation_length);
273 bgeu(len, t0, slow_case, /* is_far */ true);
274
275 const Register arr_size = tmp2; // okay to be the same
276 // align object end
277 mv(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
278 shadd(arr_size, len, arr_size, t0, f);
279 andi(arr_size, arr_size, ~(uint)MinObjAlignmentInBytesMask);
280
281 try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
282
283 initialize_header(obj, klass, len, tmp1, tmp2);
284
285 // clear rest of allocated space
286 const Register len_zero = len;
287 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
288
289 membar(MacroAssembler::StoreStore);
290
291 if (CURRENT_ENV->dtrace_alloc_probes()) {
292 assert(obj == x10, "must be");
293 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
294 }
295
296 verify_oop(obj);
297 }
298
299 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache, Label &L) {
300 verify_oop(receiver);
301 // explicit NULL check not needed since load from [klass_offset] causes a trap
302 // check against inline cache
303 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
304 assert_different_registers(receiver, iCache, t0, t2);
305 cmp_klass(receiver, iCache, t0, t2 /* call-clobbered t2 as a tmp */, L);
306 }
307
308 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
309 assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
310 // Make sure there is enough stack space for this method's activation.
311 // Note that we do this before creating a frame.
312 generate_stack_overflow_check(bang_size_in_bytes);
313 MacroAssembler::build_frame(framesize);
314
315 // Insert nmethod entry barrier into frame.
316 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
317 bs->nmethod_entry_barrier(this, NULL /* slow_path */, NULL /* continuation */, NULL /* guard */);
318 }
319
320 void C1_MacroAssembler::remove_frame(int framesize) {
321 MacroAssembler::remove_frame(framesize);
322 }
323
324
325 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
326 // If we have to make this method not-entrant we'll overwrite its
327 // first instruction with a jump. For this action to be legal we
328 // must ensure that this first instruction is a J, JAL or NOP.
329 // Make it a NOP.
330 IncompressibleRegion ir(this); // keep the nop as 4 bytes for patching.
331 assert_alignment(pc());
332 nop(); // 4 bytes
333 }
334
335 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
336 // fp + -2: link
337 // + -1: return address
338 // + 0: argument with offset 0
339 // + 1: argument with offset 1
340 // + 2: ...
341 ld(reg, Address(fp, offset_in_words * BytesPerWord));
342 }
343
344 #ifndef PRODUCT
345
346 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
347 if (!VerifyOops) {
348 return;
349 }
350 verify_oop_addr(Address(sp, stack_offset));
351 }
352
353 void C1_MacroAssembler::verify_not_null_oop(Register r) {
354 if (!VerifyOops) return;
355 Label not_null;
356 bnez(r, not_null);
357 stop("non-null oop required");
358 bind(not_null);
359 verify_oop(r);
360 }
361
362 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
363 #ifdef ASSERT
364 static int nn;
365 if (inv_x10) { mv(x10, 0xDEAD); }
366 if (inv_x9) { mv(x9, 0xDEAD); }
367 if (inv_x12) { mv(x12, nn++); }
368 if (inv_x13) { mv(x13, 0xDEAD); }
369 if (inv_x14) { mv(x14, 0xDEAD); }
370 if (inv_x15) { mv(x15, 0xDEAD); }
371 #endif // ASSERT
372 }
373 #endif // ifndef PRODUCT
374
375 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
376 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
377 Label& label, bool is_far, bool is_unordered);
378
379 static c1_cond_branch_insn c1_cond_branch[] =
380 {
381 /* SHORT branches */
382 (c1_cond_branch_insn)&MacroAssembler::beq,
383 (c1_cond_branch_insn)&MacroAssembler::bne,
384 (c1_cond_branch_insn)&MacroAssembler::blt,
385 (c1_cond_branch_insn)&MacroAssembler::ble,
386 (c1_cond_branch_insn)&MacroAssembler::bge,
387 (c1_cond_branch_insn)&MacroAssembler::bgt,
388 (c1_cond_branch_insn)&MacroAssembler::bleu, // lir_cond_belowEqual
389 (c1_cond_branch_insn)&MacroAssembler::bgeu // lir_cond_aboveEqual
390 };
391
392 static c1_float_cond_branch_insn c1_float_cond_branch[] =
393 {
394 /* FLOAT branches */
395 (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
396 (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
397 (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
398 (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
399 (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
400 (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
401 NULL, // lir_cond_belowEqual
402 NULL, // lir_cond_aboveEqual
403
404 /* DOUBLE branches */
405 (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
406 (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
407 (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
408 (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
409 (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
410 (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
411 NULL, // lir_cond_belowEqual
412 NULL // lir_cond_aboveEqual
413 };
414
415 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
416 BasicType type, bool is_far) {
417 if (type == T_OBJECT || type == T_ARRAY) {
418 assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
419 if (cmpFlag == lir_cond_equal) {
420 beq(op1, op2, label, is_far);
421 } else {
422 bne(op1, op2, label, is_far);
423 }
424 } else {
425 assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
426 "invalid c1 conditional branch index");
427 (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
428 }
429 }
430
431 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
432 bool is_far, bool is_unordered) {
433 assert(cmpFlag >= 0 &&
434 cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
435 "invalid c1 float conditional branch index");
436 (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
437 }