1 /*
2 * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "classfile/systemDictionary.hpp"
32 #include "gc/shared/barrierSetAssembler.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "oops/arrayOop.hpp"
36 #include "oops/markWord.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/os.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/stubRoutines.hpp"
41
42 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
43 FloatRegister freg0, FloatRegister freg1,
44 Register result) {
45 if (is_float) {
46 float_compare(result, freg0, freg1, unordered_result);
47 } else {
48 double_compare(result, freg0, freg1, unordered_result);
49 }
50 }
51
52 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
53 const int aligned_mask = BytesPerWord - 1;
54 const int hdr_offset = oopDesc::mark_offset_in_bytes();
55 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
56 Label done;
57 int null_check_offset = -1;
58
59 verify_oop(obj);
60
61 // save object being locked into the BasicObjectLock
62 sd(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
63
64 null_check_offset = offset();
65
66 if (DiagnoseSyncOnValueBasedClasses != 0) {
67 load_klass(hdr, obj);
68 lwu(hdr, Address(hdr, Klass::access_flags_offset()));
69 andi(t0, hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
70 bnez(t0, slow_case, true /* is_far */);
71 }
72
73 // Load object header
74 ld(hdr, Address(obj, hdr_offset));
75
76 if (UseFastLocking) {
77 fast_lock(obj, hdr, t0, t1, slow_case);
78 } else {
79 // and mark it as unlocked
80 jori(hdr, hdr, markWord::unlocked_value);
81 // save unlocked object header into the displaced header location on the stack
82 sd(hdr, Address(disp_hdr, 0));
83 // test if object header is still the same (i.e. unlocked), and if so, store the
84 // displaced header address in the object header - if it is not the same, get the
85 // object header instead
86 la(t1, Address(obj, hdr_offset));
87 cmpxchgptr(hdr, disp_hdr, t1, t0, done, /*fallthough*/NULL);
88 // if the object header was the same, we're done
89 // if the object header was not the same, it is now in the hdr register
90 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
91 //
92 // 1) (hdr & aligned_mask) == 0
93 // 2) sp <= hdr
94 // 3) hdr <= sp + page_size
95 //
96 // these 3 tests can be done by evaluating the following expression:
97 //
98 // (hdr -sp) & (aligned_mask - page_size)
99 //
100 // assuming both the stack pointer and page_size have their least
101 // significant 2 bits cleared and page_size is a power of 2
102 sub(hdr, hdr, sp);
103 mv(t0, aligned_mask - (int)os::vm_page_size());
104 andr(hdr, hdr, t0);
105 // for recursive locking, the result is zero => save it in the displaced header
106 // location (NULL in the displaced hdr location indicates recursive locking)
107 sd(hdr, Address(disp_hdr, 0));
108 // otherwise we don't care about the result and handle locking via runtime call
109 bnez(hdr, slow_case, /* is_far */ true);
110 // done
111 bind(done);
112 }
113 increment(Address(xthread, JavaThread::held_monitor_count_offset()));
114 return null_check_offset;
115 }
116
117 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
118 const int aligned_mask = BytesPerWord - 1;
119 const int hdr_offset = oopDesc::mark_offset_in_bytes();
120 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
121 Label done;
122
123 if (UseFastLocking) {
124 // load object
125 ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
126 verify_oop(obj);
127 ld(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
128 fast_unlock(obj, hdr, t0, t1, slow_case);
129 } else {
130 // load displaced header
131 ld(hdr, Address(disp_hdr, 0));
132 // if the loaded hdr is NULL we had recursive locking
133 // if we had recursive locking, we are done
134 beqz(hdr, done);
135 // load object
136 ld(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
137 verify_oop(obj);
138 // test if object header is pointing to the displaced header, and if so, restore
139 // the displaced header in the object - if the object header is not pointing to
140 // the displaced header, get the object header instead
141 // if the object header was not pointing to the displaced header,
142 // we do unlocking via runtime call
143 if (hdr_offset) {
144 la(t0, Address(obj, hdr_offset));
145 cmpxchgptr(disp_hdr, hdr, t0, t1, done, &slow_case);
146 } else {
147 cmpxchgptr(disp_hdr, hdr, obj, t1, done, &slow_case);
148 }
149 // done
150 bind(done);
151 }
152 decrement(Address(xthread, JavaThread::held_monitor_count_offset()));
153 }
154
155 // Defines obj, preserves var_size_in_bytes
156 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
157 if (UseTLAB) {
158 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
159 } else {
160 j(slow_case);
161 }
162 }
163
164 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
165 assert_different_registers(obj, klass, len, tmp1, tmp2);
166 // This assumes that all prototype bits fitr in an int32_t
167 mv(tmp1, (int32_t)(intptr_t)markWord::prototype().value());
168 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
169
170 if (UseCompressedClassPointers) { // Take care not to kill klass
171 encode_klass_not_null(tmp1, klass, tmp2);
172 sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
173 } else {
174 sd(klass, Address(obj, oopDesc::klass_offset_in_bytes()));
175 }
176
177 if (len->is_valid()) {
178 sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
179 } else if (UseCompressedClassPointers) {
180 store_klass_gap(obj, zr);
181 }
182 }
183
184 // preserves obj, destroys len_in_bytes
185 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
186 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
187 Label done;
188
189 // len_in_bytes is positive and ptr sized
190 sub(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
191 beqz(len_in_bytes, done);
192
193 // Preserve obj
194 if (hdr_size_in_bytes) {
195 add(obj, obj, hdr_size_in_bytes);
196 }
197 zero_memory(obj, len_in_bytes, tmp);
198 if (hdr_size_in_bytes) {
199 sub(obj, obj, hdr_size_in_bytes);
200 }
201
202 bind(done);
203 }
204
205 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
206 assert_different_registers(obj, tmp1, tmp2);
207 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
208
209 try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
210
211 initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
212 }
213
214 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
215 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
216 "con_size_in_bytes is not multiple of alignment");
217 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
218
219 initialize_header(obj, klass, noreg, tmp1, tmp2);
220
221 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
222 // clear rest of allocated space
223 const Register index = tmp2;
224 // 16: multiplier for threshold
225 const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below)
226 if (var_size_in_bytes != noreg) {
227 mv(index, var_size_in_bytes);
228 initialize_body(obj, index, hdr_size_in_bytes, tmp1);
229 } else if (con_size_in_bytes <= threshold) {
230 // use explicit null stores
231 int i = hdr_size_in_bytes;
232 if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord
233 sd(zr, Address(obj, i));
234 i += BytesPerWord;
235 }
236 for (; i < con_size_in_bytes; i += BytesPerWord) {
237 sd(zr, Address(obj, i));
238 }
239 } else if (con_size_in_bytes > hdr_size_in_bytes) {
240 block_comment("zero memory");
241 // use loop to null out the fields
242 int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
243 mv(index, words / 8); // 8: byte size
244
245 const int unroll = 8; // Number of sd(zr) instructions we'll unroll
246 int remainder = words % unroll;
247 la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
248
249 Label entry_point, loop;
250 j(entry_point);
251
252 bind(loop);
253 sub(index, index, 1);
254 for (int i = -unroll; i < 0; i++) {
255 if (-i == remainder) {
256 bind(entry_point);
257 }
258 sd(zr, Address(t0, i * wordSize));
259 }
260 if (remainder == 0) {
261 bind(entry_point);
262 }
263 add(t0, t0, unroll * wordSize);
264 bnez(index, loop);
265 }
266 }
267
268 membar(MacroAssembler::StoreStore);
269
270 if (CURRENT_ENV->dtrace_alloc_probes()) {
271 assert(obj == x10, "must be");
272 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
273 }
274
275 verify_oop(obj);
276 }
277
278 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int header_size, int f, Register klass, Label& slow_case) {
279 assert_different_registers(obj, len, tmp1, tmp2, klass);
280
281 // determine alignment mask
282 assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
283
284 // check for negative or excessive length
285 mv(t0, (int32_t)max_array_allocation_length);
286 bgeu(len, t0, slow_case, /* is_far */ true);
287
288 const Register arr_size = tmp2; // okay to be the same
289 // align object end
290 mv(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
291 shadd(arr_size, len, arr_size, t0, f);
292 andi(arr_size, arr_size, ~(uint)MinObjAlignmentInBytesMask);
293
294 try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
295
296 initialize_header(obj, klass, len, tmp1, tmp2);
297
298 // clear rest of allocated space
299 const Register len_zero = len;
300 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
301
302 membar(MacroAssembler::StoreStore);
303
304 if (CURRENT_ENV->dtrace_alloc_probes()) {
305 assert(obj == x10, "must be");
306 far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
307 }
308
309 verify_oop(obj);
310 }
311
312 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache, Label &L) {
313 verify_oop(receiver);
314 // explicit NULL check not needed since load from [klass_offset] causes a trap
315 // check against inline cache
316 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
317 assert_different_registers(receiver, iCache, t0, t2);
318 cmp_klass(receiver, iCache, t0, t2 /* call-clobbered t2 as a tmp */, L);
319 }
320
321 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes, int max_monitors) {
322 assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
323 // Make sure there is enough stack space for this method's activation.
324 // Note that we do this before creating a frame.
325 generate_stack_overflow_check(bang_size_in_bytes);
326 MacroAssembler::build_frame(framesize);
327
328 // Insert nmethod entry barrier into frame.
329 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
330 bs->nmethod_entry_barrier(this, NULL /* slow_path */, NULL /* continuation */, NULL /* guard */);
331 }
332
333 void C1_MacroAssembler::remove_frame(int framesize) {
334 MacroAssembler::remove_frame(framesize);
335 }
336
337
338 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
339 // If we have to make this method not-entrant we'll overwrite its
340 // first instruction with a jump. For this action to be legal we
341 // must ensure that this first instruction is a J, JAL or NOP.
342 // Make it a NOP.
343 IncompressibleRegion ir(this); // keep the nop as 4 bytes for patching.
344 assert_alignment(pc());
345 nop(); // 4 bytes
346 }
347
348 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
349 // fp + -2: link
350 // + -1: return address
351 // + 0: argument with offset 0
352 // + 1: argument with offset 1
353 // + 2: ...
354 ld(reg, Address(fp, offset_in_words * BytesPerWord));
355 }
356
357 #ifndef PRODUCT
358
359 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
360 if (!VerifyOops) {
361 return;
362 }
363 verify_oop_addr(Address(sp, stack_offset));
364 }
365
366 void C1_MacroAssembler::verify_not_null_oop(Register r) {
367 if (!VerifyOops) return;
368 Label not_null;
369 bnez(r, not_null);
370 stop("non-null oop required");
371 bind(not_null);
372 verify_oop(r);
373 }
374
375 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
376 #ifdef ASSERT
377 static int nn;
378 if (inv_x10) { mv(x10, 0xDEAD); }
379 if (inv_x9) { mv(x9, 0xDEAD); }
380 if (inv_x12) { mv(x12, nn++); }
381 if (inv_x13) { mv(x13, 0xDEAD); }
382 if (inv_x14) { mv(x14, 0xDEAD); }
383 if (inv_x15) { mv(x15, 0xDEAD); }
384 #endif // ASSERT
385 }
386 #endif // ifndef PRODUCT
387
388 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
389 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
390 Label& label, bool is_far, bool is_unordered);
391
392 static c1_cond_branch_insn c1_cond_branch[] =
393 {
394 /* SHORT branches */
395 (c1_cond_branch_insn)&MacroAssembler::beq,
396 (c1_cond_branch_insn)&MacroAssembler::bne,
397 (c1_cond_branch_insn)&MacroAssembler::blt,
398 (c1_cond_branch_insn)&MacroAssembler::ble,
399 (c1_cond_branch_insn)&MacroAssembler::bge,
400 (c1_cond_branch_insn)&MacroAssembler::bgt,
401 (c1_cond_branch_insn)&MacroAssembler::bleu, // lir_cond_belowEqual
402 (c1_cond_branch_insn)&MacroAssembler::bgeu // lir_cond_aboveEqual
403 };
404
405 static c1_float_cond_branch_insn c1_float_cond_branch[] =
406 {
407 /* FLOAT branches */
408 (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
409 (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
410 (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
411 (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
412 (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
413 (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
414 NULL, // lir_cond_belowEqual
415 NULL, // lir_cond_aboveEqual
416
417 /* DOUBLE branches */
418 (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
419 (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
420 (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
421 (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
422 (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
423 (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
424 NULL, // lir_cond_belowEqual
425 NULL // lir_cond_aboveEqual
426 };
427
428 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
429 BasicType type, bool is_far) {
430 if (type == T_OBJECT || type == T_ARRAY) {
431 assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
432 if (cmpFlag == lir_cond_equal) {
433 beq(op1, op2, label, is_far);
434 } else {
435 bne(op1, op2, label, is_far);
436 }
437 } else {
438 assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
439 "invalid c1 conditional branch index");
440 (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
441 }
442 }
443
444 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
445 bool is_far, bool is_unordered) {
446 assert(cmpFlag >= 0 &&
447 cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
448 "invalid c1 float conditional branch index");
449 (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
450 }