1 /* 2 * Copyright (c) 2023, Red Hat, Inc. All rights reserved. 3 * Copyright (c) 2023, Oracle and/or its affiliates. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "oops/compressedKlass.hpp" 28 #include "utilities/globalDefinitions.hpp" 29 30 char* CompressedKlassPointers::reserve_address_space_for_compressed_classes(size_t size, bool aslr, bool optimize_for_zero_base) { 31 32 char* result = nullptr; 33 34 // RiscV loads a 64-bit immediate in up to four separate steps, splitting it into four different sections 35 // (two 32-bit sections, each split into two subsections of 20/12 bits). 36 // 37 // 63 ....... 44 43 ... 32 31 ....... 12 11 ... 0 38 // D C B A 39 // 40 // A "good" base is, in this order: 41 // 1) only bits in A; this would be an address < 4KB, which is unrealistic on normal Linux boxes since 42 // the typical default for vm.mmap_min_address is 64KB. We ignore that. 43 // 2) only bits in B: a 12-bit-aligned address below 4GB. 12 bit = 4KB, but since mmap reserves at 44 // page boundaries, we can ignore the alignment. 45 // 3) only bits in C: a 4GB-aligned address that is lower than 16TB. 46 // 4) only bits in D: a 16TB-aligned address. 47 48 // First, attempt to allocate < 4GB. We do this unconditionally: 49 // - if can_optimize_for_zero_base, a <4GB mapping start would allow us to run unscaled (base = 0, shift = 0) 50 // - if !can_optimize_for_zero_base, a <4GB mapping start is still good, the resulting immediate can be encoded 51 // with one instruction (2) 52 result = reserve_address_space_for_unscaled_encoding(size, aslr); 53 54 // Failing that, attempt to reserve for base=zero shift>0 55 if (result == nullptr && optimize_for_zero_base) { 56 result = reserve_address_space_for_zerobased_encoding(size, aslr); 57 } 58 59 // Failing that, optimize for case (3) - a base with only bits set between [33-44) 60 if (result == nullptr) { 61 const uintptr_t from = nth_bit(32 + (optimize_for_zero_base ? LogKlassAlignmentInBytes : 0)); 62 constexpr uintptr_t to = nth_bit(44); 63 constexpr size_t alignment = nth_bit(32); 64 result = reserve_address_space_X(from, to, size, alignment, aslr); 65 } 66 67 // Failing that, optimize for case (4) - a base with only bits set between [44-64) 68 if (result == nullptr) { 69 constexpr uintptr_t from = nth_bit(44); 70 constexpr uintptr_t to = UINT64_MAX; 71 constexpr size_t alignment = nth_bit(44); 72 result = reserve_address_space_X(from, to, size, alignment, aslr); 73 } 74 75 return result; 76 }