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src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

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@@ -554,11 +554,10 @@
  
    void ror_imm(Register dst, Register src, uint32_t shift, Register tmp = t0);
    void andi(Register Rd, Register Rn, int64_t imm, Register tmp = t0);
    void orptr(Address adr, RegisterOrConstant src, Register tmp1 = t0, Register tmp2 = t1);
  
-   void cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp, Label &succeed, Label *fail);
    void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp, Label &succeed, Label *fail);
    void cmpxchg(Register addr, Register expected,
                 Register new_val,
                 enum operand_size size,
                 Assembler::Aqrl acquire, Assembler::Aqrl release,

@@ -926,10 +925,14 @@
    int bitset_to_regs(unsigned int bitset, unsigned char* regs);
    Address add_memory_helper(const Address dst);
  
    void load_reserved(Register addr, enum operand_size size, Assembler::Aqrl acquire);
    void store_conditional(Register addr, Register new_val, enum operand_size size, Assembler::Aqrl release);
+ 
+ public:
+   void fast_lock(Register obj, Register hdr, Register tmp1, Register tmp2, Register tmp3, Label& slow);
+   void fast_unlock(Register obj, Register hdr, Register tmp1, Register tmp2, Label& slow);
  };
  
  #ifdef ASSERT
  inline bool AbstractAssembler::pd_check_instruction_mark() { return false; }
  #endif
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