1 /*
2 * Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_CodeStubs.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "classfile/javaClasses.hpp"
32 #include "nativeInst_x86.hpp"
33 #include "runtime/objectMonitor.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "utilities/align.hpp"
36 #include "utilities/macros.hpp"
37 #include "vmreg_x86.inline.hpp"
38
39
40 #define __ ce->masm()->
41
42 #ifndef _LP64
43 float ConversionStub::float_zero = 0.0;
44 double ConversionStub::double_zero = 0.0;
45
46 void ConversionStub::emit_code(LIR_Assembler* ce) {
47 __ bind(_entry);
48 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
49
50
51 if (input()->is_single_xmm()) {
52 __ comiss(input()->as_xmm_float_reg(),
53 ExternalAddress((address)&float_zero));
54 } else if (input()->is_double_xmm()) {
55 __ comisd(input()->as_xmm_double_reg(),
56 ExternalAddress((address)&double_zero));
57 } else {
58 __ push(rax);
59 __ ftst();
60 __ fnstsw_ax();
61 __ sahf();
62 __ pop(rax);
63 }
64
65 Label NaN, do_return;
66 __ jccb(Assembler::parity, NaN);
67 __ jccb(Assembler::below, do_return);
68
69 // input is > 0 -> return maxInt
70 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
71 __ decrement(result()->as_register());
72 __ jmpb(do_return);
73
74 // input is NaN -> return 0
75 __ bind(NaN);
76 __ xorptr(result()->as_register(), result()->as_register());
77
78 __ bind(do_return);
79 __ jmp(_continuation);
80 }
81 #endif // !_LP64
82
83 void C1SafepointPollStub::emit_code(LIR_Assembler* ce) {
84 __ bind(_entry);
85 InternalAddress safepoint_pc(ce->masm()->pc() - ce->masm()->offset() + safepoint_offset());
86 #ifdef _LP64
87 __ lea(rscratch1, safepoint_pc);
88 __ movptr(Address(r15_thread, JavaThread::saved_exception_pc_offset()), rscratch1);
89 #else
90 const Register tmp1 = rcx;
91 const Register tmp2 = rdx;
92 __ push(tmp1);
93 __ push(tmp2);
94
95 __ lea(tmp1, safepoint_pc);
96 __ get_thread(tmp2);
97 __ movptr(Address(tmp2, JavaThread::saved_exception_pc_offset()), tmp1);
98
99 __ pop(tmp2);
100 __ pop(tmp1);
101 #endif /* _LP64 */
102 assert(SharedRuntime::polling_page_return_handler_blob() != nullptr,
103 "polling page return stub not created yet");
104
105 address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
106 __ jump(RuntimeAddress(stub));
107 }
108
109 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
110 __ bind(_entry);
111 Metadata *m = _method->as_constant_ptr()->as_metadata();
112 ce->store_parameter(m, 1);
113 ce->store_parameter(_bci, 0);
114 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
115 ce->add_call_info_here(_info);
116 ce->verify_oop_map(_info);
117 __ jmp(_continuation);
118 }
119
120 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
121 __ bind(_entry);
122 if (_info->deoptimize_on_exception()) {
123 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
124 __ call(RuntimeAddress(a));
125 ce->add_call_info_here(_info);
126 ce->verify_oop_map(_info);
127 debug_only(__ should_not_reach_here());
128 return;
129 }
130
131 // pass the array index on stack because all registers must be preserved
132 if (_index->is_cpu_register()) {
133 ce->store_parameter(_index->as_register(), 0);
134 } else {
135 ce->store_parameter(_index->as_jint(), 0);
136 }
137 Runtime1::StubID stub_id;
138 if (_throw_index_out_of_bounds_exception) {
139 stub_id = Runtime1::throw_index_exception_id;
140 } else {
141 stub_id = Runtime1::throw_range_check_failed_id;
142 ce->store_parameter(_array->as_pointer_register(), 1);
143 }
144 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
145 ce->add_call_info_here(_info);
146 ce->verify_oop_map(_info);
147 debug_only(__ should_not_reach_here());
148 }
149
150 PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) {
151 _info = new CodeEmitInfo(info);
152 }
153
154 void PredicateFailedStub::emit_code(LIR_Assembler* ce) {
155 __ bind(_entry);
156 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
157 __ call(RuntimeAddress(a));
158 ce->add_call_info_here(_info);
159 ce->verify_oop_map(_info);
160 debug_only(__ should_not_reach_here());
161 }
162
163 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
164 if (_offset != -1) {
165 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
166 }
167 __ bind(_entry);
168 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
169 ce->add_call_info_here(_info);
170 debug_only(__ should_not_reach_here());
171 }
172
173
174 // Implementation of NewInstanceStub
175
176 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
177 _result = result;
178 _klass = klass;
179 _klass_reg = klass_reg;
180 _info = new CodeEmitInfo(info);
181 assert(stub_id == Runtime1::new_instance_id ||
182 stub_id == Runtime1::fast_new_instance_id ||
183 stub_id == Runtime1::fast_new_instance_init_check_id,
184 "need new_instance id");
185 _stub_id = stub_id;
186 }
187
188
189 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
190 assert(__ rsp_offset() == 0, "frame size should be fixed");
191 __ bind(_entry);
192 __ movptr(rdx, _klass_reg->as_register());
193 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
194 ce->add_call_info_here(_info);
195 ce->verify_oop_map(_info);
196 assert(_result->as_register() == rax, "result must in rax,");
197 __ jmp(_continuation);
198 }
199
200
201 // Implementation of NewTypeArrayStub
202
203 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
204 _klass_reg = klass_reg;
205 _length = length;
206 _result = result;
207 _info = new CodeEmitInfo(info);
208 }
209
210
211 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
212 assert(__ rsp_offset() == 0, "frame size should be fixed");
213 __ bind(_entry);
214 assert(_length->as_register() == rbx, "length must in rbx,");
215 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
216 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
217 ce->add_call_info_here(_info);
218 ce->verify_oop_map(_info);
219 assert(_result->as_register() == rax, "result must in rax,");
220 __ jmp(_continuation);
221 }
222
223
224 // Implementation of NewObjectArrayStub
225
226 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
227 _klass_reg = klass_reg;
228 _result = result;
229 _length = length;
230 _info = new CodeEmitInfo(info);
231 }
232
233
234 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
235 assert(__ rsp_offset() == 0, "frame size should be fixed");
236 __ bind(_entry);
237 assert(_length->as_register() == rbx, "length must in rbx,");
238 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
239 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
240 ce->add_call_info_here(_info);
241 ce->verify_oop_map(_info);
242 assert(_result->as_register() == rax, "result must in rax,");
243 __ jmp(_continuation);
244 }
245
246 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
247 assert(__ rsp_offset() == 0, "frame size should be fixed");
248 __ bind(_entry);
249 ce->store_parameter(_obj_reg->as_register(), 1);
250 ce->store_parameter(_lock_reg->as_register(), 0);
251 Runtime1::StubID enter_id;
252 if (ce->compilation()->has_fpu_code()) {
253 enter_id = Runtime1::monitorenter_id;
254 } else {
255 enter_id = Runtime1::monitorenter_nofpu_id;
256 }
257 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
258 ce->add_call_info_here(_info);
259 ce->verify_oop_map(_info);
260 __ jmp(_continuation);
261 }
262
263
264 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
265 __ bind(_entry);
266 if (_compute_lock) {
267 // lock_reg was destroyed by fast unlocking attempt => recompute it
268 ce->monitor_address(_monitor_ix, _lock_reg);
269 }
270 ce->store_parameter(_lock_reg->as_register(), 0);
271 // note: non-blocking leaf routine => no call info needed
272 Runtime1::StubID exit_id;
273 if (ce->compilation()->has_fpu_code()) {
274 exit_id = Runtime1::monitorexit_id;
275 } else {
276 exit_id = Runtime1::monitorexit_nofpu_id;
277 }
278 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
279 __ jmp(_continuation);
280 }
281
282 // Implementation of patching:
283 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
284 // - Replace original code with a call to the stub
285 // At Runtime:
286 // - call to stub, jump to runtime
287 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
288 // - in runtime: after initializing class, restore original code, reexecute instruction
289
290 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
291
292 void PatchingStub::align_patch_site(MacroAssembler* masm) {
293 // We're patching a 5-7 byte instruction on intel and we need to
294 // make sure that we don't see a piece of the instruction. It
295 // appears mostly impossible on Intel to simply invalidate other
296 // processors caches and since they may do aggressive prefetch it's
297 // very hard to make a guess about what code might be in the icache.
298 // Force the instruction to be double word aligned so that it
299 // doesn't span a cache line.
300 masm->align(align_up((int)NativeGeneralJump::instruction_size, wordSize));
301 }
302
303 void PatchingStub::emit_code(LIR_Assembler* ce) {
304 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
305
306 Label call_patch;
307
308 // static field accesses have special semantics while the class
309 // initializer is being run so we emit a test which can be used to
310 // check that this code is being executed by the initializing
311 // thread.
312 address being_initialized_entry = __ pc();
313 if (CommentedAssembly) {
314 __ block_comment(" patch template");
315 }
316 if (_id == load_klass_id) {
317 // produce a copy of the load klass instruction for use by the being initialized case
318 #ifdef ASSERT
319 address start = __ pc();
320 #endif
321 Metadata* o = nullptr;
322 __ mov_metadata(_obj, o);
323 #ifdef ASSERT
324 for (int i = 0; i < _bytes_to_copy; i++) {
325 address ptr = (address)(_pc_start + i);
326 int a_byte = (*ptr) & 0xFF;
327 assert(a_byte == *start++, "should be the same code");
328 }
329 #endif
330 } else if (_id == load_mirror_id) {
331 // produce a copy of the load mirror instruction for use by the being
332 // initialized case
333 #ifdef ASSERT
334 address start = __ pc();
335 #endif
336 jobject o = nullptr;
337 __ movoop(_obj, o);
338 #ifdef ASSERT
339 for (int i = 0; i < _bytes_to_copy; i++) {
340 address ptr = (address)(_pc_start + i);
341 int a_byte = (*ptr) & 0xFF;
342 assert(a_byte == *start++, "should be the same code");
343 }
344 #endif
345 } else {
346 // make a copy the code which is going to be patched.
347 for (int i = 0; i < _bytes_to_copy; i++) {
348 address ptr = (address)(_pc_start + i);
349 int a_byte = (*ptr) & 0xFF;
350 __ emit_int8(a_byte);
351 *ptr = 0x90; // make the site look like a nop
352 }
353 }
354
355 address end_of_patch = __ pc();
356 int bytes_to_skip = 0;
357 if (_id == load_mirror_id) {
358 int offset = __ offset();
359 if (CommentedAssembly) {
360 __ block_comment(" being_initialized check");
361 }
362 assert(_obj != noreg, "must be a valid register");
363 Register tmp = rax;
364 Register tmp2 = rbx;
365 __ push(tmp);
366 __ push(tmp2);
367 // Load without verification to keep code size small. We need it because
368 // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null.
369 __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset()));
370 __ get_thread(tmp);
371 __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset()));
372 __ pop(tmp2);
373 __ pop(tmp);
374 __ jcc(Assembler::notEqual, call_patch);
375
376 // access_field patches may execute the patched code before it's
377 // copied back into place so we need to jump back into the main
378 // code of the nmethod to continue execution.
379 __ jmp(_patch_site_continuation);
380
381 // make sure this extra code gets skipped
382 bytes_to_skip += __ offset() - offset;
383 }
384 if (CommentedAssembly) {
385 __ block_comment("patch data encoded as movl");
386 }
387 // Now emit the patch record telling the runtime how to find the
388 // pieces of the patch. We only need 3 bytes but for readability of
389 // the disassembly we make the data look like a movl reg, imm32,
390 // which requires 5 bytes
391 int sizeof_patch_record = 5;
392 bytes_to_skip += sizeof_patch_record;
393
394 // emit the offsets needed to find the code to patch
395 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
396
397 __ emit_int8((unsigned char)0xB8);
398 __ emit_int8(0);
399 __ emit_int8(being_initialized_entry_offset);
400 __ emit_int8(bytes_to_skip);
401 __ emit_int8(_bytes_to_copy);
402 address patch_info_pc = __ pc();
403 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
404
405 address entry = __ pc();
406 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
407 address target = nullptr;
408 relocInfo::relocType reloc_type = relocInfo::none;
409 switch (_id) {
410 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
411 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
412 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
413 case load_appendix_id: target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break;
414 default: ShouldNotReachHere();
415 }
416 __ bind(call_patch);
417
418 if (CommentedAssembly) {
419 __ block_comment("patch entry point");
420 }
421 __ call(RuntimeAddress(target));
422 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
423 ce->add_call_info_here(_info);
424 int jmp_off = __ offset();
425 __ jmp(_patch_site_entry);
426 // Add enough nops so deoptimization can overwrite the jmp above with a call
427 // and not destroy the world. We cannot use fat nops here, since the concurrent
428 // code rewrite may transiently create the illegal instruction sequence.
429 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
430 __ nop();
431 }
432 if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) {
433 CodeSection* cs = __ code_section();
434 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
435 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none);
436 }
437 }
438
439
440 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
441 __ bind(_entry);
442 ce->store_parameter(_trap_request, 0);
443 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
444 ce->add_call_info_here(_info);
445 DEBUG_ONLY(__ should_not_reach_here());
446 }
447
448
449 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
450 address a;
451 if (_info->deoptimize_on_exception()) {
452 // Deoptimize, do not throw the exception, because it is probably wrong to do it here.
453 a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id);
454 } else {
455 a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id);
456 }
457
458 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
459 __ bind(_entry);
460 __ call(RuntimeAddress(a));
461 ce->add_call_info_here(_info);
462 ce->verify_oop_map(_info);
463 debug_only(__ should_not_reach_here());
464 }
465
466
467 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
468 assert(__ rsp_offset() == 0, "frame size should be fixed");
469
470 __ bind(_entry);
471 // pass the object on stack because all registers must be preserved
472 if (_obj->is_cpu_register()) {
473 ce->store_parameter(_obj->as_register(), 0);
474 }
475 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
476 ce->add_call_info_here(_info);
477 debug_only(__ should_not_reach_here());
478 }
479
480
481 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
482 //---------------slow case: call to native-----------------
483 __ bind(_entry);
484 // Figure out where the args should go
485 // This should really convert the IntrinsicID to the Method* and signature
486 // but I don't know how to do that.
487 //
488 VMRegPair args[5];
489 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
490 SharedRuntime::java_calling_convention(signature, args, 5);
491
492 // push parameters
493 // (src, src_pos, dest, destPos, length)
494 Register r[5];
495 r[0] = src()->as_register();
496 r[1] = src_pos()->as_register();
497 r[2] = dst()->as_register();
498 r[3] = dst_pos()->as_register();
499 r[4] = length()->as_register();
500
501 // next registers will get stored on the stack
502 for (int i = 0; i < 5 ; i++ ) {
503 VMReg r_1 = args[i].first();
504 if (r_1->is_stack()) {
505 int st_off = r_1->reg2stack() * wordSize;
506 __ movptr (Address(rsp, st_off), r[i]);
507 } else {
508 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
509 }
510 }
511
512 ce->align_call(lir_static_call);
513
514 ce->emit_static_call_stub();
515 if (ce->compilation()->bailed_out()) {
516 return; // CodeCache is full
517 }
518 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
519 relocInfo::static_call_type);
520 __ call(resolve);
521 ce->add_call_info_here(info());
522
523 #ifndef PRODUCT
524 if (PrintC1Statistics) {
525 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt), rscratch1);
526 }
527 #endif
528
529 __ jmp(_continuation);
530 }
531
532 #undef __