1 /*
2 * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "gc/shared/c1/barrierSetC1.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/powerOfTwo.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 #ifdef _LP64
97 case floatTag: opr = FrameMap::xmm0_float_opr; break;
98 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
99 #else
100 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
101 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
102 #endif // _LP64
103 case addressTag:
104 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
105 }
106
107 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
108 return opr;
109 }
110
111
112 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
113 LIR_Opr reg = new_register(T_INT);
114 set_vreg_flag(reg, LIRGenerator::byte_reg);
115 return reg;
116 }
117
118
119 //--------- loading items into registers --------------------------------
120
121
122 // i486 instructions can inline constants
123 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
124 if (type == T_SHORT || type == T_CHAR) {
125 return false;
126 }
127 Constant* c = v->as_Constant();
128 if (c && c->state_before() == NULL) {
129 // constants of any type can be stored directly, except for
130 // unloaded object constants.
131 return true;
132 }
133 return false;
134 }
135
136
137 bool LIRGenerator::can_inline_as_constant(Value v) const {
138 if (v->type()->tag() == longTag) return false;
139 return v->type()->tag() != objectTag ||
140 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
141 }
142
143
144 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
145 if (c->type() == T_LONG) return false;
146 return c->type() != T_OBJECT || c->as_jobject() == NULL;
147 }
148
149
150 LIR_Opr LIRGenerator::safepoint_poll_register() {
151 NOT_LP64( return new_register(T_ADDRESS); )
152 return LIR_OprFact::illegalOpr;
153 }
154
155
156 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
157 int shift, int disp, BasicType type) {
158 assert(base->is_register(), "must be");
159 if (index->is_constant()) {
160 LIR_Const *constant = index->as_constant_ptr();
161 #ifdef _LP64
162 jlong c;
163 if (constant->type() == T_INT) {
164 c = (jlong(index->as_jint()) << shift) + disp;
165 } else {
166 assert(constant->type() == T_LONG, "should be");
167 c = (index->as_jlong() << shift) + disp;
168 }
169 if ((jlong)((jint)c) == c) {
170 return new LIR_Address(base, (jint)c, type);
171 } else {
172 LIR_Opr tmp = new_register(T_LONG);
173 __ move(index, tmp);
174 return new LIR_Address(base, tmp, type);
175 }
176 #else
177 return new LIR_Address(base,
178 ((intx)(constant->as_jint()) << shift) + disp,
179 type);
180 #endif
181 } else {
182 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
183 }
184 }
185
186
187 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
188 BasicType type) {
189 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
190
191 LIR_Address* addr;
192 if (index_opr->is_constant()) {
193 int elem_size = type2aelembytes(type);
194 #ifdef _LP64
195 jint index = index_opr->as_jint();
196 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
197 if (disp > max_jint) {
198 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
199 // Convert array index to long to do array offset computation with 64-bit values.
200 index_opr = new_register(T_LONG);
201 __ move(LIR_OprFact::longConst(index), index_opr);
202 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
203 } else {
204 addr = new LIR_Address(array_opr, (intx)disp, type);
205 }
206 #else
207 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range!
208 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will
209 // always be negative (i.e. underflows the 32-bit address range):
210 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N.
211 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then
212 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always
213 // underflows the 32-bit address range:
214 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N)
215 // = (a + disp - N) + N = a + disp
216 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address
217 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms.
218 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
219 #endif // _LP64
220 } else {
221 #ifdef _LP64
222 if (index_opr->type() == T_INT) {
223 LIR_Opr tmp = new_register(T_LONG);
224 __ convert(Bytecodes::_i2l, index_opr, tmp);
225 index_opr = tmp;
226 }
227 #endif // _LP64
228 addr = new LIR_Address(array_opr,
229 index_opr,
230 LIR_Address::scale(type),
231 offset_in_bytes, type);
232 }
233 return addr;
234 }
235
236
237 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
238 LIR_Opr r;
239 if (type == T_LONG) {
240 r = LIR_OprFact::longConst(x);
241 } else if (type == T_INT) {
242 r = LIR_OprFact::intConst(checked_cast<jint>(x));
243 } else {
244 ShouldNotReachHere();
245 }
246 return r;
247 }
248
249 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
250 LIR_Opr pointer = new_pointer_register();
251 __ move(LIR_OprFact::intptrConst(counter), pointer);
252 LIR_Address* addr = new LIR_Address(pointer, type);
253 increment_counter(addr, step);
254 }
255
256
257 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
258 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
259 }
260
261 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
262 __ cmp_mem_int(condition, base, disp, c, info);
263 }
264
265
266 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
267 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
268 }
269
270
271 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
272 if (tmp->is_valid() && c > 0 && c < max_jint) {
273 if (is_power_of_2(c + 1)) {
274 __ move(left, tmp);
275 __ shift_left(left, log2i_exact(c + 1), left);
276 __ sub(left, tmp, result);
277 return true;
278 } else if (is_power_of_2(c - 1)) {
279 __ move(left, tmp);
280 __ shift_left(left, log2i_exact(c - 1), left);
281 __ add(left, tmp, result);
282 return true;
283 }
284 }
285 return false;
286 }
287
288
289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
290 BasicType type = item->type();
291 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
292 }
293
294 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
295 LIR_Opr tmp1 = new_register(objectType);
296 LIR_Opr tmp2 = new_register(objectType);
297 LIR_Opr tmp3 = new_register(objectType);
298 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
299 }
300
301 //----------------------------------------------------------------------
302 // visitor functions
303 //----------------------------------------------------------------------
304
305 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
306 assert(x->is_pinned(),"");
307 LIRItem obj(x->obj(), this);
308 obj.load_item();
309
310 set_no_result(x);
311
312 // "lock" stores the address of the monitor stack slot, so this is not an oop
313 LIR_Opr lock = new_register(T_INT);
314
315 CodeEmitInfo* info_for_exception = NULL;
316 if (x->needs_null_check()) {
317 info_for_exception = state_for(x);
318 }
319 // this CodeEmitInfo must not have the xhandlers because here the
320 // object is already locked (xhandlers expect object to be unlocked)
321 CodeEmitInfo* info = state_for(x, x->state(), true);
322 monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr,
323 x->monitor_no(), info_for_exception, info);
324 }
325
326
327 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
328 assert(x->is_pinned(),"");
329
330 LIRItem obj(x->obj(), this);
331 obj.dont_load_item();
332
333 LIR_Opr lock = new_register(T_INT);
334 LIR_Opr obj_temp = new_register(T_INT);
335 set_no_result(x);
336 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
337 }
338
339 // _ineg, _lneg, _fneg, _dneg
340 void LIRGenerator::do_NegateOp(NegateOp* x) {
341 LIRItem value(x->x(), this);
342 value.set_destroys_register();
343 value.load_item();
344 LIR_Opr reg = rlock(x);
345
346 LIR_Opr tmp = LIR_OprFact::illegalOpr;
347 #ifdef _LP64
348 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
349 if (x->type()->tag() == doubleTag) {
350 tmp = new_register(T_DOUBLE);
351 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
352 }
353 else if (x->type()->tag() == floatTag) {
354 tmp = new_register(T_FLOAT);
355 __ move(LIR_OprFact::floatConst(-0.0), tmp);
356 }
357 }
358 #endif
359 __ negate(value.result(), reg, tmp);
360
361 set_result(x, round_item(reg));
362 }
363
364 // for _fadd, _fmul, _fsub, _fdiv, _frem
365 // _dadd, _dmul, _dsub, _ddiv, _drem
366 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
367 LIRItem left(x->x(), this);
368 LIRItem right(x->y(), this);
369 LIRItem* left_arg = &left;
370 LIRItem* right_arg = &right;
371 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
372 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
373 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
374 left.load_item();
375 } else {
376 left.dont_load_item();
377 }
378
379 #ifndef _LP64
380 // do not load right operand if it is a constant. only 0 and 1 are
381 // loaded because there are special instructions for loading them
382 // without memory access (not needed for SSE2 instructions)
383 bool must_load_right = false;
384 if (right.is_constant()) {
385 LIR_Const* c = right.result()->as_constant_ptr();
386 assert(c != NULL, "invalid constant");
387 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
388
389 if (c->type() == T_FLOAT) {
390 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
391 } else {
392 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
393 }
394 }
395 #endif // !LP64
396
397 if (must_load_both) {
398 // frem and drem destroy also right operand, so move it to a new register
399 right.set_destroys_register();
400 right.load_item();
401 } else if (right.is_register()) {
402 right.load_item();
403 #ifndef _LP64
404 } else if (must_load_right) {
405 right.load_item();
406 #endif // !LP64
407 } else {
408 right.dont_load_item();
409 }
410 LIR_Opr reg = rlock(x);
411 LIR_Opr tmp = LIR_OprFact::illegalOpr;
412 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
413 tmp = new_register(T_DOUBLE);
414 }
415
416 #ifdef _LP64
417 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
418 // frem and drem are implemented as a direct call into the runtime.
419 LIRItem left(x->x(), this);
420 LIRItem right(x->y(), this);
421
422 BasicType bt = as_BasicType(x->type());
423 BasicTypeList signature(2);
424 signature.append(bt);
425 signature.append(bt);
426 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
427
428 const LIR_Opr result_reg = result_register_for(x->type());
429 left.load_item_force(cc->at(0));
430 right.load_item_force(cc->at(1));
431
432 address entry = NULL;
433 switch (x->op()) {
434 case Bytecodes::_frem:
435 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
436 break;
437 case Bytecodes::_drem:
438 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
439 break;
440 default:
441 ShouldNotReachHere();
442 }
443
444 LIR_Opr result = rlock_result(x);
445 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
446 __ move(result_reg, result);
447 } else {
448 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
449 set_result(x, round_item(reg));
450 }
451 #else
452 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
453 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
454 LIR_Opr fpu0, fpu1;
455 if (x->op() == Bytecodes::_frem) {
456 fpu0 = LIR_OprFact::single_fpu(0);
457 fpu1 = LIR_OprFact::single_fpu(1);
458 } else {
459 fpu0 = LIR_OprFact::double_fpu(0);
460 fpu1 = LIR_OprFact::double_fpu(1);
461 }
462 __ move(right.result(), fpu1); // order of left and right operand is important!
463 __ move(left.result(), fpu0);
464 __ rem (fpu0, fpu1, fpu0);
465 __ move(fpu0, reg);
466
467 } else {
468 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
469 }
470 set_result(x, round_item(reg));
471 #endif // _LP64
472 }
473
474
475 // for _ladd, _lmul, _lsub, _ldiv, _lrem
476 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
477 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
478 // long division is implemented as a direct call into the runtime
479 LIRItem left(x->x(), this);
480 LIRItem right(x->y(), this);
481
482 // the check for division by zero destroys the right operand
483 right.set_destroys_register();
484
485 BasicTypeList signature(2);
486 signature.append(T_LONG);
487 signature.append(T_LONG);
488 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
489
490 // check for division by zero (destroys registers of right operand!)
491 CodeEmitInfo* info = state_for(x);
492
493 const LIR_Opr result_reg = result_register_for(x->type());
494 left.load_item_force(cc->at(1));
495 right.load_item();
496
497 __ move(right.result(), cc->at(0));
498
499 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
500 __ branch(lir_cond_equal, new DivByZeroStub(info));
501
502 address entry = NULL;
503 switch (x->op()) {
504 case Bytecodes::_lrem:
505 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
506 break; // check if dividend is 0 is done elsewhere
507 case Bytecodes::_ldiv:
508 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
509 break; // check if dividend is 0 is done elsewhere
510 default:
511 ShouldNotReachHere();
512 }
513
514 LIR_Opr result = rlock_result(x);
515 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
516 __ move(result_reg, result);
517 } else if (x->op() == Bytecodes::_lmul) {
518 // missing test if instr is commutative and if we should swap
519 LIRItem left(x->x(), this);
520 LIRItem right(x->y(), this);
521
522 // right register is destroyed by the long mul, so it must be
523 // copied to a new register.
524 right.set_destroys_register();
525
526 left.load_item();
527 right.load_item();
528
529 LIR_Opr reg = FrameMap::long0_opr;
530 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
531 LIR_Opr result = rlock_result(x);
532 __ move(reg, result);
533 } else {
534 // missing test if instr is commutative and if we should swap
535 LIRItem left(x->x(), this);
536 LIRItem right(x->y(), this);
537
538 left.load_item();
539 // don't load constants to save register
540 right.load_nonconstant();
541 rlock_result(x);
542 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
543 }
544 }
545
546
547
548 // for: _iadd, _imul, _isub, _idiv, _irem
549 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
550 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
551 // The requirements for division and modulo
552 // input : rax,: dividend min_int
553 // reg: divisor (may not be rax,/rdx) -1
554 //
555 // output: rax,: quotient (= rax, idiv reg) min_int
556 // rdx: remainder (= rax, irem reg) 0
557
558 // rax, and rdx will be destroyed
559
560 // Note: does this invalidate the spec ???
561 LIRItem right(x->y(), this);
562 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
563
564 // call state_for before load_item_force because state_for may
565 // force the evaluation of other instructions that are needed for
566 // correct debug info. Otherwise the live range of the fix
567 // register might be too long.
568 CodeEmitInfo* info = state_for(x);
569
570 left.load_item_force(divInOpr());
571
572 right.load_item();
573
574 LIR_Opr result = rlock_result(x);
575 LIR_Opr result_reg;
576 if (x->op() == Bytecodes::_idiv) {
577 result_reg = divOutOpr();
578 } else {
579 result_reg = remOutOpr();
580 }
581
582 if (!ImplicitDiv0Checks) {
583 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
584 __ branch(lir_cond_equal, new DivByZeroStub(info));
585 // Idiv/irem cannot trap (passing info would generate an assertion).
586 info = NULL;
587 }
588 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
589 if (x->op() == Bytecodes::_irem) {
590 __ irem(left.result(), right.result(), result_reg, tmp, info);
591 } else if (x->op() == Bytecodes::_idiv) {
592 __ idiv(left.result(), right.result(), result_reg, tmp, info);
593 } else {
594 ShouldNotReachHere();
595 }
596
597 __ move(result_reg, result);
598 } else {
599 // missing test if instr is commutative and if we should swap
600 LIRItem left(x->x(), this);
601 LIRItem right(x->y(), this);
602 LIRItem* left_arg = &left;
603 LIRItem* right_arg = &right;
604 if (x->is_commutative() && left.is_stack() && right.is_register()) {
605 // swap them if left is real stack (or cached) and right is real register(not cached)
606 left_arg = &right;
607 right_arg = &left;
608 }
609
610 left_arg->load_item();
611
612 // do not need to load right, as we can handle stack and constants
613 if (x->op() == Bytecodes::_imul ) {
614 // check if we can use shift instead
615 bool use_constant = false;
616 bool use_tmp = false;
617 if (right_arg->is_constant()) {
618 jint iconst = right_arg->get_jint_constant();
619 if (iconst > 0 && iconst < max_jint) {
620 if (is_power_of_2(iconst)) {
621 use_constant = true;
622 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
623 use_constant = true;
624 use_tmp = true;
625 }
626 }
627 }
628 if (use_constant) {
629 right_arg->dont_load_item();
630 } else {
631 right_arg->load_item();
632 }
633 LIR_Opr tmp = LIR_OprFact::illegalOpr;
634 if (use_tmp) {
635 tmp = new_register(T_INT);
636 }
637 rlock_result(x);
638
639 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
640 } else {
641 right_arg->dont_load_item();
642 rlock_result(x);
643 LIR_Opr tmp = LIR_OprFact::illegalOpr;
644 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
645 }
646 }
647 }
648
649
650 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
651 // when an operand with use count 1 is the left operand, then it is
652 // likely that no move for 2-operand-LIR-form is necessary
653 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
654 x->swap_operands();
655 }
656
657 ValueTag tag = x->type()->tag();
658 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
659 switch (tag) {
660 case floatTag:
661 case doubleTag: do_ArithmeticOp_FPU(x); return;
662 case longTag: do_ArithmeticOp_Long(x); return;
663 case intTag: do_ArithmeticOp_Int(x); return;
664 default: ShouldNotReachHere(); return;
665 }
666 }
667
668
669 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
670 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
671 // count must always be in rcx
672 LIRItem value(x->x(), this);
673 LIRItem count(x->y(), this);
674
675 ValueTag elemType = x->type()->tag();
676 bool must_load_count = !count.is_constant() || elemType == longTag;
677 if (must_load_count) {
678 // count for long must be in register
679 count.load_item_force(shiftCountOpr());
680 } else {
681 count.dont_load_item();
682 }
683 value.load_item();
684 LIR_Opr reg = rlock_result(x);
685
686 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
687 }
688
689
690 // _iand, _land, _ior, _lor, _ixor, _lxor
691 void LIRGenerator::do_LogicOp(LogicOp* x) {
692 // when an operand with use count 1 is the left operand, then it is
693 // likely that no move for 2-operand-LIR-form is necessary
694 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
695 x->swap_operands();
696 }
697
698 LIRItem left(x->x(), this);
699 LIRItem right(x->y(), this);
700
701 left.load_item();
702 right.load_nonconstant();
703 LIR_Opr reg = rlock_result(x);
704
705 logic_op(x->op(), reg, left.result(), right.result());
706 }
707
708
709
710 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
711 void LIRGenerator::do_CompareOp(CompareOp* x) {
712 LIRItem left(x->x(), this);
713 LIRItem right(x->y(), this);
714 ValueTag tag = x->x()->type()->tag();
715 if (tag == longTag) {
716 left.set_destroys_register();
717 }
718 left.load_item();
719 right.load_item();
720 LIR_Opr reg = rlock_result(x);
721
722 if (x->x()->type()->is_float_kind()) {
723 Bytecodes::Code code = x->op();
724 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
725 } else if (x->x()->type()->tag() == longTag) {
726 __ lcmp2int(left.result(), right.result(), reg);
727 } else {
728 Unimplemented();
729 }
730 }
731
732 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
733 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
734 if (is_reference_type(type)) {
735 cmp_value.load_item_force(FrameMap::rax_oop_opr);
736 new_value.load_item();
737 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
738 } else if (type == T_INT) {
739 cmp_value.load_item_force(FrameMap::rax_opr);
740 new_value.load_item();
741 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
742 } else if (type == T_LONG) {
743 cmp_value.load_item_force(FrameMap::long0_opr);
744 new_value.load_item_force(FrameMap::long1_opr);
745 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
746 } else {
747 Unimplemented();
748 }
749 LIR_Opr result = new_register(T_INT);
750 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
751 result, T_INT);
752 return result;
753 }
754
755 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
756 bool is_oop = is_reference_type(type);
757 LIR_Opr result = new_register(type);
758 value.load_item();
759 // Because we want a 2-arg form of xchg and xadd
760 __ move(value.result(), result);
761 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
762 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
763 return result;
764 }
765
766 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
767 LIR_Opr result = new_register(type);
768 value.load_item();
769 // Because we want a 2-arg form of xchg and xadd
770 __ move(value.result(), result);
771 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
772 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
773 return result;
774 }
775
776 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
777 assert(x->number_of_arguments() == 3, "wrong type");
778 assert(UseFMA, "Needs FMA instructions support.");
779 LIRItem value(x->argument_at(0), this);
780 LIRItem value1(x->argument_at(1), this);
781 LIRItem value2(x->argument_at(2), this);
782
783 value2.set_destroys_register();
784
785 value.load_item();
786 value1.load_item();
787 value2.load_item();
788
789 LIR_Opr calc_input = value.result();
790 LIR_Opr calc_input1 = value1.result();
791 LIR_Opr calc_input2 = value2.result();
792 LIR_Opr calc_result = rlock_result(x);
793
794 switch (x->id()) {
795 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
796 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
797 default: ShouldNotReachHere();
798 }
799
800 }
801
802
803 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
804 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
805
806 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
807 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
808 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
809 x->id() == vmIntrinsics::_dlog10) {
810 do_LibmIntrinsic(x);
811 return;
812 }
813
814 LIRItem value(x->argument_at(0), this);
815
816 bool use_fpu = false;
817 #ifndef _LP64
818 if (UseSSE < 2) {
819 value.set_destroys_register();
820 }
821 #endif // !LP64
822 value.load_item();
823
824 LIR_Opr calc_input = value.result();
825 LIR_Opr calc_result = rlock_result(x);
826
827 LIR_Opr tmp = LIR_OprFact::illegalOpr;
828 #ifdef _LP64
829 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
830 (x->id() == vmIntrinsics::_dabs)) {
831 tmp = new_register(T_DOUBLE);
832 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
833 }
834 #endif
835
836 switch(x->id()) {
837 case vmIntrinsics::_dabs:
838 __ abs(calc_input, calc_result, tmp);
839 break;
840 case vmIntrinsics::_dsqrt:
841 case vmIntrinsics::_dsqrt_strict:
842 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
843 break;
844 default:
845 ShouldNotReachHere();
846 }
847
848 if (use_fpu) {
849 __ move(calc_result, x->operand());
850 }
851 }
852
853 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
854 LIRItem value(x->argument_at(0), this);
855 value.set_destroys_register();
856
857 LIR_Opr calc_result = rlock_result(x);
858 LIR_Opr result_reg = result_register_for(x->type());
859
860 CallingConvention* cc = NULL;
861
862 if (x->id() == vmIntrinsics::_dpow) {
863 LIRItem value1(x->argument_at(1), this);
864
865 value1.set_destroys_register();
866
867 BasicTypeList signature(2);
868 signature.append(T_DOUBLE);
869 signature.append(T_DOUBLE);
870 cc = frame_map()->c_calling_convention(&signature);
871 value.load_item_force(cc->at(0));
872 value1.load_item_force(cc->at(1));
873 } else {
874 BasicTypeList signature(1);
875 signature.append(T_DOUBLE);
876 cc = frame_map()->c_calling_convention(&signature);
877 value.load_item_force(cc->at(0));
878 }
879
880 #ifndef _LP64
881 LIR_Opr tmp = FrameMap::fpu0_double_opr;
882 result_reg = tmp;
883 switch(x->id()) {
884 case vmIntrinsics::_dexp:
885 if (StubRoutines::dexp() != NULL) {
886 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
887 } else {
888 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
889 }
890 break;
891 case vmIntrinsics::_dlog:
892 if (StubRoutines::dlog() != NULL) {
893 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
894 } else {
895 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
896 }
897 break;
898 case vmIntrinsics::_dlog10:
899 if (StubRoutines::dlog10() != NULL) {
900 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
901 } else {
902 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
903 }
904 break;
905 case vmIntrinsics::_dpow:
906 if (StubRoutines::dpow() != NULL) {
907 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
908 } else {
909 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
910 }
911 break;
912 case vmIntrinsics::_dsin:
913 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
914 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
915 } else {
916 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
917 }
918 break;
919 case vmIntrinsics::_dcos:
920 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
921 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
922 } else {
923 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
924 }
925 break;
926 case vmIntrinsics::_dtan:
927 if (StubRoutines::dtan() != NULL) {
928 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
929 } else {
930 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
931 }
932 break;
933 default: ShouldNotReachHere();
934 }
935 #else
936 switch (x->id()) {
937 case vmIntrinsics::_dexp:
938 if (StubRoutines::dexp() != NULL) {
939 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
940 } else {
941 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
942 }
943 break;
944 case vmIntrinsics::_dlog:
945 if (StubRoutines::dlog() != NULL) {
946 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
947 } else {
948 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
949 }
950 break;
951 case vmIntrinsics::_dlog10:
952 if (StubRoutines::dlog10() != NULL) {
953 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
954 } else {
955 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
956 }
957 break;
958 case vmIntrinsics::_dpow:
959 if (StubRoutines::dpow() != NULL) {
960 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
961 } else {
962 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
963 }
964 break;
965 case vmIntrinsics::_dsin:
966 if (StubRoutines::dsin() != NULL) {
967 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
968 } else {
969 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
970 }
971 break;
972 case vmIntrinsics::_dcos:
973 if (StubRoutines::dcos() != NULL) {
974 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
975 } else {
976 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
977 }
978 break;
979 case vmIntrinsics::_dtan:
980 if (StubRoutines::dtan() != NULL) {
981 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
982 } else {
983 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
984 }
985 break;
986 default: ShouldNotReachHere();
987 }
988 #endif // _LP64
989 __ move(result_reg, calc_result);
990 }
991
992 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
993 assert(x->number_of_arguments() == 5, "wrong type");
994
995 // Make all state_for calls early since they can emit code
996 CodeEmitInfo* info = state_for(x, x->state());
997
998 LIRItem src(x->argument_at(0), this);
999 LIRItem src_pos(x->argument_at(1), this);
1000 LIRItem dst(x->argument_at(2), this);
1001 LIRItem dst_pos(x->argument_at(3), this);
1002 LIRItem length(x->argument_at(4), this);
1003
1004 // operands for arraycopy must use fixed registers, otherwise
1005 // LinearScan will fail allocation (because arraycopy always needs a
1006 // call)
1007
1008 #ifndef _LP64
1009 src.load_item_force (FrameMap::rcx_oop_opr);
1010 src_pos.load_item_force (FrameMap::rdx_opr);
1011 dst.load_item_force (FrameMap::rax_oop_opr);
1012 dst_pos.load_item_force (FrameMap::rbx_opr);
1013 length.load_item_force (FrameMap::rdi_opr);
1014 LIR_Opr tmp = (FrameMap::rsi_opr);
1015 #else
1016
1017 // The java calling convention will give us enough registers
1018 // so that on the stub side the args will be perfect already.
1019 // On the other slow/special case side we call C and the arg
1020 // positions are not similar enough to pick one as the best.
1021 // Also because the java calling convention is a "shifted" version
1022 // of the C convention we can process the java args trivially into C
1023 // args without worry of overwriting during the xfer
1024
1025 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1026 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1027 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1028 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1029 length.load_item_force (FrameMap::as_opr(j_rarg4));
1030
1031 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1032 #endif // LP64
1033
1034 set_no_result(x);
1035
1036 int flags;
1037 ciArrayKlass* expected_type;
1038 arraycopy_helper(x, &flags, &expected_type);
1039
1040 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1041 }
1042
1043 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1044 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1045 // Make all state_for calls early since they can emit code
1046 LIR_Opr result = rlock_result(x);
1047 int flags = 0;
1048 switch (x->id()) {
1049 case vmIntrinsics::_updateCRC32: {
1050 LIRItem crc(x->argument_at(0), this);
1051 LIRItem val(x->argument_at(1), this);
1052 // val is destroyed by update_crc32
1053 val.set_destroys_register();
1054 crc.load_item();
1055 val.load_item();
1056 __ update_crc32(crc.result(), val.result(), result);
1057 break;
1058 }
1059 case vmIntrinsics::_updateBytesCRC32:
1060 case vmIntrinsics::_updateByteBufferCRC32: {
1061 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1062
1063 LIRItem crc(x->argument_at(0), this);
1064 LIRItem buf(x->argument_at(1), this);
1065 LIRItem off(x->argument_at(2), this);
1066 LIRItem len(x->argument_at(3), this);
1067 buf.load_item();
1068 off.load_nonconstant();
1069
1070 LIR_Opr index = off.result();
1071 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1072 if(off.result()->is_constant()) {
1073 index = LIR_OprFact::illegalOpr;
1074 offset += off.result()->as_jint();
1075 }
1076 LIR_Opr base_op = buf.result();
1077
1078 #ifndef _LP64
1079 if (!is_updateBytes) { // long b raw address
1080 base_op = new_register(T_INT);
1081 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1082 }
1083 #else
1084 if (index->is_valid()) {
1085 LIR_Opr tmp = new_register(T_LONG);
1086 __ convert(Bytecodes::_i2l, index, tmp);
1087 index = tmp;
1088 }
1089 #endif
1090
1091 LIR_Address* a = new LIR_Address(base_op,
1092 index,
1093 offset,
1094 T_BYTE);
1095 BasicTypeList signature(3);
1096 signature.append(T_INT);
1097 signature.append(T_ADDRESS);
1098 signature.append(T_INT);
1099 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1100 const LIR_Opr result_reg = result_register_for(x->type());
1101
1102 LIR_Opr addr = new_pointer_register();
1103 __ leal(LIR_OprFact::address(a), addr);
1104
1105 crc.load_item_force(cc->at(0));
1106 __ move(addr, cc->at(1));
1107 len.load_item_force(cc->at(2));
1108
1109 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1110 __ move(result_reg, result);
1111
1112 break;
1113 }
1114 default: {
1115 ShouldNotReachHere();
1116 }
1117 }
1118 }
1119
1120 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1121 Unimplemented();
1122 }
1123
1124 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1125 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1126
1127 // Make all state_for calls early since they can emit code
1128 LIR_Opr result = rlock_result(x);
1129
1130 LIRItem a(x->argument_at(0), this); // Object
1131 LIRItem aOffset(x->argument_at(1), this); // long
1132 LIRItem b(x->argument_at(2), this); // Object
1133 LIRItem bOffset(x->argument_at(3), this); // long
1134 LIRItem length(x->argument_at(4), this); // int
1135 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1136
1137 a.load_item();
1138 aOffset.load_nonconstant();
1139 b.load_item();
1140 bOffset.load_nonconstant();
1141
1142 long constant_aOffset = 0;
1143 LIR_Opr result_aOffset = aOffset.result();
1144 if (result_aOffset->is_constant()) {
1145 constant_aOffset = result_aOffset->as_jlong();
1146 result_aOffset = LIR_OprFact::illegalOpr;
1147 }
1148 LIR_Opr result_a = a.result();
1149
1150 long constant_bOffset = 0;
1151 LIR_Opr result_bOffset = bOffset.result();
1152 if (result_bOffset->is_constant()) {
1153 constant_bOffset = result_bOffset->as_jlong();
1154 result_bOffset = LIR_OprFact::illegalOpr;
1155 }
1156 LIR_Opr result_b = b.result();
1157
1158 #ifndef _LP64
1159 result_a = new_register(T_INT);
1160 __ convert(Bytecodes::_l2i, a.result(), result_a);
1161 result_b = new_register(T_INT);
1162 __ convert(Bytecodes::_l2i, b.result(), result_b);
1163 #endif
1164
1165
1166 LIR_Address* addr_a = new LIR_Address(result_a,
1167 result_aOffset,
1168 constant_aOffset,
1169 T_BYTE);
1170
1171 LIR_Address* addr_b = new LIR_Address(result_b,
1172 result_bOffset,
1173 constant_bOffset,
1174 T_BYTE);
1175
1176 BasicTypeList signature(4);
1177 signature.append(T_ADDRESS);
1178 signature.append(T_ADDRESS);
1179 signature.append(T_INT);
1180 signature.append(T_INT);
1181 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1182 const LIR_Opr result_reg = result_register_for(x->type());
1183
1184 LIR_Opr ptr_addr_a = new_pointer_register();
1185 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1186
1187 LIR_Opr ptr_addr_b = new_pointer_register();
1188 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1189
1190 __ move(ptr_addr_a, cc->at(0));
1191 __ move(ptr_addr_b, cc->at(1));
1192 length.load_item_force(cc->at(2));
1193 log2ArrayIndexScale.load_item_force(cc->at(3));
1194
1195 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1196 __ move(result_reg, result);
1197 }
1198
1199 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1200 // _i2b, _i2c, _i2s
1201 LIR_Opr fixed_register_for(BasicType type) {
1202 switch (type) {
1203 case T_FLOAT: return FrameMap::fpu0_float_opr;
1204 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1205 case T_INT: return FrameMap::rax_opr;
1206 case T_LONG: return FrameMap::long0_opr;
1207 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1208 }
1209 }
1210
1211 void LIRGenerator::do_Convert(Convert* x) {
1212 #ifdef _LP64
1213 LIRItem value(x->value(), this);
1214 value.load_item();
1215 LIR_Opr input = value.result();
1216 LIR_Opr result = rlock(x);
1217 __ convert(x->op(), input, result);
1218 assert(result->is_virtual(), "result must be virtual register");
1219 set_result(x, result);
1220 #else
1221 // flags that vary for the different operations and different SSE-settings
1222 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1223
1224 switch (x->op()) {
1225 case Bytecodes::_i2l: // fall through
1226 case Bytecodes::_l2i: // fall through
1227 case Bytecodes::_i2b: // fall through
1228 case Bytecodes::_i2c: // fall through
1229 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1230
1231 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1232 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1233 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1234 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1235 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1236 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1237 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1238 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1239 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1240 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1241 default: ShouldNotReachHere();
1242 }
1243
1244 LIRItem value(x->value(), this);
1245 value.load_item();
1246 LIR_Opr input = value.result();
1247 LIR_Opr result = rlock(x);
1248
1249 // arguments of lir_convert
1250 LIR_Opr conv_input = input;
1251 LIR_Opr conv_result = result;
1252 ConversionStub* stub = NULL;
1253
1254 if (fixed_input) {
1255 conv_input = fixed_register_for(input->type());
1256 __ move(input, conv_input);
1257 }
1258
1259 assert(fixed_result == false || round_result == false, "cannot set both");
1260 if (fixed_result) {
1261 conv_result = fixed_register_for(result->type());
1262 } else if (round_result) {
1263 result = new_register(result->type());
1264 set_vreg_flag(result, must_start_in_memory);
1265 }
1266
1267 if (needs_stub) {
1268 stub = new ConversionStub(x->op(), conv_input, conv_result);
1269 }
1270
1271 __ convert(x->op(), conv_input, conv_result, stub);
1272
1273 if (result != conv_result) {
1274 __ move(conv_result, result);
1275 }
1276
1277 assert(result->is_virtual(), "result must be virtual register");
1278 set_result(x, result);
1279 #endif // _LP64
1280 }
1281
1282
1283 void LIRGenerator::do_NewInstance(NewInstance* x) {
1284 print_if_not_loaded(x);
1285
1286 CodeEmitInfo* info = state_for(x, x->state());
1287 LIR_Opr reg = result_register_for(x->type());
1288 new_instance(reg, x->klass(), x->is_unresolved(),
1289 FrameMap::rcx_oop_opr,
1290 FrameMap::rdi_oop_opr,
1291 FrameMap::rsi_oop_opr,
1292 LIR_OprFact::illegalOpr,
1293 FrameMap::rdx_metadata_opr, info);
1294 LIR_Opr result = rlock_result(x);
1295 __ move(reg, result);
1296 }
1297
1298
1299 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1300 CodeEmitInfo* info = state_for(x, x->state());
1301
1302 LIRItem length(x->length(), this);
1303 length.load_item_force(FrameMap::rbx_opr);
1304
1305 LIR_Opr reg = result_register_for(x->type());
1306 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1307 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1308 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1309 LIR_Opr tmp4 = reg;
1310 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1311 LIR_Opr len = length.result();
1312 BasicType elem_type = x->elt_type();
1313
1314 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1315
1316 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1317 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1318
1319 LIR_Opr result = rlock_result(x);
1320 __ move(reg, result);
1321 }
1322
1323
1324 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1325 LIRItem length(x->length(), this);
1326 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1327 // and therefore provide the state before the parameters have been consumed
1328 CodeEmitInfo* patching_info = NULL;
1329 if (!x->klass()->is_loaded() || PatchALot) {
1330 patching_info = state_for(x, x->state_before());
1331 }
1332
1333 CodeEmitInfo* info = state_for(x, x->state());
1334
1335 const LIR_Opr reg = result_register_for(x->type());
1336 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1337 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1338 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1339 LIR_Opr tmp4 = reg;
1340 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1341
1342 length.load_item_force(FrameMap::rbx_opr);
1343 LIR_Opr len = length.result();
1344
1345 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1346 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1347 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1348 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1349 }
1350 klass2reg_with_patching(klass_reg, obj, patching_info);
1351 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1352
1353 LIR_Opr result = rlock_result(x);
1354 __ move(reg, result);
1355 }
1356
1357
1358 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1359 Values* dims = x->dims();
1360 int i = dims->length();
1361 LIRItemList* items = new LIRItemList(i, i, NULL);
1362 while (i-- > 0) {
1363 LIRItem* size = new LIRItem(dims->at(i), this);
1364 items->at_put(i, size);
1365 }
1366
1367 // Evaluate state_for early since it may emit code.
1368 CodeEmitInfo* patching_info = NULL;
1369 if (!x->klass()->is_loaded() || PatchALot) {
1370 patching_info = state_for(x, x->state_before());
1371
1372 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1373 // clone all handlers (NOTE: Usually this is handled transparently
1374 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1375 // is done explicitly here because a stub isn't being used).
1376 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1377 }
1378 CodeEmitInfo* info = state_for(x, x->state());
1379
1380 i = dims->length();
1381 while (i-- > 0) {
1382 LIRItem* size = items->at(i);
1383 size->load_nonconstant();
1384
1385 store_stack_parameter(size->result(), in_ByteSize(i*4));
1386 }
1387
1388 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1389 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1390
1391 LIR_Opr rank = FrameMap::rbx_opr;
1392 __ move(LIR_OprFact::intConst(x->rank()), rank);
1393 LIR_Opr varargs = FrameMap::rcx_opr;
1394 __ move(FrameMap::rsp_opr, varargs);
1395 LIR_OprList* args = new LIR_OprList(3);
1396 args->append(klass_reg);
1397 args->append(rank);
1398 args->append(varargs);
1399 LIR_Opr reg = result_register_for(x->type());
1400 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1401 LIR_OprFact::illegalOpr,
1402 reg, args, info);
1403
1404 LIR_Opr result = rlock_result(x);
1405 __ move(reg, result);
1406 }
1407
1408
1409 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1410 // nothing to do for now
1411 }
1412
1413
1414 void LIRGenerator::do_CheckCast(CheckCast* x) {
1415 LIRItem obj(x->obj(), this);
1416
1417 CodeEmitInfo* patching_info = NULL;
1418 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1419 // must do this before locking the destination register as an oop register,
1420 // and before the obj is loaded (the latter is for deoptimization)
1421 patching_info = state_for(x, x->state_before());
1422 }
1423 obj.load_item();
1424
1425 // info for exceptions
1426 CodeEmitInfo* info_for_exception =
1427 (x->needs_exception_state() ? state_for(x) :
1428 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1429
1430 CodeStub* stub;
1431 if (x->is_incompatible_class_change_check()) {
1432 assert(patching_info == NULL, "can't patch this");
1433 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1434 } else if (x->is_invokespecial_receiver_check()) {
1435 assert(patching_info == NULL, "can't patch this");
1436 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1437 } else {
1438 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1439 }
1440 LIR_Opr reg = rlock_result(x);
1441 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1442 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1443 tmp3 = new_register(objectType);
1444 }
1445 __ checkcast(reg, obj.result(), x->klass(),
1446 new_register(objectType), new_register(objectType), tmp3,
1447 x->direct_compare(), info_for_exception, patching_info, stub,
1448 x->profiled_method(), x->profiled_bci());
1449 }
1450
1451
1452 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1453 LIRItem obj(x->obj(), this);
1454
1455 // result and test object may not be in same register
1456 LIR_Opr reg = rlock_result(x);
1457 CodeEmitInfo* patching_info = NULL;
1458 if ((!x->klass()->is_loaded() || PatchALot)) {
1459 // must do this before locking the destination register as an oop register
1460 patching_info = state_for(x, x->state_before());
1461 }
1462 obj.load_item();
1463 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1464 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1465 tmp3 = new_register(objectType);
1466 }
1467 __ instanceof(reg, obj.result(), x->klass(),
1468 new_register(objectType), new_register(objectType), tmp3,
1469 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1470 }
1471
1472
1473 void LIRGenerator::do_If(If* x) {
1474 assert(x->number_of_sux() == 2, "inconsistency");
1475 ValueTag tag = x->x()->type()->tag();
1476 bool is_safepoint = x->is_safepoint();
1477
1478 If::Condition cond = x->cond();
1479
1480 LIRItem xitem(x->x(), this);
1481 LIRItem yitem(x->y(), this);
1482 LIRItem* xin = &xitem;
1483 LIRItem* yin = &yitem;
1484
1485 if (tag == longTag) {
1486 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1487 // mirror for other conditions
1488 if (cond == If::gtr || cond == If::leq) {
1489 cond = Instruction::mirror(cond);
1490 xin = &yitem;
1491 yin = &xitem;
1492 }
1493 xin->set_destroys_register();
1494 }
1495 xin->load_item();
1496 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1497 // inline long zero
1498 yin->dont_load_item();
1499 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1500 // longs cannot handle constants at right side
1501 yin->load_item();
1502 } else {
1503 yin->dont_load_item();
1504 }
1505
1506 LIR_Opr left = xin->result();
1507 LIR_Opr right = yin->result();
1508
1509 set_no_result(x);
1510
1511 // add safepoint before generating condition code so it can be recomputed
1512 if (x->is_safepoint()) {
1513 // increment backedge counter if needed
1514 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1515 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1516 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1517 }
1518
1519 __ cmp(lir_cond(cond), left, right);
1520 // Generate branch profiling. Profiling code doesn't kill flags.
1521 profile_branch(x, cond);
1522 move_to_phi(x->state());
1523 if (x->x()->type()->is_float_kind()) {
1524 __ branch(lir_cond(cond), x->tsux(), x->usux());
1525 } else {
1526 __ branch(lir_cond(cond), x->tsux());
1527 }
1528 assert(x->default_sux() == x->fsux(), "wrong destination above");
1529 __ jump(x->default_sux());
1530 }
1531
1532
1533 LIR_Opr LIRGenerator::getThreadPointer() {
1534 #ifdef _LP64
1535 return FrameMap::as_pointer_opr(r15_thread);
1536 #else
1537 LIR_Opr result = new_register(T_INT);
1538 __ get_thread(result);
1539 return result;
1540 #endif //
1541 }
1542
1543 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1544 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1545 LIR_OprList* args = new LIR_OprList();
1546 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1547 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1548 }
1549
1550
1551 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1552 CodeEmitInfo* info) {
1553 if (address->type() == T_LONG) {
1554 address = new LIR_Address(address->base(),
1555 address->index(), address->scale(),
1556 address->disp(), T_DOUBLE);
1557 // Transfer the value atomically by using FP moves. This means
1558 // the value has to be moved between CPU and FPU registers. It
1559 // always has to be moved through spill slot since there's no
1560 // quick way to pack the value into an SSE register.
1561 LIR_Opr temp_double = new_register(T_DOUBLE);
1562 LIR_Opr spill = new_register(T_LONG);
1563 set_vreg_flag(spill, must_start_in_memory);
1564 __ move(value, spill);
1565 __ volatile_move(spill, temp_double, T_LONG);
1566 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1567 } else {
1568 __ store(value, address, info);
1569 }
1570 }
1571
1572 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1573 CodeEmitInfo* info) {
1574 if (address->type() == T_LONG) {
1575 address = new LIR_Address(address->base(),
1576 address->index(), address->scale(),
1577 address->disp(), T_DOUBLE);
1578 // Transfer the value atomically by using FP moves. This means
1579 // the value has to be moved between CPU and FPU registers. In
1580 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1581 // SSE2+ mode it can be moved directly.
1582 LIR_Opr temp_double = new_register(T_DOUBLE);
1583 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1584 __ volatile_move(temp_double, result, T_LONG);
1585 #ifndef _LP64
1586 if (UseSSE < 2) {
1587 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1588 set_vreg_flag(result, must_start_in_memory);
1589 }
1590 #endif // !LP64
1591 } else {
1592 __ load(address, result, info);
1593 }
1594 }