1 /*
   2  * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "utilities/powerOfTwo.hpp"
  40 #include "vmreg_x86.inline.hpp"
  41 
  42 #ifdef ASSERT
  43 #define __ gen()->lir(__FILE__, __LINE__)->
  44 #else
  45 #define __ gen()->lir()->
  46 #endif
  47 
  48 // Item will be loaded into a byte register; Intel only
  49 void LIRItem::load_byte_item() {
  50   load_item();
  51   LIR_Opr res = result();
  52 
  53   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  54     // make sure that it is a byte register
  55     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  56            "can't load floats in byte register");
  57     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  58     __ move(res, reg);
  59 
  60     _result = reg;
  61   }
  62 }
  63 
  64 
  65 void LIRItem::load_nonconstant() {
  66   LIR_Opr r = value()->operand();
  67   if (r->is_constant()) {
  68     _result = r;
  69   } else {
  70     load_item();
  71   }
  72 }
  73 
  74 //--------------------------------------------------------------
  75 //               LIRGenerator
  76 //--------------------------------------------------------------
  77 
  78 
  79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  80 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  81 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  83 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  84 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  85 LIR_Opr LIRGenerator::syncLockOpr()     { return new_register(T_INT); }
  86 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  87 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  88 
  89 
  90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  91   LIR_Opr opr;
  92   switch (type->tag()) {
  93     case intTag:     opr = FrameMap::rax_opr;          break;
  94     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  95     case longTag:    opr = FrameMap::long0_opr;        break;
  96 #ifdef _LP64
  97     case floatTag:   opr = FrameMap::xmm0_float_opr;   break;
  98     case doubleTag:  opr = FrameMap::xmm0_double_opr;  break;
  99 #else
 100     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
 101     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
 102 #endif // _LP64
 103     case addressTag:
 104     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 105   }
 106 
 107   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 108   return opr;
 109 }
 110 
 111 
 112 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 113   LIR_Opr reg = new_register(T_INT);
 114   set_vreg_flag(reg, LIRGenerator::byte_reg);
 115   return reg;
 116 }
 117 
 118 
 119 //--------- loading items into registers --------------------------------
 120 
 121 
 122 // i486 instructions can inline constants
 123 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 124   if (type == T_SHORT || type == T_CHAR) {
 125     return false;
 126   }
 127   Constant* c = v->as_Constant();
 128   if (c && c->state_before() == NULL) {
 129     // constants of any type can be stored directly, except for
 130     // unloaded object constants.
 131     return true;
 132   }
 133   return false;
 134 }
 135 
 136 
 137 bool LIRGenerator::can_inline_as_constant(Value v) const {
 138   if (v->type()->tag() == longTag) return false;
 139   return v->type()->tag() != objectTag ||
 140     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 141 }
 142 
 143 
 144 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 145   if (c->type() == T_LONG) return false;
 146   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 147 }
 148 
 149 
 150 LIR_Opr LIRGenerator::safepoint_poll_register() {
 151   NOT_LP64( return new_register(T_ADDRESS); )
 152   return LIR_OprFact::illegalOpr;
 153 }
 154 
 155 
 156 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 157                                             int shift, int disp, BasicType type) {
 158   assert(base->is_register(), "must be");
 159   if (index->is_constant()) {
 160     LIR_Const *constant = index->as_constant_ptr();
 161 #ifdef _LP64
 162     jlong c;
 163     if (constant->type() == T_INT) {
 164       c = (jlong(index->as_jint()) << shift) + disp;
 165     } else {
 166       assert(constant->type() == T_LONG, "should be");
 167       c = (index->as_jlong() << shift) + disp;
 168     }
 169     if ((jlong)((jint)c) == c) {
 170       return new LIR_Address(base, (jint)c, type);
 171     } else {
 172       LIR_Opr tmp = new_register(T_LONG);
 173       __ move(index, tmp);
 174       return new LIR_Address(base, tmp, type);
 175     }
 176 #else
 177     return new LIR_Address(base,
 178                            ((intx)(constant->as_jint()) << shift) + disp,
 179                            type);
 180 #endif
 181   } else {
 182     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 183   }
 184 }
 185 
 186 
 187 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 188                                               BasicType type) {
 189   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 190 
 191   LIR_Address* addr;
 192   if (index_opr->is_constant()) {
 193     int elem_size = type2aelembytes(type);
 194 #ifdef _LP64
 195     jint index = index_opr->as_jint();
 196     jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
 197     if (disp > max_jint) {
 198       // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
 199       // Convert array index to long to do array offset computation with 64-bit values.
 200       index_opr = new_register(T_LONG);
 201       __ move(LIR_OprFact::longConst(index), index_opr);
 202       addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
 203     } else {
 204       addr = new LIR_Address(array_opr, (intx)disp, type);
 205     }
 206 #else
 207     // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range!
 208     // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will
 209     // always be negative (i.e. underflows the 32-bit address range):
 210     // Let N = 2^32: a + signed_overflow(disp) = a + disp - N.
 211     // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then
 212     // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always
 213     // underflows the 32-bit address range:
 214     // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N)
 215     //                                              = (a + disp - N) + N = a + disp
 216     // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address
 217     // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms.
 218     addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
 219 #endif // _LP64
 220   } else {
 221 #ifdef _LP64
 222     if (index_opr->type() == T_INT) {
 223       LIR_Opr tmp = new_register(T_LONG);
 224       __ convert(Bytecodes::_i2l, index_opr, tmp);
 225       index_opr = tmp;
 226     }
 227 #endif // _LP64
 228     addr =  new LIR_Address(array_opr,
 229                             index_opr,
 230                             LIR_Address::scale(type),
 231                             offset_in_bytes, type);
 232   }
 233   return addr;
 234 }
 235 
 236 
 237 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
 238   LIR_Opr r;
 239   if (type == T_LONG) {
 240     r = LIR_OprFact::longConst(x);
 241   } else if (type == T_INT) {
 242     r = LIR_OprFact::intConst(checked_cast<jint>(x));
 243   } else {
 244     ShouldNotReachHere();
 245   }
 246   return r;
 247 }
 248 
 249 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 250   LIR_Opr pointer = new_pointer_register();
 251   __ move(LIR_OprFact::intptrConst(counter), pointer);
 252   LIR_Address* addr = new LIR_Address(pointer, type);
 253   increment_counter(addr, step);
 254 }
 255 
 256 
 257 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 258   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 259 }
 260 
 261 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 262   __ cmp_mem_int(condition, base, disp, c, info);
 263 }
 264 
 265 
 266 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 267   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 268 }
 269 
 270 
 271 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 272   if (tmp->is_valid() && c > 0 && c < max_jint) {
 273     if (is_power_of_2(c + 1)) {
 274       __ move(left, tmp);
 275       __ shift_left(left, log2i_exact(c + 1), left);
 276       __ sub(left, tmp, result);
 277       return true;
 278     } else if (is_power_of_2(c - 1)) {
 279       __ move(left, tmp);
 280       __ shift_left(left, log2i_exact(c - 1), left);
 281       __ add(left, tmp, result);
 282       return true;
 283     }
 284   }
 285   return false;
 286 }
 287 
 288 
 289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 290   BasicType type = item->type();
 291   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 292 }
 293 
 294 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 295   LIR_Opr tmp1 = new_register(objectType);
 296   LIR_Opr tmp2 = new_register(objectType);
 297   LIR_Opr tmp3 = new_register(objectType);
 298   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 299 }
 300 
 301 //----------------------------------------------------------------------
 302 //             visitor functions
 303 //----------------------------------------------------------------------
 304 
 305 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 306   assert(x->is_pinned(),"");
 307   LIRItem obj(x->obj(), this);
 308   obj.load_item();
 309 
 310   set_no_result(x);
 311 
 312   // "lock" stores the address of the monitor stack slot, so this is not an oop
 313   LIR_Opr lock = new_register(T_ADDRESS);
 314   LIR_Opr tmp1 = new_register(T_INT);
 315   LIR_Opr tmp2 = new_register(T_INT);
 316 
 317   CodeEmitInfo* info_for_exception = NULL;
 318   if (x->needs_null_check()) {
 319     info_for_exception = state_for(x);
 320   }
 321   // this CodeEmitInfo must not have the xhandlers because here the
 322   // object is already locked (xhandlers expect object to be unlocked)
 323   CodeEmitInfo* info = state_for(x, x->state(), true);
 324   monitor_enter(obj.result(), lock, syncTempOpr(), tmp1, tmp2,
 325                         x->monitor_no(), info_for_exception, info);
 326 }
 327 
 328 
 329 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 330   assert(x->is_pinned(),"");
 331 
 332   LIRItem obj(x->obj(), this);
 333   obj.dont_load_item();
 334 
 335   LIR_Opr lock = new_register(T_ADDRESS);
 336   LIR_Opr obj_temp = new_register(T_ADDRESS);
 337   LIR_Opr tmp = new_register(T_INT);
 338   set_no_result(x);
 339   monitor_exit(obj_temp, lock, syncTempOpr(), tmp, x->monitor_no());
 340 }
 341 
 342 // _ineg, _lneg, _fneg, _dneg
 343 void LIRGenerator::do_NegateOp(NegateOp* x) {
 344   LIRItem value(x->x(), this);
 345   value.set_destroys_register();
 346   value.load_item();
 347   LIR_Opr reg = rlock(x);
 348 
 349   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 350 #ifdef _LP64
 351   if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
 352     if (x->type()->tag() == doubleTag) {
 353       tmp = new_register(T_DOUBLE);
 354       __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 355     }
 356     else if (x->type()->tag() == floatTag) {
 357       tmp = new_register(T_FLOAT);
 358       __ move(LIR_OprFact::floatConst(-0.0), tmp);
 359     }
 360   }
 361 #endif
 362   __ negate(value.result(), reg, tmp);
 363 
 364   set_result(x, round_item(reg));
 365 }
 366 
 367 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 368 //      _dadd, _dmul, _dsub, _ddiv, _drem
 369 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 370   LIRItem left(x->x(),  this);
 371   LIRItem right(x->y(), this);
 372   LIRItem* left_arg  = &left;
 373   LIRItem* right_arg = &right;
 374   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 375   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 376   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 377     left.load_item();
 378   } else {
 379     left.dont_load_item();
 380   }
 381 
 382 #ifndef _LP64
 383   // do not load right operand if it is a constant.  only 0 and 1 are
 384   // loaded because there are special instructions for loading them
 385   // without memory access (not needed for SSE2 instructions)
 386   bool must_load_right = false;
 387   if (right.is_constant()) {
 388     LIR_Const* c = right.result()->as_constant_ptr();
 389     assert(c != NULL, "invalid constant");
 390     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 391 
 392     if (c->type() == T_FLOAT) {
 393       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 394     } else {
 395       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 396     }
 397   }
 398 #endif // !LP64
 399 
 400   if (must_load_both) {
 401     // frem and drem destroy also right operand, so move it to a new register
 402     right.set_destroys_register();
 403     right.load_item();
 404   } else if (right.is_register()) {
 405     right.load_item();
 406 #ifndef _LP64
 407   } else if (must_load_right) {
 408     right.load_item();
 409 #endif // !LP64
 410   } else {
 411     right.dont_load_item();
 412   }
 413   LIR_Opr reg = rlock(x);
 414   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 415   if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
 416     tmp = new_register(T_DOUBLE);
 417   }
 418 
 419 #ifdef _LP64
 420   if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
 421     // frem and drem are implemented as a direct call into the runtime.
 422     LIRItem left(x->x(), this);
 423     LIRItem right(x->y(), this);
 424 
 425     BasicType bt = as_BasicType(x->type());
 426     BasicTypeList signature(2);
 427     signature.append(bt);
 428     signature.append(bt);
 429     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 430 
 431     const LIR_Opr result_reg = result_register_for(x->type());
 432     left.load_item_force(cc->at(0));
 433     right.load_item_force(cc->at(1));
 434 
 435     address entry = NULL;
 436     switch (x->op()) {
 437       case Bytecodes::_frem:
 438         entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 439         break;
 440       case Bytecodes::_drem:
 441         entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 442         break;
 443       default:
 444         ShouldNotReachHere();
 445     }
 446 
 447     LIR_Opr result = rlock_result(x);
 448     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 449     __ move(result_reg, result);
 450   } else {
 451     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
 452     set_result(x, round_item(reg));
 453   }
 454 #else
 455   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 456     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 457     LIR_Opr fpu0, fpu1;
 458     if (x->op() == Bytecodes::_frem) {
 459       fpu0 = LIR_OprFact::single_fpu(0);
 460       fpu1 = LIR_OprFact::single_fpu(1);
 461     } else {
 462       fpu0 = LIR_OprFact::double_fpu(0);
 463       fpu1 = LIR_OprFact::double_fpu(1);
 464     }
 465     __ move(right.result(), fpu1); // order of left and right operand is important!
 466     __ move(left.result(), fpu0);
 467     __ rem (fpu0, fpu1, fpu0);
 468     __ move(fpu0, reg);
 469 
 470   } else {
 471     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
 472   }
 473   set_result(x, round_item(reg));
 474 #endif // _LP64
 475 }
 476 
 477 
 478 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 479 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 480   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 481     // long division is implemented as a direct call into the runtime
 482     LIRItem left(x->x(), this);
 483     LIRItem right(x->y(), this);
 484 
 485     // the check for division by zero destroys the right operand
 486     right.set_destroys_register();
 487 
 488     BasicTypeList signature(2);
 489     signature.append(T_LONG);
 490     signature.append(T_LONG);
 491     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 492 
 493     // check for division by zero (destroys registers of right operand!)
 494     CodeEmitInfo* info = state_for(x);
 495 
 496     const LIR_Opr result_reg = result_register_for(x->type());
 497     left.load_item_force(cc->at(1));
 498     right.load_item();
 499 
 500     __ move(right.result(), cc->at(0));
 501 
 502     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 503     __ branch(lir_cond_equal, new DivByZeroStub(info));
 504 
 505     address entry = NULL;
 506     switch (x->op()) {
 507     case Bytecodes::_lrem:
 508       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 509       break; // check if dividend is 0 is done elsewhere
 510     case Bytecodes::_ldiv:
 511       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 512       break; // check if dividend is 0 is done elsewhere
 513     default:
 514       ShouldNotReachHere();
 515     }
 516 
 517     LIR_Opr result = rlock_result(x);
 518     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 519     __ move(result_reg, result);
 520   } else if (x->op() == Bytecodes::_lmul) {
 521     // missing test if instr is commutative and if we should swap
 522     LIRItem left(x->x(), this);
 523     LIRItem right(x->y(), this);
 524 
 525     // right register is destroyed by the long mul, so it must be
 526     // copied to a new register.
 527     right.set_destroys_register();
 528 
 529     left.load_item();
 530     right.load_item();
 531 
 532     LIR_Opr reg = FrameMap::long0_opr;
 533     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 534     LIR_Opr result = rlock_result(x);
 535     __ move(reg, result);
 536   } else {
 537     // missing test if instr is commutative and if we should swap
 538     LIRItem left(x->x(), this);
 539     LIRItem right(x->y(), this);
 540 
 541     left.load_item();
 542     // don't load constants to save register
 543     right.load_nonconstant();
 544     rlock_result(x);
 545     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 546   }
 547 }
 548 
 549 
 550 
 551 // for: _iadd, _imul, _isub, _idiv, _irem
 552 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 553   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 554     // The requirements for division and modulo
 555     // input : rax,: dividend                         min_int
 556     //         reg: divisor   (may not be rax,/rdx)   -1
 557     //
 558     // output: rax,: quotient  (= rax, idiv reg)       min_int
 559     //         rdx: remainder (= rax, irem reg)       0
 560 
 561     // rax, and rdx will be destroyed
 562 
 563     // Note: does this invalidate the spec ???
 564     LIRItem right(x->y(), this);
 565     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 566 
 567     // call state_for before load_item_force because state_for may
 568     // force the evaluation of other instructions that are needed for
 569     // correct debug info.  Otherwise the live range of the fix
 570     // register might be too long.
 571     CodeEmitInfo* info = state_for(x);
 572 
 573     left.load_item_force(divInOpr());
 574 
 575     right.load_item();
 576 
 577     LIR_Opr result = rlock_result(x);
 578     LIR_Opr result_reg;
 579     if (x->op() == Bytecodes::_idiv) {
 580       result_reg = divOutOpr();
 581     } else {
 582       result_reg = remOutOpr();
 583     }
 584 
 585     if (!ImplicitDiv0Checks) {
 586       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 587       __ branch(lir_cond_equal, new DivByZeroStub(info));
 588       // Idiv/irem cannot trap (passing info would generate an assertion).
 589       info = NULL;
 590     }
 591     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 592     if (x->op() == Bytecodes::_irem) {
 593       __ irem(left.result(), right.result(), result_reg, tmp, info);
 594     } else if (x->op() == Bytecodes::_idiv) {
 595       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 596     } else {
 597       ShouldNotReachHere();
 598     }
 599 
 600     __ move(result_reg, result);
 601   } else {
 602     // missing test if instr is commutative and if we should swap
 603     LIRItem left(x->x(),  this);
 604     LIRItem right(x->y(), this);
 605     LIRItem* left_arg = &left;
 606     LIRItem* right_arg = &right;
 607     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 608       // swap them if left is real stack (or cached) and right is real register(not cached)
 609       left_arg = &right;
 610       right_arg = &left;
 611     }
 612 
 613     left_arg->load_item();
 614 
 615     // do not need to load right, as we can handle stack and constants
 616     if (x->op() == Bytecodes::_imul ) {
 617       // check if we can use shift instead
 618       bool use_constant = false;
 619       bool use_tmp = false;
 620       if (right_arg->is_constant()) {
 621         jint iconst = right_arg->get_jint_constant();
 622         if (iconst > 0 && iconst < max_jint) {
 623           if (is_power_of_2(iconst)) {
 624             use_constant = true;
 625           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 626             use_constant = true;
 627             use_tmp = true;
 628           }
 629         }
 630       }
 631       if (use_constant) {
 632         right_arg->dont_load_item();
 633       } else {
 634         right_arg->load_item();
 635       }
 636       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 637       if (use_tmp) {
 638         tmp = new_register(T_INT);
 639       }
 640       rlock_result(x);
 641 
 642       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 643     } else {
 644       right_arg->dont_load_item();
 645       rlock_result(x);
 646       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 647       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 648     }
 649   }
 650 }
 651 
 652 
 653 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 654   // when an operand with use count 1 is the left operand, then it is
 655   // likely that no move for 2-operand-LIR-form is necessary
 656   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 657     x->swap_operands();
 658   }
 659 
 660   ValueTag tag = x->type()->tag();
 661   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 662   switch (tag) {
 663     case floatTag:
 664     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 665     case longTag:    do_ArithmeticOp_Long(x); return;
 666     case intTag:     do_ArithmeticOp_Int(x);  return;
 667     default:         ShouldNotReachHere();    return;
 668   }
 669 }
 670 
 671 
 672 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 673 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 674   // count must always be in rcx
 675   LIRItem value(x->x(), this);
 676   LIRItem count(x->y(), this);
 677 
 678   ValueTag elemType = x->type()->tag();
 679   bool must_load_count = !count.is_constant() || elemType == longTag;
 680   if (must_load_count) {
 681     // count for long must be in register
 682     count.load_item_force(shiftCountOpr());
 683   } else {
 684     count.dont_load_item();
 685   }
 686   value.load_item();
 687   LIR_Opr reg = rlock_result(x);
 688 
 689   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 690 }
 691 
 692 
 693 // _iand, _land, _ior, _lor, _ixor, _lxor
 694 void LIRGenerator::do_LogicOp(LogicOp* x) {
 695   // when an operand with use count 1 is the left operand, then it is
 696   // likely that no move for 2-operand-LIR-form is necessary
 697   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 698     x->swap_operands();
 699   }
 700 
 701   LIRItem left(x->x(), this);
 702   LIRItem right(x->y(), this);
 703 
 704   left.load_item();
 705   right.load_nonconstant();
 706   LIR_Opr reg = rlock_result(x);
 707 
 708   logic_op(x->op(), reg, left.result(), right.result());
 709 }
 710 
 711 
 712 
 713 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 714 void LIRGenerator::do_CompareOp(CompareOp* x) {
 715   LIRItem left(x->x(), this);
 716   LIRItem right(x->y(), this);
 717   ValueTag tag = x->x()->type()->tag();
 718   if (tag == longTag) {
 719     left.set_destroys_register();
 720   }
 721   left.load_item();
 722   right.load_item();
 723   LIR_Opr reg = rlock_result(x);
 724 
 725   if (x->x()->type()->is_float_kind()) {
 726     Bytecodes::Code code = x->op();
 727     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 728   } else if (x->x()->type()->tag() == longTag) {
 729     __ lcmp2int(left.result(), right.result(), reg);
 730   } else {
 731     Unimplemented();
 732   }
 733 }
 734 
 735 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 736   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 737   if (is_reference_type(type)) {
 738     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 739     new_value.load_item();
 740     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 741   } else if (type == T_INT) {
 742     cmp_value.load_item_force(FrameMap::rax_opr);
 743     new_value.load_item();
 744     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 745   } else if (type == T_LONG) {
 746     cmp_value.load_item_force(FrameMap::long0_opr);
 747     new_value.load_item_force(FrameMap::long1_opr);
 748     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 749   } else {
 750     Unimplemented();
 751   }
 752   LIR_Opr result = new_register(T_INT);
 753   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 754            result, T_INT);
 755   return result;
 756 }
 757 
 758 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 759   bool is_oop = is_reference_type(type);
 760   LIR_Opr result = new_register(type);
 761   value.load_item();
 762   // Because we want a 2-arg form of xchg and xadd
 763   __ move(value.result(), result);
 764   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 765   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 766   return result;
 767 }
 768 
 769 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 770   LIR_Opr result = new_register(type);
 771   value.load_item();
 772   // Because we want a 2-arg form of xchg and xadd
 773   __ move(value.result(), result);
 774   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 775   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 776   return result;
 777 }
 778 
 779 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 780   assert(x->number_of_arguments() == 3, "wrong type");
 781   assert(UseFMA, "Needs FMA instructions support.");
 782   LIRItem value(x->argument_at(0), this);
 783   LIRItem value1(x->argument_at(1), this);
 784   LIRItem value2(x->argument_at(2), this);
 785 
 786   value2.set_destroys_register();
 787 
 788   value.load_item();
 789   value1.load_item();
 790   value2.load_item();
 791 
 792   LIR_Opr calc_input = value.result();
 793   LIR_Opr calc_input1 = value1.result();
 794   LIR_Opr calc_input2 = value2.result();
 795   LIR_Opr calc_result = rlock_result(x);
 796 
 797   switch (x->id()) {
 798   case vmIntrinsics::_fmaD:   __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
 799   case vmIntrinsics::_fmaF:   __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
 800   default:                    ShouldNotReachHere();
 801   }
 802 
 803 }
 804 
 805 
 806 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 807   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 808 
 809   if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
 810       x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
 811       x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
 812       x->id() == vmIntrinsics::_dlog10) {
 813     do_LibmIntrinsic(x);
 814     return;
 815   }
 816 
 817   LIRItem value(x->argument_at(0), this);
 818 
 819   bool use_fpu = false;
 820 #ifndef _LP64
 821   if (UseSSE < 2) {
 822     value.set_destroys_register();
 823   }
 824 #endif // !LP64
 825   value.load_item();
 826 
 827   LIR_Opr calc_input = value.result();
 828   LIR_Opr calc_result = rlock_result(x);
 829 
 830   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 831 #ifdef _LP64
 832   if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
 833       (x->id() == vmIntrinsics::_dabs)) {
 834     tmp = new_register(T_DOUBLE);
 835     __ move(LIR_OprFact::doubleConst(-0.0), tmp);
 836   }
 837 #endif
 838 
 839   switch(x->id()) {
 840     case vmIntrinsics::_dabs:
 841       __ abs(calc_input, calc_result, tmp);
 842       break;
 843     case vmIntrinsics::_dsqrt:
 844     case vmIntrinsics::_dsqrt_strict:
 845       __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
 846       break;
 847     default:
 848       ShouldNotReachHere();
 849   }
 850 
 851   if (use_fpu) {
 852     __ move(calc_result, x->operand());
 853   }
 854 }
 855 
 856 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
 857   LIRItem value(x->argument_at(0), this);
 858   value.set_destroys_register();
 859 
 860   LIR_Opr calc_result = rlock_result(x);
 861   LIR_Opr result_reg = result_register_for(x->type());
 862 
 863   CallingConvention* cc = NULL;
 864 
 865   if (x->id() == vmIntrinsics::_dpow) {
 866     LIRItem value1(x->argument_at(1), this);
 867 
 868     value1.set_destroys_register();
 869 
 870     BasicTypeList signature(2);
 871     signature.append(T_DOUBLE);
 872     signature.append(T_DOUBLE);
 873     cc = frame_map()->c_calling_convention(&signature);
 874     value.load_item_force(cc->at(0));
 875     value1.load_item_force(cc->at(1));
 876   } else {
 877     BasicTypeList signature(1);
 878     signature.append(T_DOUBLE);
 879     cc = frame_map()->c_calling_convention(&signature);
 880     value.load_item_force(cc->at(0));
 881   }
 882 
 883 #ifndef _LP64
 884   LIR_Opr tmp = FrameMap::fpu0_double_opr;
 885   result_reg = tmp;
 886   switch(x->id()) {
 887     case vmIntrinsics::_dexp:
 888       if (StubRoutines::dexp() != NULL) {
 889         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 890       } else {
 891         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 892       }
 893       break;
 894     case vmIntrinsics::_dlog:
 895       if (StubRoutines::dlog() != NULL) {
 896         __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 897       } else {
 898         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 899       }
 900       break;
 901     case vmIntrinsics::_dlog10:
 902       if (StubRoutines::dlog10() != NULL) {
 903        __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 904       } else {
 905         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 906       }
 907       break;
 908     case vmIntrinsics::_dpow:
 909       if (StubRoutines::dpow() != NULL) {
 910         __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 911       } else {
 912         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 913       }
 914       break;
 915     case vmIntrinsics::_dsin:
 916       if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
 917         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 918       } else {
 919         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 920       }
 921       break;
 922     case vmIntrinsics::_dcos:
 923       if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
 924         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 925       } else {
 926         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 927       }
 928       break;
 929     case vmIntrinsics::_dtan:
 930       if (StubRoutines::dtan() != NULL) {
 931         __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 932       } else {
 933         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 934       }
 935       break;
 936     default:  ShouldNotReachHere();
 937   }
 938 #else
 939   switch (x->id()) {
 940     case vmIntrinsics::_dexp:
 941       if (StubRoutines::dexp() != NULL) {
 942         __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
 943       } else {
 944         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
 945       }
 946       break;
 947     case vmIntrinsics::_dlog:
 948       if (StubRoutines::dlog() != NULL) {
 949       __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
 950       } else {
 951         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
 952       }
 953       break;
 954     case vmIntrinsics::_dlog10:
 955       if (StubRoutines::dlog10() != NULL) {
 956       __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
 957       } else {
 958         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
 959       }
 960       break;
 961     case vmIntrinsics::_dpow:
 962        if (StubRoutines::dpow() != NULL) {
 963       __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
 964       } else {
 965         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
 966       }
 967       break;
 968     case vmIntrinsics::_dsin:
 969       if (StubRoutines::dsin() != NULL) {
 970         __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
 971       } else {
 972         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
 973       }
 974       break;
 975     case vmIntrinsics::_dcos:
 976       if (StubRoutines::dcos() != NULL) {
 977         __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
 978       } else {
 979         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
 980       }
 981       break;
 982     case vmIntrinsics::_dtan:
 983        if (StubRoutines::dtan() != NULL) {
 984       __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
 985       } else {
 986         __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
 987       }
 988       break;
 989     default:  ShouldNotReachHere();
 990   }
 991 #endif // _LP64
 992   __ move(result_reg, calc_result);
 993 }
 994 
 995 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 996   assert(x->number_of_arguments() == 5, "wrong type");
 997 
 998   // Make all state_for calls early since they can emit code
 999   CodeEmitInfo* info = state_for(x, x->state());
1000 
1001   LIRItem src(x->argument_at(0), this);
1002   LIRItem src_pos(x->argument_at(1), this);
1003   LIRItem dst(x->argument_at(2), this);
1004   LIRItem dst_pos(x->argument_at(3), this);
1005   LIRItem length(x->argument_at(4), this);
1006 
1007   // operands for arraycopy must use fixed registers, otherwise
1008   // LinearScan will fail allocation (because arraycopy always needs a
1009   // call)
1010 
1011 #ifndef _LP64
1012   src.load_item_force     (FrameMap::rcx_oop_opr);
1013   src_pos.load_item_force (FrameMap::rdx_opr);
1014   dst.load_item_force     (FrameMap::rax_oop_opr);
1015   dst_pos.load_item_force (FrameMap::rbx_opr);
1016   length.load_item_force  (FrameMap::rdi_opr);
1017   LIR_Opr tmp =           (FrameMap::rsi_opr);
1018 #else
1019 
1020   // The java calling convention will give us enough registers
1021   // so that on the stub side the args will be perfect already.
1022   // On the other slow/special case side we call C and the arg
1023   // positions are not similar enough to pick one as the best.
1024   // Also because the java calling convention is a "shifted" version
1025   // of the C convention we can process the java args trivially into C
1026   // args without worry of overwriting during the xfer
1027 
1028   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
1029   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1030   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
1031   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1032   length.load_item_force  (FrameMap::as_opr(j_rarg4));
1033 
1034   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
1035 #endif // LP64
1036 
1037   set_no_result(x);
1038 
1039   int flags;
1040   ciArrayKlass* expected_type;
1041   arraycopy_helper(x, &flags, &expected_type);
1042 
1043   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1044 }
1045 
1046 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1047   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1048   // Make all state_for calls early since they can emit code
1049   LIR_Opr result = rlock_result(x);
1050   int flags = 0;
1051   switch (x->id()) {
1052     case vmIntrinsics::_updateCRC32: {
1053       LIRItem crc(x->argument_at(0), this);
1054       LIRItem val(x->argument_at(1), this);
1055       // val is destroyed by update_crc32
1056       val.set_destroys_register();
1057       crc.load_item();
1058       val.load_item();
1059       __ update_crc32(crc.result(), val.result(), result);
1060       break;
1061     }
1062     case vmIntrinsics::_updateBytesCRC32:
1063     case vmIntrinsics::_updateByteBufferCRC32: {
1064       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1065 
1066       LIRItem crc(x->argument_at(0), this);
1067       LIRItem buf(x->argument_at(1), this);
1068       LIRItem off(x->argument_at(2), this);
1069       LIRItem len(x->argument_at(3), this);
1070       buf.load_item();
1071       off.load_nonconstant();
1072 
1073       LIR_Opr index = off.result();
1074       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1075       if(off.result()->is_constant()) {
1076         index = LIR_OprFact::illegalOpr;
1077        offset += off.result()->as_jint();
1078       }
1079       LIR_Opr base_op = buf.result();
1080 
1081 #ifndef _LP64
1082       if (!is_updateBytes) { // long b raw address
1083          base_op = new_register(T_INT);
1084          __ convert(Bytecodes::_l2i, buf.result(), base_op);
1085       }
1086 #else
1087       if (index->is_valid()) {
1088         LIR_Opr tmp = new_register(T_LONG);
1089         __ convert(Bytecodes::_i2l, index, tmp);
1090         index = tmp;
1091       }
1092 #endif
1093 
1094       LIR_Address* a = new LIR_Address(base_op,
1095                                        index,
1096                                        offset,
1097                                        T_BYTE);
1098       BasicTypeList signature(3);
1099       signature.append(T_INT);
1100       signature.append(T_ADDRESS);
1101       signature.append(T_INT);
1102       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1103       const LIR_Opr result_reg = result_register_for(x->type());
1104 
1105       LIR_Opr addr = new_pointer_register();
1106       __ leal(LIR_OprFact::address(a), addr);
1107 
1108       crc.load_item_force(cc->at(0));
1109       __ move(addr, cc->at(1));
1110       len.load_item_force(cc->at(2));
1111 
1112       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1113       __ move(result_reg, result);
1114 
1115       break;
1116     }
1117     default: {
1118       ShouldNotReachHere();
1119     }
1120   }
1121 }
1122 
1123 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1124   Unimplemented();
1125 }
1126 
1127 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1128   assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1129 
1130   // Make all state_for calls early since they can emit code
1131   LIR_Opr result = rlock_result(x);
1132 
1133   LIRItem a(x->argument_at(0), this); // Object
1134   LIRItem aOffset(x->argument_at(1), this); // long
1135   LIRItem b(x->argument_at(2), this); // Object
1136   LIRItem bOffset(x->argument_at(3), this); // long
1137   LIRItem length(x->argument_at(4), this); // int
1138   LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1139 
1140   a.load_item();
1141   aOffset.load_nonconstant();
1142   b.load_item();
1143   bOffset.load_nonconstant();
1144 
1145   long constant_aOffset = 0;
1146   LIR_Opr result_aOffset = aOffset.result();
1147   if (result_aOffset->is_constant()) {
1148     constant_aOffset = result_aOffset->as_jlong();
1149     result_aOffset = LIR_OprFact::illegalOpr;
1150   }
1151   LIR_Opr result_a = a.result();
1152 
1153   long constant_bOffset = 0;
1154   LIR_Opr result_bOffset = bOffset.result();
1155   if (result_bOffset->is_constant()) {
1156     constant_bOffset = result_bOffset->as_jlong();
1157     result_bOffset = LIR_OprFact::illegalOpr;
1158   }
1159   LIR_Opr result_b = b.result();
1160 
1161 #ifndef _LP64
1162   result_a = new_register(T_INT);
1163   __ convert(Bytecodes::_l2i, a.result(), result_a);
1164   result_b = new_register(T_INT);
1165   __ convert(Bytecodes::_l2i, b.result(), result_b);
1166 #endif
1167 
1168 
1169   LIR_Address* addr_a = new LIR_Address(result_a,
1170                                         result_aOffset,
1171                                         constant_aOffset,
1172                                         T_BYTE);
1173 
1174   LIR_Address* addr_b = new LIR_Address(result_b,
1175                                         result_bOffset,
1176                                         constant_bOffset,
1177                                         T_BYTE);
1178 
1179   BasicTypeList signature(4);
1180   signature.append(T_ADDRESS);
1181   signature.append(T_ADDRESS);
1182   signature.append(T_INT);
1183   signature.append(T_INT);
1184   CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1185   const LIR_Opr result_reg = result_register_for(x->type());
1186 
1187   LIR_Opr ptr_addr_a = new_pointer_register();
1188   __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1189 
1190   LIR_Opr ptr_addr_b = new_pointer_register();
1191   __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1192 
1193   __ move(ptr_addr_a, cc->at(0));
1194   __ move(ptr_addr_b, cc->at(1));
1195   length.load_item_force(cc->at(2));
1196   log2ArrayIndexScale.load_item_force(cc->at(3));
1197 
1198   __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1199   __ move(result_reg, result);
1200 }
1201 
1202 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1203 // _i2b, _i2c, _i2s
1204 LIR_Opr fixed_register_for(BasicType type) {
1205   switch (type) {
1206     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1207     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1208     case T_INT:    return FrameMap::rax_opr;
1209     case T_LONG:   return FrameMap::long0_opr;
1210     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1211   }
1212 }
1213 
1214 void LIRGenerator::do_Convert(Convert* x) {
1215 #ifdef _LP64
1216   LIRItem value(x->value(), this);
1217   value.load_item();
1218   LIR_Opr input = value.result();
1219   LIR_Opr result = rlock(x);
1220   __ convert(x->op(), input, result);
1221   assert(result->is_virtual(), "result must be virtual register");
1222   set_result(x, result);
1223 #else
1224   // flags that vary for the different operations and different SSE-settings
1225   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1226 
1227   switch (x->op()) {
1228     case Bytecodes::_i2l: // fall through
1229     case Bytecodes::_l2i: // fall through
1230     case Bytecodes::_i2b: // fall through
1231     case Bytecodes::_i2c: // fall through
1232     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1233 
1234     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1235     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1236     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1237     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1238     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1239     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1240     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1241     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1242     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1243     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1244     default: ShouldNotReachHere();
1245   }
1246 
1247   LIRItem value(x->value(), this);
1248   value.load_item();
1249   LIR_Opr input = value.result();
1250   LIR_Opr result = rlock(x);
1251 
1252   // arguments of lir_convert
1253   LIR_Opr conv_input = input;
1254   LIR_Opr conv_result = result;
1255   ConversionStub* stub = NULL;
1256 
1257   if (fixed_input) {
1258     conv_input = fixed_register_for(input->type());
1259     __ move(input, conv_input);
1260   }
1261 
1262   assert(fixed_result == false || round_result == false, "cannot set both");
1263   if (fixed_result) {
1264     conv_result = fixed_register_for(result->type());
1265   } else if (round_result) {
1266     result = new_register(result->type());
1267     set_vreg_flag(result, must_start_in_memory);
1268   }
1269 
1270   if (needs_stub) {
1271     stub = new ConversionStub(x->op(), conv_input, conv_result);
1272   }
1273 
1274   __ convert(x->op(), conv_input, conv_result, stub);
1275 
1276   if (result != conv_result) {
1277     __ move(conv_result, result);
1278   }
1279 
1280   assert(result->is_virtual(), "result must be virtual register");
1281   set_result(x, result);
1282 #endif // _LP64
1283 }
1284 
1285 
1286 void LIRGenerator::do_NewInstance(NewInstance* x) {
1287   print_if_not_loaded(x);
1288 
1289   CodeEmitInfo* info = state_for(x, x->state());
1290   LIR_Opr reg = result_register_for(x->type());
1291   new_instance(reg, x->klass(), x->is_unresolved(),
1292                        FrameMap::rcx_oop_opr,
1293                        FrameMap::rdi_oop_opr,
1294                        FrameMap::rsi_oop_opr,
1295                        LIR_OprFact::illegalOpr,
1296                        FrameMap::rdx_metadata_opr, info);
1297   LIR_Opr result = rlock_result(x);
1298   __ move(reg, result);
1299 }
1300 
1301 
1302 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1303   CodeEmitInfo* info = state_for(x, x->state());
1304 
1305   LIRItem length(x->length(), this);
1306   length.load_item_force(FrameMap::rbx_opr);
1307 
1308   LIR_Opr reg = result_register_for(x->type());
1309   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1310   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1311   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1312   LIR_Opr tmp4 = reg;
1313   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1314   LIR_Opr len = length.result();
1315   BasicType elem_type = x->elt_type();
1316 
1317   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1318 
1319   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1320   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1321 
1322   LIR_Opr result = rlock_result(x);
1323   __ move(reg, result);
1324 }
1325 
1326 
1327 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1328   LIRItem length(x->length(), this);
1329   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1330   // and therefore provide the state before the parameters have been consumed
1331   CodeEmitInfo* patching_info = NULL;
1332   if (!x->klass()->is_loaded() || PatchALot) {
1333     patching_info =  state_for(x, x->state_before());
1334   }
1335 
1336   CodeEmitInfo* info = state_for(x, x->state());
1337 
1338   const LIR_Opr reg = result_register_for(x->type());
1339   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1340   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1341   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1342   LIR_Opr tmp4 = reg;
1343   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1344 
1345   length.load_item_force(FrameMap::rbx_opr);
1346   LIR_Opr len = length.result();
1347 
1348   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1349   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1350   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1351     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1352   }
1353   klass2reg_with_patching(klass_reg, obj, patching_info);
1354   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1355 
1356   LIR_Opr result = rlock_result(x);
1357   __ move(reg, result);
1358 }
1359 
1360 
1361 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1362   Values* dims = x->dims();
1363   int i = dims->length();
1364   LIRItemList* items = new LIRItemList(i, i, NULL);
1365   while (i-- > 0) {
1366     LIRItem* size = new LIRItem(dims->at(i), this);
1367     items->at_put(i, size);
1368   }
1369 
1370   // Evaluate state_for early since it may emit code.
1371   CodeEmitInfo* patching_info = NULL;
1372   if (!x->klass()->is_loaded() || PatchALot) {
1373     patching_info = state_for(x, x->state_before());
1374 
1375     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1376     // clone all handlers (NOTE: Usually this is handled transparently
1377     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1378     // is done explicitly here because a stub isn't being used).
1379     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1380   }
1381   CodeEmitInfo* info = state_for(x, x->state());
1382 
1383   i = dims->length();
1384   while (i-- > 0) {
1385     LIRItem* size = items->at(i);
1386     size->load_nonconstant();
1387 
1388     store_stack_parameter(size->result(), in_ByteSize(i*4));
1389   }
1390 
1391   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1392   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1393 
1394   LIR_Opr rank = FrameMap::rbx_opr;
1395   __ move(LIR_OprFact::intConst(x->rank()), rank);
1396   LIR_Opr varargs = FrameMap::rcx_opr;
1397   __ move(FrameMap::rsp_opr, varargs);
1398   LIR_OprList* args = new LIR_OprList(3);
1399   args->append(klass_reg);
1400   args->append(rank);
1401   args->append(varargs);
1402   LIR_Opr reg = result_register_for(x->type());
1403   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1404                   LIR_OprFact::illegalOpr,
1405                   reg, args, info);
1406 
1407   LIR_Opr result = rlock_result(x);
1408   __ move(reg, result);
1409 }
1410 
1411 
1412 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1413   // nothing to do for now
1414 }
1415 
1416 
1417 void LIRGenerator::do_CheckCast(CheckCast* x) {
1418   LIRItem obj(x->obj(), this);
1419 
1420   CodeEmitInfo* patching_info = NULL;
1421   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1422     // must do this before locking the destination register as an oop register,
1423     // and before the obj is loaded (the latter is for deoptimization)
1424     patching_info = state_for(x, x->state_before());
1425   }
1426   obj.load_item();
1427 
1428   // info for exceptions
1429   CodeEmitInfo* info_for_exception =
1430       (x->needs_exception_state() ? state_for(x) :
1431                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1432 
1433   CodeStub* stub;
1434   if (x->is_incompatible_class_change_check()) {
1435     assert(patching_info == NULL, "can't patch this");
1436     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1437   } else if (x->is_invokespecial_receiver_check()) {
1438     assert(patching_info == NULL, "can't patch this");
1439     stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1440   } else {
1441     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1442   }
1443   LIR_Opr reg = rlock_result(x);
1444   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1445   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1446     tmp3 = new_register(objectType);
1447   }
1448   __ checkcast(reg, obj.result(), x->klass(),
1449                new_register(objectType), new_register(objectType), tmp3,
1450                x->direct_compare(), info_for_exception, patching_info, stub,
1451                x->profiled_method(), x->profiled_bci());
1452 }
1453 
1454 
1455 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1456   LIRItem obj(x->obj(), this);
1457 
1458   // result and test object may not be in same register
1459   LIR_Opr reg = rlock_result(x);
1460   CodeEmitInfo* patching_info = NULL;
1461   if ((!x->klass()->is_loaded() || PatchALot)) {
1462     // must do this before locking the destination register as an oop register
1463     patching_info = state_for(x, x->state_before());
1464   }
1465   obj.load_item();
1466   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1467   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1468     tmp3 = new_register(objectType);
1469   }
1470   __ instanceof(reg, obj.result(), x->klass(),
1471                 new_register(objectType), new_register(objectType), tmp3,
1472                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1473 }
1474 
1475 
1476 void LIRGenerator::do_If(If* x) {
1477   assert(x->number_of_sux() == 2, "inconsistency");
1478   ValueTag tag = x->x()->type()->tag();
1479   bool is_safepoint = x->is_safepoint();
1480 
1481   If::Condition cond = x->cond();
1482 
1483   LIRItem xitem(x->x(), this);
1484   LIRItem yitem(x->y(), this);
1485   LIRItem* xin = &xitem;
1486   LIRItem* yin = &yitem;
1487 
1488   if (tag == longTag) {
1489     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1490     // mirror for other conditions
1491     if (cond == If::gtr || cond == If::leq) {
1492       cond = Instruction::mirror(cond);
1493       xin = &yitem;
1494       yin = &xitem;
1495     }
1496     xin->set_destroys_register();
1497   }
1498   xin->load_item();
1499   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1500     // inline long zero
1501     yin->dont_load_item();
1502   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1503     // longs cannot handle constants at right side
1504     yin->load_item();
1505   } else {
1506     yin->dont_load_item();
1507   }
1508 
1509   LIR_Opr left = xin->result();
1510   LIR_Opr right = yin->result();
1511 
1512   set_no_result(x);
1513 
1514   // add safepoint before generating condition code so it can be recomputed
1515   if (x->is_safepoint()) {
1516     // increment backedge counter if needed
1517     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1518         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1519     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1520   }
1521 
1522   __ cmp(lir_cond(cond), left, right);
1523   // Generate branch profiling. Profiling code doesn't kill flags.
1524   profile_branch(x, cond);
1525   move_to_phi(x->state());
1526   if (x->x()->type()->is_float_kind()) {
1527     __ branch(lir_cond(cond), x->tsux(), x->usux());
1528   } else {
1529     __ branch(lir_cond(cond), x->tsux());
1530   }
1531   assert(x->default_sux() == x->fsux(), "wrong destination above");
1532   __ jump(x->default_sux());
1533 }
1534 
1535 
1536 LIR_Opr LIRGenerator::getThreadPointer() {
1537 #ifdef _LP64
1538   return FrameMap::as_pointer_opr(r15_thread);
1539 #else
1540   LIR_Opr result = new_register(T_INT);
1541   __ get_thread(result);
1542   return result;
1543 #endif //
1544 }
1545 
1546 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1547   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1548   LIR_OprList* args = new LIR_OprList();
1549   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1550   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1551 }
1552 
1553 
1554 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1555                                         CodeEmitInfo* info) {
1556   if (address->type() == T_LONG) {
1557     address = new LIR_Address(address->base(),
1558                               address->index(), address->scale(),
1559                               address->disp(), T_DOUBLE);
1560     // Transfer the value atomically by using FP moves.  This means
1561     // the value has to be moved between CPU and FPU registers.  It
1562     // always has to be moved through spill slot since there's no
1563     // quick way to pack the value into an SSE register.
1564     LIR_Opr temp_double = new_register(T_DOUBLE);
1565     LIR_Opr spill = new_register(T_LONG);
1566     set_vreg_flag(spill, must_start_in_memory);
1567     __ move(value, spill);
1568     __ volatile_move(spill, temp_double, T_LONG);
1569     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1570   } else {
1571     __ store(value, address, info);
1572   }
1573 }
1574 
1575 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1576                                        CodeEmitInfo* info) {
1577   if (address->type() == T_LONG) {
1578     address = new LIR_Address(address->base(),
1579                               address->index(), address->scale(),
1580                               address->disp(), T_DOUBLE);
1581     // Transfer the value atomically by using FP moves.  This means
1582     // the value has to be moved between CPU and FPU registers.  In
1583     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1584     // SSE2+ mode it can be moved directly.
1585     LIR_Opr temp_double = new_register(T_DOUBLE);
1586     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1587     __ volatile_move(temp_double, result, T_LONG);
1588 #ifndef _LP64
1589     if (UseSSE < 2) {
1590       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1591       set_vreg_flag(result, must_start_in_memory);
1592     }
1593 #endif // !LP64
1594   } else {
1595     __ load(address, result, info);
1596   }
1597 }