1 /*
2 * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_MacroAssembler.hpp"
27 #include "c1/c1_Runtime1.hpp"
28 #include "code/compiledIC.hpp"
29 #include "compiler/compilerDefinitions.inline.hpp"
30 #include "gc/shared/barrierSet.hpp"
31 #include "gc/shared/barrierSetAssembler.hpp"
32 #include "gc/shared/collectedHeap.hpp"
33 #include "gc/shared/tlab_globals.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "oops/arrayOop.hpp"
36 #include "oops/markWord.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/globals.hpp"
39 #include "runtime/os.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/stubRoutines.hpp"
42 #include "utilities/checkedCast.hpp"
43 #include "utilities/globalDefinitions.hpp"
44
45 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register tmp, Label& slow_case) {
46 const int aligned_mask = BytesPerWord -1;
47 const int hdr_offset = oopDesc::mark_offset_in_bytes();
48 assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
49 assert_different_registers(hdr, obj, disp_hdr, tmp);
50 int null_check_offset = -1;
51
52 verify_oop(obj);
53
54 // save object being locked into the BasicObjectLock
55 movptr(Address(disp_hdr, BasicObjectLock::obj_offset()), obj);
56
57 null_check_offset = offset();
58
59 if (DiagnoseSyncOnValueBasedClasses != 0) {
60 load_klass(hdr, obj, rscratch1);
61 movl(hdr, Address(hdr, Klass::access_flags_offset()));
62 testl(hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
63 jcc(Assembler::notZero, slow_case);
64 }
65
66 if (LockingMode == LM_LIGHTWEIGHT) {
67 #ifdef _LP64
68 const Register thread = r15_thread;
69 #else
70 const Register thread = disp_hdr;
71 get_thread(thread);
72 #endif
73 lightweight_lock(obj, hdr, thread, tmp, slow_case);
74 } else if (LockingMode == LM_LEGACY) {
75 Label done;
76 // Load object header
77 movptr(hdr, Address(obj, hdr_offset));
78 // and mark it as unlocked
79 orptr(hdr, markWord::unlocked_value);
80 // save unlocked object header into the displaced header location on the stack
81 movptr(Address(disp_hdr, 0), hdr);
82 // test if object header is still the same (i.e. unlocked), and if so, store the
83 // displaced header address in the object header - if it is not the same, get the
84 // object header instead
85 MacroAssembler::lock(); // must be immediately before cmpxchg!
86 cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
87 // if the object header was the same, we're done
88 jcc(Assembler::equal, done);
89 // if the object header was not the same, it is now in the hdr register
90 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
91 //
92 // 1) (hdr & aligned_mask) == 0
93 // 2) rsp <= hdr
94 // 3) hdr <= rsp + page_size
95 //
96 // these 3 tests can be done by evaluating the following expression:
97 //
98 // (hdr - rsp) & (aligned_mask - page_size)
99 //
100 // assuming both the stack pointer and page_size have their least
101 // significant 2 bits cleared and page_size is a power of 2
102 subptr(hdr, rsp);
103 andptr(hdr, aligned_mask - (int)os::vm_page_size());
104 // for recursive locking, the result is zero => save it in the displaced header
105 // location (null in the displaced hdr location indicates recursive locking)
106 movptr(Address(disp_hdr, 0), hdr);
107 // otherwise we don't care about the result and handle locking via runtime call
108 jcc(Assembler::notZero, slow_case);
109 // done
110 bind(done);
111 }
112
113 inc_held_monitor_count();
114
115 return null_check_offset;
116 }
117
118 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
119 const int aligned_mask = BytesPerWord -1;
120 const int hdr_offset = oopDesc::mark_offset_in_bytes();
121 assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
122 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
123 Label done;
124
125 if (LockingMode != LM_LIGHTWEIGHT) {
126 // load displaced header
127 movptr(hdr, Address(disp_hdr, 0));
128 // if the loaded hdr is null we had recursive locking
129 testptr(hdr, hdr);
130 // if we had recursive locking, we are done
131 jcc(Assembler::zero, done);
132 }
133
134 // load object
135 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
136 verify_oop(obj);
137
138 if (LockingMode == LM_LIGHTWEIGHT) {
139 #ifdef _LP64
140 lightweight_unlock(obj, disp_hdr, r15_thread, hdr, slow_case);
141 #else
142 // This relies on the implementation of lightweight_unlock being able to handle
143 // that the reg_rax and thread Register parameters may alias each other.
144 get_thread(disp_hdr);
145 lightweight_unlock(obj, disp_hdr, disp_hdr, hdr, slow_case);
146 #endif
147 } else if (LockingMode == LM_LEGACY) {
148 // test if object header is pointing to the displaced header, and if so, restore
149 // the displaced header in the object - if the object header is not pointing to
150 // the displaced header, get the object header instead
151 MacroAssembler::lock(); // must be immediately before cmpxchg!
152 cmpxchgptr(hdr, Address(obj, hdr_offset));
153 // if the object header was not pointing to the displaced header,
154 // we do unlocking via runtime call
155 jcc(Assembler::notEqual, slow_case);
156 // done
157 }
158 bind(done);
159 dec_held_monitor_count();
160 }
161
162
163 // Defines obj, preserves var_size_in_bytes
164 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
165 if (UseTLAB) {
166 tlab_allocate(noreg, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
167 } else {
168 jmp(slow_case);
169 }
170 }
171
172
173 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
174 assert_different_registers(obj, klass, len);
175 movptr(Address(obj, oopDesc::mark_offset_in_bytes()), checked_cast<int32_t>(markWord::prototype().value()));
176 #ifdef _LP64
177 if (UseCompressedClassPointers) { // Take care not to kill klass
178 movptr(t1, klass);
179 encode_klass_not_null(t1, rscratch1);
180 movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
181 } else
182 #endif
183 {
184 movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
185 }
186
187 if (len->is_valid()) {
188 movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
189 #ifdef _LP64
190 int base_offset = arrayOopDesc::length_offset_in_bytes() + BytesPerInt;
191 if (!is_aligned(base_offset, BytesPerWord)) {
192 assert(is_aligned(base_offset, BytesPerInt), "must be 4-byte aligned");
193 // Clear gap/first 4 bytes following the length field.
194 xorl(t1, t1);
195 movl(Address(obj, base_offset), t1);
196 }
197 #endif
198 }
199 #ifdef _LP64
200 else if (UseCompressedClassPointers) {
201 xorptr(t1, t1);
202 store_klass_gap(obj, t1);
203 }
204 #endif
205 }
206
207
208 // preserves obj, destroys len_in_bytes
209 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
210 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
211 Label done;
212
213 // len_in_bytes is positive and ptr sized
214 subptr(len_in_bytes, hdr_size_in_bytes);
215 zero_memory(obj, len_in_bytes, hdr_size_in_bytes, t1);
216 bind(done);
217 }
218
219
220 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
221 assert(obj == rax, "obj must be in rax, for cmpxchg");
222 assert_different_registers(obj, t1, t2); // XXX really?
223 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
224
225 try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
226
227 initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2, UseTLAB);
228 }
229
230 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, bool is_tlab_allocated) {
231 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
232 "con_size_in_bytes is not multiple of alignment");
233 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
234
235 initialize_header(obj, klass, noreg, t1, t2);
236
237 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
238 // clear rest of allocated space
239 const Register t1_zero = t1;
240 const Register index = t2;
241 const int threshold = 6 * BytesPerWord; // approximate break even point for code size (see comments below)
242 if (var_size_in_bytes != noreg) {
243 mov(index, var_size_in_bytes);
244 initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
245 } else if (con_size_in_bytes <= threshold) {
246 // use explicit null stores
247 // code size = 2 + 3*n bytes (n = number of fields to clear)
248 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
249 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
250 movptr(Address(obj, i), t1_zero);
251 } else if (con_size_in_bytes > hdr_size_in_bytes) {
252 // use loop to null out the fields
253 // code size = 16 bytes for even n (n = number of fields to clear)
254 // initialize last object field first if odd number of fields
255 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
256 movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
257 // initialize last object field if constant size is odd
258 if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
259 movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
260 // initialize remaining object fields: rdx is a multiple of 2
261 { Label loop;
262 bind(loop);
263 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
264 t1_zero);
265 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
266 t1_zero);)
267 decrement(index);
268 jcc(Assembler::notZero, loop);
269 }
270 }
271 }
272
273 if (CURRENT_ENV->dtrace_alloc_probes()) {
274 assert(obj == rax, "must be");
275 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
276 }
277
278 verify_oop(obj);
279 }
280
281 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int base_offset_in_bytes, Address::ScaleFactor f, Register klass, Label& slow_case, bool zero_array) {
282 assert(obj == rax, "obj must be in rax, for cmpxchg");
283 assert_different_registers(obj, len, t1, t2, klass);
284
285 // determine alignment mask
286 assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
287
288 // check for negative or excessive length
289 cmpptr(len, checked_cast<int32_t>(max_array_allocation_length));
290 jcc(Assembler::above, slow_case);
291
292 const Register arr_size = t2; // okay to be the same
293 // align object end
294 movptr(arr_size, base_offset_in_bytes + MinObjAlignmentInBytesMask);
295 lea(arr_size, Address(arr_size, len, f));
296 andptr(arr_size, ~MinObjAlignmentInBytesMask);
297
298 try_allocate(obj, arr_size, 0, t1, t2, slow_case);
299
300 initialize_header(obj, klass, len, t1, t2);
301
302 // clear rest of allocated space
303 if (zero_array) {
304 const Register len_zero = len;
305 // Align-up to word boundary, because we clear the 4 bytes potentially
306 // following the length field in initialize_header().
307 int base_offset = align_up(base_offset_in_bytes, BytesPerWord);
308 initialize_body(obj, arr_size, base_offset, len_zero);
309 }
310
311 if (CURRENT_ENV->dtrace_alloc_probes()) {
312 assert(obj == rax, "must be");
313 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
314 }
315
316 verify_oop(obj);
317 }
318
319 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes) {
320 assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
321 // Make sure there is enough stack space for this method's activation.
322 // Note that we do this before doing an enter(). This matches the
323 // ordering of C2's stack overflow check / rsp decrement and allows
324 // the SharedRuntime stack overflow handling to be consistent
325 // between the two compilers.
326 generate_stack_overflow_check(bang_size_in_bytes);
327
328 push(rbp);
329 if (PreserveFramePointer) {
330 mov(rbp, rsp);
331 }
332 #if !defined(_LP64) && defined(COMPILER2)
333 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
334 // c2 leaves fpu stack dirty. Clean it on entry
335 empty_FPU_stack();
336 }
337 #endif // !_LP64 && COMPILER2
338 decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
339
340 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
341 // C1 code is not hot enough to micro optimize the nmethod entry barrier with an out-of-line stub
342 bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */);
343 }
344
345
346 void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
347 increment(rsp, frame_size_in_bytes); // Does not emit code for frame_size == 0
348 pop(rbp);
349 }
350
351
352 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
353 if (breakAtEntry || VerifyFPU) {
354 // Verified Entry first instruction should be 5 bytes long for correct
355 // patching by patch_verified_entry().
356 //
357 // Breakpoint and VerifyFPU have one byte first instruction.
358 // Also first instruction will be one byte "push(rbp)" if stack banging
359 // code is not generated (see build_frame() above).
360 // For all these cases generate long instruction first.
361 fat_nop();
362 }
363 if (breakAtEntry) int3();
364 // build frame
365 IA32_ONLY( verify_FPU(0, "method_entry"); )
366 }
367
368 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
369 // rbp, + 0: link
370 // + 1: return address
371 // + 2: argument with offset 0
372 // + 3: argument with offset 1
373 // + 4: ...
374
375 movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
376 }
377
378 #ifndef PRODUCT
379
380 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
381 if (!VerifyOops) return;
382 verify_oop_addr(Address(rsp, stack_offset));
383 }
384
385 void C1_MacroAssembler::verify_not_null_oop(Register r) {
386 if (!VerifyOops) return;
387 Label not_null;
388 testptr(r, r);
389 jcc(Assembler::notZero, not_null);
390 stop("non-null oop required");
391 bind(not_null);
392 verify_oop(r);
393 }
394
395 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
396 #ifdef ASSERT
397 if (inv_rax) movptr(rax, 0xDEAD);
398 if (inv_rbx) movptr(rbx, 0xDEAD);
399 if (inv_rcx) movptr(rcx, 0xDEAD);
400 if (inv_rdx) movptr(rdx, 0xDEAD);
401 if (inv_rsi) movptr(rsi, 0xDEAD);
402 if (inv_rdi) movptr(rdi, 0xDEAD);
403 #endif
404 }
405
406 #endif // ifndef PRODUCT