1 /* 2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/compiledIC.hpp" 29 #include "code/debugInfoRec.hpp" 30 #include "code/nativeInst.hpp" 31 #include "code/vtableStubs.hpp" 32 #include "compiler/oopMap.hpp" 33 #include "gc/shared/gcLocker.hpp" 34 #include "gc/shared/barrierSet.hpp" 35 #include "gc/shared/barrierSetAssembler.hpp" 36 #include "interpreter/interpreter.hpp" 37 #include "logging/log.hpp" 38 #include "memory/resourceArea.hpp" 39 #include "oops/klass.inline.hpp" 40 #include "prims/methodHandles.hpp" 41 #include "runtime/jniHandles.hpp" 42 #include "runtime/safepointMechanism.hpp" 43 #include "runtime/sharedRuntime.hpp" 44 #include "runtime/signature.hpp" 45 #include "runtime/stubRoutines.hpp" 46 #include "runtime/vframeArray.hpp" 47 #include "runtime/vm_version.hpp" 48 #include "utilities/align.hpp" 49 #include "utilities/globalDefinitions.hpp" 50 #include "vmreg_x86.inline.hpp" 51 #ifdef COMPILER1 52 #include "c1/c1_Runtime1.hpp" 53 #endif 54 #ifdef COMPILER2 55 #include "opto/runtime.hpp" 56 #endif 57 58 #define __ masm-> 59 60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 61 62 class RegisterSaver { 63 // Capture info about frame layout 64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off 65 enum layout { 66 fpu_state_off = 0, 67 fpu_state_end = fpu_state_off+FPUStateSizeInWords, 68 st0_off, st0H_off, 69 st1_off, st1H_off, 70 st2_off, st2H_off, 71 st3_off, st3H_off, 72 st4_off, st4H_off, 73 st5_off, st5H_off, 74 st6_off, st6H_off, 75 st7_off, st7H_off, 76 xmm_off, 77 DEF_XMM_OFFS(0), 78 DEF_XMM_OFFS(1), 79 DEF_XMM_OFFS(2), 80 DEF_XMM_OFFS(3), 81 DEF_XMM_OFFS(4), 82 DEF_XMM_OFFS(5), 83 DEF_XMM_OFFS(6), 84 DEF_XMM_OFFS(7), 85 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word 86 rdi_off, 87 rsi_off, 88 ignore_off, // extra copy of rbp, 89 rsp_off, 90 rbx_off, 91 rdx_off, 92 rcx_off, 93 rax_off, 94 // The frame sender code expects that rbp will be in the "natural" place and 95 // will override any oopMap setting for it. We must therefore force the layout 96 // so that it agrees with the frame sender code. 97 rbp_off, 98 return_off, // slot for return address 99 reg_save_size }; 100 enum { FPU_regs_live = flags_off - fpu_state_end }; 101 102 public: 103 104 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, 105 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); 106 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 107 108 static int rax_offset() { return rax_off; } 109 static int rbx_offset() { return rbx_off; } 110 111 // Offsets into the register save area 112 // Used by deoptimization when it is managing result register 113 // values on its own 114 115 static int raxOffset(void) { return rax_off; } 116 static int rdxOffset(void) { return rdx_off; } 117 static int rbxOffset(void) { return rbx_off; } 118 static int xmm0Offset(void) { return xmm0_off; } 119 // This really returns a slot in the fp save area, which one is not important 120 static int fpResultOffset(void) { return st0_off; } 121 122 // During deoptimization only the result register need to be restored 123 // all the other values have already been extracted. 124 125 static void restore_result_registers(MacroAssembler* masm); 126 127 }; 128 129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, 130 int* total_frame_words, bool verify_fpu, bool save_vectors) { 131 int num_xmm_regs = XMMRegister::number_of_registers; 132 int ymm_bytes = num_xmm_regs * 16; 133 int zmm_bytes = num_xmm_regs * 32; 134 #ifdef COMPILER2 135 int opmask_state_bytes = KRegister::number_of_registers * 8; 136 if (save_vectors) { 137 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 138 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 139 // Save upper half of YMM registers 140 int vect_bytes = ymm_bytes; 141 if (UseAVX > 2) { 142 // Save upper half of ZMM registers as well 143 vect_bytes += zmm_bytes; 144 additional_frame_words += opmask_state_bytes / wordSize; 145 } 146 additional_frame_words += vect_bytes / wordSize; 147 } 148 #else 149 assert(!save_vectors, "vectors are generated only by C2"); 150 #endif 151 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; 152 int frame_words = frame_size_in_bytes / wordSize; 153 *total_frame_words = frame_words; 154 155 assert(FPUStateSizeInWords == 27, "update stack layout"); 156 157 // save registers, fpu state, and flags 158 // We assume caller has already has return address slot on the stack 159 // We push epb twice in this sequence because we want the real rbp, 160 // to be under the return like a normal enter and we want to use pusha 161 // We push by hand instead of using push. 162 __ enter(); 163 __ pusha(); 164 __ pushf(); 165 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space 166 __ push_FPU_state(); // Save FPU state & init 167 168 if (verify_fpu) { 169 // Some stubs may have non standard FPU control word settings so 170 // only check and reset the value when it required to be the 171 // standard value. The safepoint blob in particular can be used 172 // in methods which are using the 24 bit control word for 173 // optimized float math. 174 175 #ifdef ASSERT 176 // Make sure the control word has the expected value 177 Label ok; 178 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std()); 179 __ jccb(Assembler::equal, ok); 180 __ stop("corrupted control word detected"); 181 __ bind(ok); 182 #endif 183 184 // Reset the control word to guard against exceptions being unmasked 185 // since fstp_d can cause FPU stack underflow exceptions. Write it 186 // into the on stack copy and then reload that to make sure that the 187 // current and future values are correct. 188 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std()); 189 } 190 191 __ frstor(Address(rsp, 0)); 192 if (!verify_fpu) { 193 // Set the control word so that exceptions are masked for the 194 // following code. 195 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 196 } 197 198 int off = st0_off; 199 int delta = st1_off - off; 200 201 // Save the FPU registers in de-opt-able form 202 for (int n = 0; n < FloatRegister::number_of_registers; n++) { 203 __ fstp_d(Address(rsp, off*wordSize)); 204 off += delta; 205 } 206 207 off = xmm0_off; 208 delta = xmm1_off - off; 209 if(UseSSE == 1) { 210 // Save the XMM state 211 for (int n = 0; n < num_xmm_regs; n++) { 212 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n)); 213 off += delta; 214 } 215 } else if(UseSSE >= 2) { 216 // Save whole 128bit (16 bytes) XMM registers 217 for (int n = 0; n < num_xmm_regs; n++) { 218 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n)); 219 off += delta; 220 } 221 } 222 223 #ifdef COMPILER2 224 if (save_vectors) { 225 __ subptr(rsp, ymm_bytes); 226 // Save upper half of YMM registers 227 for (int n = 0; n < num_xmm_regs; n++) { 228 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n)); 229 } 230 if (UseAVX > 2) { 231 __ subptr(rsp, zmm_bytes); 232 // Save upper half of ZMM registers 233 for (int n = 0; n < num_xmm_regs; n++) { 234 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n)); 235 } 236 __ subptr(rsp, opmask_state_bytes); 237 // Save opmask registers 238 for (int n = 0; n < KRegister::number_of_registers; n++) { 239 __ kmov(Address(rsp, n*8), as_KRegister(n)); 240 } 241 } 242 } 243 #else 244 assert(!save_vectors, "vectors are generated only by C2"); 245 #endif 246 247 __ vzeroupper(); 248 249 // Set an oopmap for the call site. This oopmap will map all 250 // oop-registers and debug-info registers as callee-saved. This 251 // will allow deoptimization at this safepoint to find all possible 252 // debug-info recordings, as well as let GC find all oops. 253 254 OopMapSet *oop_maps = new OopMapSet(); 255 OopMap* map = new OopMap( frame_words, 0 ); 256 257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) 258 #define NEXTREG(x) (x)->as_VMReg()->next() 259 260 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg()); 261 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg()); 262 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg()); 263 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg()); 264 // rbp, location is known implicitly, no oopMap 265 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg()); 266 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg()); 267 268 // %%% This is really a waste but we'll keep things as they were for now for the upper component 269 off = st0_off; 270 delta = st1_off - off; 271 for (int n = 0; n < FloatRegister::number_of_registers; n++) { 272 FloatRegister freg_name = as_FloatRegister(n); 273 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg()); 274 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name)); 275 off += delta; 276 } 277 off = xmm0_off; 278 delta = xmm1_off - off; 279 for (int n = 0; n < num_xmm_regs; n++) { 280 XMMRegister xmm_name = as_XMMRegister(n); 281 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()); 282 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name)); 283 off += delta; 284 } 285 #undef NEXTREG 286 #undef STACK_OFFSET 287 288 return map; 289 } 290 291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 292 int opmask_state_bytes = 0; 293 int additional_frame_bytes = 0; 294 int num_xmm_regs = XMMRegister::number_of_registers; 295 int ymm_bytes = num_xmm_regs * 16; 296 int zmm_bytes = num_xmm_regs * 32; 297 // Recover XMM & FPU state 298 #ifdef COMPILER2 299 if (restore_vectors) { 300 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 301 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 302 // Save upper half of YMM registers 303 additional_frame_bytes = ymm_bytes; 304 if (UseAVX > 2) { 305 // Save upper half of ZMM registers as well 306 additional_frame_bytes += zmm_bytes; 307 opmask_state_bytes = KRegister::number_of_registers * 8; 308 additional_frame_bytes += opmask_state_bytes; 309 } 310 } 311 #else 312 assert(!restore_vectors, "vectors are generated only by C2"); 313 #endif 314 315 int off = xmm0_off; 316 int delta = xmm1_off - off; 317 318 __ vzeroupper(); 319 320 if (UseSSE == 1) { 321 // Restore XMM registers 322 assert(additional_frame_bytes == 0, ""); 323 for (int n = 0; n < num_xmm_regs; n++) { 324 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize)); 325 off += delta; 326 } 327 } else if (UseSSE >= 2) { 328 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and 329 // ZMM because the movdqu instruction zeros the upper part of the XMM register. 330 for (int n = 0; n < num_xmm_regs; n++) { 331 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes)); 332 off += delta; 333 } 334 } 335 336 if (restore_vectors) { 337 off = additional_frame_bytes - ymm_bytes; 338 // Restore upper half of YMM registers. 339 for (int n = 0; n < num_xmm_regs; n++) { 340 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off)); 341 } 342 if (UseAVX > 2) { 343 // Restore upper half of ZMM registers. 344 off = opmask_state_bytes; 345 for (int n = 0; n < num_xmm_regs; n++) { 346 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off)); 347 } 348 for (int n = 0; n < KRegister::number_of_registers; n++) { 349 __ kmov(as_KRegister(n), Address(rsp, n*8)); 350 } 351 } 352 __ addptr(rsp, additional_frame_bytes); 353 } 354 355 __ pop_FPU_state(); 356 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers 357 358 __ popf(); 359 __ popa(); 360 // Get the rbp, described implicitly by the frame sender code (no oopMap) 361 __ pop(rbp); 362 } 363 364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 365 366 // Just restore result register. Only used by deoptimization. By 367 // now any callee save register that needs to be restore to a c2 368 // caller of the deoptee has been extracted into the vframeArray 369 // and will be stuffed into the c2i adapter we create for later 370 // restoration so only result registers need to be restored here. 371 // 372 373 __ frstor(Address(rsp, 0)); // Restore fpu state 374 375 // Recover XMM & FPU state 376 if( UseSSE == 1 ) { 377 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); 378 } else if( UseSSE >= 2 ) { 379 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); 380 } 381 __ movptr(rax, Address(rsp, rax_off*wordSize)); 382 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); 383 // Pop all of the register save are off the stack except the return address 384 __ addptr(rsp, return_off * wordSize); 385 } 386 387 // Is vector's size (in bytes) bigger than a size saved by default? 388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. 389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. 390 bool SharedRuntime::is_wide_vector(int size) { 391 return size > 16; 392 } 393 394 // The java_calling_convention describes stack locations as ideal slots on 395 // a frame with no abi restrictions. Since we must observe abi restrictions 396 // (like the placement of the register window) the slots must be biased by 397 // the following value. 398 static int reg2offset_in(VMReg r) { 399 // Account for saved rbp, and return address 400 // This should really be in_preserve_stack_slots 401 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; 402 } 403 404 static int reg2offset_out(VMReg r) { 405 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 406 } 407 408 // --------------------------------------------------------------------------- 409 // Read the array of BasicTypes from a signature, and compute where the 410 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 411 // quantities. Values less than SharedInfo::stack0 are registers, those above 412 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 413 // as framesizes are fixed. 414 // VMRegImpl::stack0 refers to the first slot 0(sp). 415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. 416 // Register up to Register::number_of_registers are the 32-bit 417 // integer registers. 418 419 // Pass first two oop/int args in registers ECX and EDX. 420 // Pass first two float/double args in registers XMM0 and XMM1. 421 // Doubles have precedence, so if you pass a mix of floats and doubles 422 // the doubles will grab the registers before the floats will. 423 424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are 425 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 426 // units regardless of build. Of course for i486 there is no 64 bit build 427 428 429 // --------------------------------------------------------------------------- 430 // The compiled Java calling convention. 431 // Pass first two oop/int args in registers ECX and EDX. 432 // Pass first two float/double args in registers XMM0 and XMM1. 433 // Doubles have precedence, so if you pass a mix of floats and doubles 434 // the doubles will grab the registers before the floats will. 435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 436 VMRegPair *regs, 437 int total_args_passed) { 438 uint stack = 0; // Starting stack position for args on stack 439 440 441 // Pass first two oop/int args in registers ECX and EDX. 442 uint reg_arg0 = 9999; 443 uint reg_arg1 = 9999; 444 445 // Pass first two float/double args in registers XMM0 and XMM1. 446 // Doubles have precedence, so if you pass a mix of floats and doubles 447 // the doubles will grab the registers before the floats will. 448 // CNC - TURNED OFF FOR non-SSE. 449 // On Intel we have to round all doubles (and most floats) at 450 // call sites by storing to the stack in any case. 451 // UseSSE=0 ==> Don't Use ==> 9999+0 452 // UseSSE=1 ==> Floats only ==> 9999+1 453 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 454 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; 455 uint fargs = (UseSSE>=2) ? 2 : UseSSE; 456 uint freg_arg0 = 9999+fargs; 457 uint freg_arg1 = 9999+fargs; 458 459 // Pass doubles & longs aligned on the stack. First count stack slots for doubles 460 int i; 461 for( i = 0; i < total_args_passed; i++) { 462 if( sig_bt[i] == T_DOUBLE ) { 463 // first 2 doubles go in registers 464 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; 465 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; 466 else // Else double is passed low on the stack to be aligned. 467 stack += 2; 468 } else if( sig_bt[i] == T_LONG ) { 469 stack += 2; 470 } 471 } 472 int dstack = 0; // Separate counter for placing doubles 473 474 // Now pick where all else goes. 475 for( i = 0; i < total_args_passed; i++) { 476 // From the type and the argument number (count) compute the location 477 switch( sig_bt[i] ) { 478 case T_SHORT: 479 case T_CHAR: 480 case T_BYTE: 481 case T_BOOLEAN: 482 case T_INT: 483 case T_ARRAY: 484 case T_OBJECT: 485 case T_ADDRESS: 486 if( reg_arg0 == 9999 ) { 487 reg_arg0 = i; 488 regs[i].set1(rcx->as_VMReg()); 489 } else if( reg_arg1 == 9999 ) { 490 reg_arg1 = i; 491 regs[i].set1(rdx->as_VMReg()); 492 } else { 493 regs[i].set1(VMRegImpl::stack2reg(stack++)); 494 } 495 break; 496 case T_FLOAT: 497 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { 498 freg_arg0 = i; 499 regs[i].set1(xmm0->as_VMReg()); 500 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { 501 freg_arg1 = i; 502 regs[i].set1(xmm1->as_VMReg()); 503 } else { 504 regs[i].set1(VMRegImpl::stack2reg(stack++)); 505 } 506 break; 507 case T_LONG: 508 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 509 regs[i].set2(VMRegImpl::stack2reg(dstack)); 510 dstack += 2; 511 break; 512 case T_DOUBLE: 513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 514 if( freg_arg0 == (uint)i ) { 515 regs[i].set2(xmm0->as_VMReg()); 516 } else if( freg_arg1 == (uint)i ) { 517 regs[i].set2(xmm1->as_VMReg()); 518 } else { 519 regs[i].set2(VMRegImpl::stack2reg(dstack)); 520 dstack += 2; 521 } 522 break; 523 case T_VOID: regs[i].set_bad(); break; 524 break; 525 default: 526 ShouldNotReachHere(); 527 break; 528 } 529 } 530 531 return stack; 532 } 533 534 // Patch the callers callsite with entry to compiled code if it exists. 535 static void patch_callers_callsite(MacroAssembler *masm) { 536 Label L; 537 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD); 538 __ jcc(Assembler::equal, L); 539 // Schedule the branch target address early. 540 // Call into the VM to patch the caller, then jump to compiled callee 541 // rax, isn't live so capture return address while we easily can 542 __ movptr(rax, Address(rsp, 0)); 543 __ pusha(); 544 __ pushf(); 545 546 if (UseSSE == 1) { 547 __ subptr(rsp, 2*wordSize); 548 __ movflt(Address(rsp, 0), xmm0); 549 __ movflt(Address(rsp, wordSize), xmm1); 550 } 551 if (UseSSE >= 2) { 552 __ subptr(rsp, 4*wordSize); 553 __ movdbl(Address(rsp, 0), xmm0); 554 __ movdbl(Address(rsp, 2*wordSize), xmm1); 555 } 556 #ifdef COMPILER2 557 // C2 may leave the stack dirty if not in SSE2+ mode 558 if (UseSSE >= 2) { 559 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 560 } else { 561 __ empty_FPU_stack(); 562 } 563 #endif /* COMPILER2 */ 564 565 // VM needs caller's callsite 566 __ push(rax); 567 // VM needs target method 568 __ push(rbx); 569 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 570 __ addptr(rsp, 2*wordSize); 571 572 if (UseSSE == 1) { 573 __ movflt(xmm0, Address(rsp, 0)); 574 __ movflt(xmm1, Address(rsp, wordSize)); 575 __ addptr(rsp, 2*wordSize); 576 } 577 if (UseSSE >= 2) { 578 __ movdbl(xmm0, Address(rsp, 0)); 579 __ movdbl(xmm1, Address(rsp, 2*wordSize)); 580 __ addptr(rsp, 4*wordSize); 581 } 582 583 __ popf(); 584 __ popa(); 585 __ bind(L); 586 } 587 588 589 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { 590 int next_off = st_off - Interpreter::stackElementSize; 591 __ movdbl(Address(rsp, next_off), r); 592 } 593 594 static void gen_c2i_adapter(MacroAssembler *masm, 595 int total_args_passed, 596 int comp_args_on_stack, 597 const BasicType *sig_bt, 598 const VMRegPair *regs, 599 Label& skip_fixup) { 600 // Before we get into the guts of the C2I adapter, see if we should be here 601 // at all. We've come from compiled code and are attempting to jump to the 602 // interpreter, which means the caller made a static call to get here 603 // (vcalls always get a compiled target if there is one). Check for a 604 // compiled target. If there is one, we need to patch the caller's call. 605 patch_callers_callsite(masm); 606 607 __ bind(skip_fixup); 608 609 #ifdef COMPILER2 610 // C2 may leave the stack dirty if not in SSE2+ mode 611 if (UseSSE >= 2) { 612 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 613 } else { 614 __ empty_FPU_stack(); 615 } 616 #endif /* COMPILER2 */ 617 618 // Since all args are passed on the stack, total_args_passed * interpreter_ 619 // stack_element_size is the 620 // space we need. 621 int extraspace = total_args_passed * Interpreter::stackElementSize; 622 623 // Get return address 624 __ pop(rax); 625 626 // set senderSP value 627 __ movptr(rsi, rsp); 628 629 __ subptr(rsp, extraspace); 630 631 // Now write the args into the outgoing interpreter space 632 for (int i = 0; i < total_args_passed; i++) { 633 if (sig_bt[i] == T_VOID) { 634 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 635 continue; 636 } 637 638 // st_off points to lowest address on stack. 639 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; 640 int next_off = st_off - Interpreter::stackElementSize; 641 642 // Say 4 args: 643 // i st_off 644 // 0 12 T_LONG 645 // 1 8 T_VOID 646 // 2 4 T_OBJECT 647 // 3 0 T_BOOL 648 VMReg r_1 = regs[i].first(); 649 VMReg r_2 = regs[i].second(); 650 if (!r_1->is_valid()) { 651 assert(!r_2->is_valid(), ""); 652 continue; 653 } 654 655 if (r_1->is_stack()) { 656 // memory to memory use fpu stack top 657 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 658 659 if (!r_2->is_valid()) { 660 __ movl(rdi, Address(rsp, ld_off)); 661 __ movptr(Address(rsp, st_off), rdi); 662 } else { 663 664 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW 665 // st_off == MSW, st_off-wordSize == LSW 666 667 __ movptr(rdi, Address(rsp, ld_off)); 668 __ movptr(Address(rsp, next_off), rdi); 669 __ movptr(rdi, Address(rsp, ld_off + wordSize)); 670 __ movptr(Address(rsp, st_off), rdi); 671 } 672 } else if (r_1->is_Register()) { 673 Register r = r_1->as_Register(); 674 if (!r_2->is_valid()) { 675 __ movl(Address(rsp, st_off), r); 676 } else { 677 // long/double in gpr 678 ShouldNotReachHere(); 679 } 680 } else { 681 assert(r_1->is_XMMRegister(), ""); 682 if (!r_2->is_valid()) { 683 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); 684 } else { 685 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); 686 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); 687 } 688 } 689 } 690 691 // Schedule the branch target address early. 692 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); 693 // And repush original return address 694 __ push(rax); 695 __ jmp(rcx); 696 } 697 698 699 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { 700 int next_val_off = ld_off - Interpreter::stackElementSize; 701 __ movdbl(r, Address(saved_sp, next_val_off)); 702 } 703 704 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, 705 address code_start, address code_end, 706 Label& L_ok) { 707 Label L_fail; 708 __ lea(temp_reg, ExternalAddress(code_start)); 709 __ cmpptr(pc_reg, temp_reg); 710 __ jcc(Assembler::belowEqual, L_fail); 711 __ lea(temp_reg, ExternalAddress(code_end)); 712 __ cmpptr(pc_reg, temp_reg); 713 __ jcc(Assembler::below, L_ok); 714 __ bind(L_fail); 715 } 716 717 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 718 int total_args_passed, 719 int comp_args_on_stack, 720 const BasicType *sig_bt, 721 const VMRegPair *regs) { 722 // Note: rsi contains the senderSP on entry. We must preserve it since 723 // we may do a i2c -> c2i transition if we lose a race where compiled 724 // code goes non-entrant while we get args ready. 725 726 // Adapters can be frameless because they do not require the caller 727 // to perform additional cleanup work, such as correcting the stack pointer. 728 // An i2c adapter is frameless because the *caller* frame, which is interpreted, 729 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), 730 // even if a callee has modified the stack pointer. 731 // A c2i adapter is frameless because the *callee* frame, which is interpreted, 732 // routinely repairs its caller's stack pointer (from sender_sp, which is set 733 // up via the senderSP register). 734 // In other words, if *either* the caller or callee is interpreted, we can 735 // get the stack pointer repaired after a call. 736 // This is why c2i and i2c adapters cannot be indefinitely composed. 737 // In particular, if a c2i adapter were to somehow call an i2c adapter, 738 // both caller and callee would be compiled methods, and neither would 739 // clean up the stack pointer changes performed by the two adapters. 740 // If this happens, control eventually transfers back to the compiled 741 // caller, but with an uncorrected stack, causing delayed havoc. 742 743 // Pick up the return address 744 __ movptr(rax, Address(rsp, 0)); 745 746 if (VerifyAdapterCalls && 747 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) { 748 // So, let's test for cascading c2i/i2c adapters right now. 749 // assert(Interpreter::contains($return_addr) || 750 // StubRoutines::contains($return_addr), 751 // "i2c adapter must return to an interpreter frame"); 752 __ block_comment("verify_i2c { "); 753 Label L_ok; 754 if (Interpreter::code() != nullptr) { 755 range_check(masm, rax, rdi, 756 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 757 L_ok); 758 } 759 if (StubRoutines::initial_stubs_code() != nullptr) { 760 range_check(masm, rax, rdi, 761 StubRoutines::initial_stubs_code()->code_begin(), 762 StubRoutines::initial_stubs_code()->code_end(), 763 L_ok); 764 } 765 if (StubRoutines::final_stubs_code() != nullptr) { 766 range_check(masm, rax, rdi, 767 StubRoutines::final_stubs_code()->code_begin(), 768 StubRoutines::final_stubs_code()->code_end(), 769 L_ok); 770 } 771 const char* msg = "i2c adapter must return to an interpreter frame"; 772 __ block_comment(msg); 773 __ stop(msg); 774 __ bind(L_ok); 775 __ block_comment("} verify_i2ce "); 776 } 777 778 // Must preserve original SP for loading incoming arguments because 779 // we need to align the outgoing SP for compiled code. 780 __ movptr(rdi, rsp); 781 782 // Cut-out for having no stack args. Since up to 2 int/oop args are passed 783 // in registers, we will occasionally have no stack args. 784 int comp_words_on_stack = 0; 785 if (comp_args_on_stack) { 786 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 787 // registers are below. By subtracting stack0, we either get a negative 788 // number (all values in registers) or the maximum stack slot accessed. 789 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); 790 // Convert 4-byte stack slots to words. 791 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; 792 // Round up to miminum stack alignment, in wordSize 793 comp_words_on_stack = align_up(comp_words_on_stack, 2); 794 __ subptr(rsp, comp_words_on_stack * wordSize); 795 } 796 797 // Align the outgoing SP 798 __ andptr(rsp, -(StackAlignmentInBytes)); 799 800 // push the return address on the stack (note that pushing, rather 801 // than storing it, yields the correct frame alignment for the callee) 802 __ push(rax); 803 804 // Put saved SP in another register 805 const Register saved_sp = rax; 806 __ movptr(saved_sp, rdi); 807 808 809 // Will jump to the compiled code just as if compiled code was doing it. 810 // Pre-load the register-jump target early, to schedule it better. 811 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); 812 813 // Now generate the shuffle code. Pick up all register args and move the 814 // rest through the floating point stack top. 815 for (int i = 0; i < total_args_passed; i++) { 816 if (sig_bt[i] == T_VOID) { 817 // Longs and doubles are passed in native word order, but misaligned 818 // in the 32-bit build. 819 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 820 continue; 821 } 822 823 // Pick up 0, 1 or 2 words from SP+offset. 824 825 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 826 "scrambled load targets?"); 827 // Load in argument order going down. 828 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; 829 // Point to interpreter value (vs. tag) 830 int next_off = ld_off - Interpreter::stackElementSize; 831 // 832 // 833 // 834 VMReg r_1 = regs[i].first(); 835 VMReg r_2 = regs[i].second(); 836 if (!r_1->is_valid()) { 837 assert(!r_2->is_valid(), ""); 838 continue; 839 } 840 if (r_1->is_stack()) { 841 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 842 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; 843 844 // We can use rsi as a temp here because compiled code doesn't need rsi as an input 845 // and if we end up going thru a c2i because of a miss a reasonable value of rsi 846 // we be generated. 847 if (!r_2->is_valid()) { 848 // __ fld_s(Address(saved_sp, ld_off)); 849 // __ fstp_s(Address(rsp, st_off)); 850 __ movl(rsi, Address(saved_sp, ld_off)); 851 __ movptr(Address(rsp, st_off), rsi); 852 } else { 853 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 854 // are accessed as negative so LSW is at LOW address 855 856 // ld_off is MSW so get LSW 857 // st_off is LSW (i.e. reg.first()) 858 // __ fld_d(Address(saved_sp, next_off)); 859 // __ fstp_d(Address(rsp, st_off)); 860 // 861 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 862 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 863 // So we must adjust where to pick up the data to match the interpreter. 864 // 865 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 866 // are accessed as negative so LSW is at LOW address 867 868 // ld_off is MSW so get LSW 869 __ movptr(rsi, Address(saved_sp, next_off)); 870 __ movptr(Address(rsp, st_off), rsi); 871 __ movptr(rsi, Address(saved_sp, ld_off)); 872 __ movptr(Address(rsp, st_off + wordSize), rsi); 873 } 874 } else if (r_1->is_Register()) { // Register argument 875 Register r = r_1->as_Register(); 876 assert(r != rax, "must be different"); 877 if (r_2->is_valid()) { 878 // 879 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 880 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 881 // So we must adjust where to pick up the data to match the interpreter. 882 883 // this can be a misaligned move 884 __ movptr(r, Address(saved_sp, next_off)); 885 assert(r_2->as_Register() != rax, "need another temporary register"); 886 // Remember r_1 is low address (and LSB on x86) 887 // So r_2 gets loaded from high address regardless of the platform 888 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); 889 } else { 890 __ movl(r, Address(saved_sp, ld_off)); 891 } 892 } else { 893 assert(r_1->is_XMMRegister(), ""); 894 if (!r_2->is_valid()) { 895 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); 896 } else { 897 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); 898 } 899 } 900 } 901 902 // 6243940 We might end up in handle_wrong_method if 903 // the callee is deoptimized as we race thru here. If that 904 // happens we don't want to take a safepoint because the 905 // caller frame will look interpreted and arguments are now 906 // "compiled" so it is much better to make this transition 907 // invisible to the stack walking code. Unfortunately if 908 // we try and find the callee by normal means a safepoint 909 // is possible. So we stash the desired callee in the thread 910 // and the vm will find there should this case occur. 911 912 __ get_thread(rax); 913 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); 914 915 // move Method* to rax, in case we end up in an c2i adapter. 916 // the c2i adapters expect Method* in rax, (c2) because c2's 917 // resolve stubs return the result (the method) in rax,. 918 // I'd love to fix this. 919 __ mov(rax, rbx); 920 921 __ jmp(rdi); 922 } 923 924 // --------------------------------------------------------------- 925 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 926 int total_args_passed, 927 int comp_args_on_stack, 928 const BasicType *sig_bt, 929 const VMRegPair *regs, 930 AdapterFingerPrint* fingerprint) { 931 address i2c_entry = __ pc(); 932 933 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 934 935 // ------------------------------------------------------------------------- 936 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls 937 // to the interpreter. The args start out packed in the compiled layout. They 938 // need to be unpacked into the interpreter layout. This will almost always 939 // require some stack space. We grow the current (compiled) stack, then repack 940 // the args. We finally end in a jump to the generic interpreter entry point. 941 // On exit from the interpreter, the interpreter will restore our SP (lest the 942 // compiled code, which relies solely on SP and not EBP, get sick). 943 944 address c2i_unverified_entry = __ pc(); 945 Label skip_fixup; 946 947 Register data = rax; 948 Register receiver = rcx; 949 Register temp = rbx; 950 951 { 952 __ ic_check(1 /* end_alignment */); 953 __ movptr(rbx, Address(data, CompiledICData::speculated_method_offset())); 954 // Method might have been compiled since the call site was patched to 955 // interpreted if that is the case treat it as a miss so we can get 956 // the call site corrected. 957 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD); 958 __ jcc(Assembler::equal, skip_fixup); 959 } 960 961 address c2i_entry = __ pc(); 962 963 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 964 bs->c2i_entry_barrier(masm); 965 966 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 967 968 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 969 } 970 971 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 972 VMRegPair *regs, 973 int total_args_passed) { 974 975 // We return the amount of VMRegImpl stack slots we need to reserve for all 976 // the arguments NOT counting out_preserve_stack_slots. 977 978 uint stack = 0; // All arguments on stack 979 980 for( int i = 0; i < total_args_passed; i++) { 981 // From the type and the argument number (count) compute the location 982 switch( sig_bt[i] ) { 983 case T_BOOLEAN: 984 case T_CHAR: 985 case T_FLOAT: 986 case T_BYTE: 987 case T_SHORT: 988 case T_INT: 989 case T_OBJECT: 990 case T_ARRAY: 991 case T_ADDRESS: 992 case T_METADATA: 993 regs[i].set1(VMRegImpl::stack2reg(stack++)); 994 break; 995 case T_LONG: 996 case T_DOUBLE: // The stack numbering is reversed from Java 997 // Since C arguments do not get reversed, the ordering for 998 // doubles on the stack must be opposite the Java convention 999 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 1000 regs[i].set2(VMRegImpl::stack2reg(stack)); 1001 stack += 2; 1002 break; 1003 case T_VOID: regs[i].set_bad(); break; 1004 default: 1005 ShouldNotReachHere(); 1006 break; 1007 } 1008 } 1009 return stack; 1010 } 1011 1012 int SharedRuntime::vector_calling_convention(VMRegPair *regs, 1013 uint num_bits, 1014 uint total_args_passed) { 1015 Unimplemented(); 1016 return 0; 1017 } 1018 1019 // A simple move of integer like type 1020 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1021 if (src.first()->is_stack()) { 1022 if (dst.first()->is_stack()) { 1023 // stack to stack 1024 // __ ld(FP, reg2offset(src.first()), L5); 1025 // __ st(L5, SP, reg2offset(dst.first())); 1026 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); 1027 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1028 } else { 1029 // stack to reg 1030 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); 1031 } 1032 } else if (dst.first()->is_stack()) { 1033 // reg to stack 1034 // no need to sign extend on 64bit 1035 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1036 } else { 1037 if (dst.first() != src.first()) { 1038 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1039 } 1040 } 1041 } 1042 1043 // An oop arg. Must pass a handle not the oop itself 1044 static void object_move(MacroAssembler* masm, 1045 OopMap* map, 1046 int oop_handle_offset, 1047 int framesize_in_slots, 1048 VMRegPair src, 1049 VMRegPair dst, 1050 bool is_receiver, 1051 int* receiver_offset) { 1052 1053 // Because of the calling conventions we know that src can be a 1054 // register or a stack location. dst can only be a stack location. 1055 1056 assert(dst.first()->is_stack(), "must be stack"); 1057 // must pass a handle. First figure out the location we use as a handle 1058 1059 if (src.first()->is_stack()) { 1060 // Oop is already on the stack as an argument 1061 Register rHandle = rax; 1062 Label nil; 1063 __ xorptr(rHandle, rHandle); 1064 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD); 1065 __ jcc(Assembler::equal, nil); 1066 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); 1067 __ bind(nil); 1068 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1069 1070 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1071 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 1072 if (is_receiver) { 1073 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 1074 } 1075 } else { 1076 // Oop is in a register we must store it to the space we reserve 1077 // on the stack for oop_handles 1078 const Register rOop = src.first()->as_Register(); 1079 const Register rHandle = rax; 1080 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; 1081 int offset = oop_slot*VMRegImpl::stack_slot_size; 1082 Label skip; 1083 __ movptr(Address(rsp, offset), rOop); 1084 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1085 __ xorptr(rHandle, rHandle); 1086 __ cmpptr(rOop, NULL_WORD); 1087 __ jcc(Assembler::equal, skip); 1088 __ lea(rHandle, Address(rsp, offset)); 1089 __ bind(skip); 1090 // Store the handle parameter 1091 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1092 if (is_receiver) { 1093 *receiver_offset = offset; 1094 } 1095 } 1096 } 1097 1098 // A float arg may have to do float reg int reg conversion 1099 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1100 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); 1101 1102 // Because of the calling convention we know that src is either a stack location 1103 // or an xmm register. dst can only be a stack location. 1104 1105 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); 1106 1107 if (src.first()->is_stack()) { 1108 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); 1109 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1110 } else { 1111 // reg to stack 1112 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1113 } 1114 } 1115 1116 // A long move 1117 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1118 1119 // The only legal possibility for a long_move VMRegPair is: 1120 // 1: two stack slots (possibly unaligned) 1121 // as neither the java or C calling convention will use registers 1122 // for longs. 1123 1124 if (src.first()->is_stack() && dst.first()->is_stack()) { 1125 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); 1126 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1127 __ movptr(rbx, Address(rbp, reg2offset_in(src.second()))); 1128 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1129 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx); 1130 } else { 1131 ShouldNotReachHere(); 1132 } 1133 } 1134 1135 // A double move 1136 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1137 1138 // The only legal possibilities for a double_move VMRegPair are: 1139 // The painful thing here is that like long_move a VMRegPair might be 1140 1141 // Because of the calling convention we know that src is either 1142 // 1: a single physical register (xmm registers only) 1143 // 2: two stack slots (possibly unaligned) 1144 // dst can only be a pair of stack slots. 1145 1146 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); 1147 1148 if (src.first()->is_stack()) { 1149 // source is all stack 1150 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1151 __ movptr(rbx, Address(rbp, reg2offset_in(src.second()))); 1152 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1153 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx); 1154 } else { 1155 // reg to stack 1156 // No worries about stack alignment 1157 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1158 } 1159 } 1160 1161 1162 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1163 // We always ignore the frame_slots arg and just use the space just below frame pointer 1164 // which by this time is free to use 1165 switch (ret_type) { 1166 case T_FLOAT: 1167 __ fstp_s(Address(rbp, -wordSize)); 1168 break; 1169 case T_DOUBLE: 1170 __ fstp_d(Address(rbp, -2*wordSize)); 1171 break; 1172 case T_VOID: break; 1173 case T_LONG: 1174 __ movptr(Address(rbp, -wordSize), rax); 1175 __ movptr(Address(rbp, -2*wordSize), rdx); 1176 break; 1177 default: { 1178 __ movptr(Address(rbp, -wordSize), rax); 1179 } 1180 } 1181 } 1182 1183 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1184 // We always ignore the frame_slots arg and just use the space just below frame pointer 1185 // which by this time is free to use 1186 switch (ret_type) { 1187 case T_FLOAT: 1188 __ fld_s(Address(rbp, -wordSize)); 1189 break; 1190 case T_DOUBLE: 1191 __ fld_d(Address(rbp, -2*wordSize)); 1192 break; 1193 case T_LONG: 1194 __ movptr(rax, Address(rbp, -wordSize)); 1195 __ movptr(rdx, Address(rbp, -2*wordSize)); 1196 break; 1197 case T_VOID: break; 1198 default: { 1199 __ movptr(rax, Address(rbp, -wordSize)); 1200 } 1201 } 1202 } 1203 1204 static void verify_oop_args(MacroAssembler* masm, 1205 const methodHandle& method, 1206 const BasicType* sig_bt, 1207 const VMRegPair* regs) { 1208 Register temp_reg = rbx; // not part of any compiled calling seq 1209 if (VerifyOops) { 1210 for (int i = 0; i < method->size_of_parameters(); i++) { 1211 if (is_reference_type(sig_bt[i])) { 1212 VMReg r = regs[i].first(); 1213 assert(r->is_valid(), "bad oop arg"); 1214 if (r->is_stack()) { 1215 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1216 __ verify_oop(temp_reg); 1217 } else { 1218 __ verify_oop(r->as_Register()); 1219 } 1220 } 1221 } 1222 } 1223 } 1224 1225 static void gen_special_dispatch(MacroAssembler* masm, 1226 const methodHandle& method, 1227 const BasicType* sig_bt, 1228 const VMRegPair* regs) { 1229 verify_oop_args(masm, method, sig_bt, regs); 1230 vmIntrinsics::ID iid = method->intrinsic_id(); 1231 1232 // Now write the args into the outgoing interpreter space 1233 bool has_receiver = false; 1234 Register receiver_reg = noreg; 1235 int member_arg_pos = -1; 1236 Register member_reg = noreg; 1237 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1238 if (ref_kind != 0) { 1239 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1240 member_reg = rbx; // known to be free at this point 1241 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1242 } else if (iid == vmIntrinsics::_invokeBasic) { 1243 has_receiver = true; 1244 } else { 1245 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid)); 1246 } 1247 1248 if (member_reg != noreg) { 1249 // Load the member_arg into register, if necessary. 1250 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1251 VMReg r = regs[member_arg_pos].first(); 1252 if (r->is_stack()) { 1253 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1254 } else { 1255 // no data motion is needed 1256 member_reg = r->as_Register(); 1257 } 1258 } 1259 1260 if (has_receiver) { 1261 // Make sure the receiver is loaded into a register. 1262 assert(method->size_of_parameters() > 0, "oob"); 1263 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1264 VMReg r = regs[0].first(); 1265 assert(r->is_valid(), "bad receiver arg"); 1266 if (r->is_stack()) { 1267 // Porting note: This assumes that compiled calling conventions always 1268 // pass the receiver oop in a register. If this is not true on some 1269 // platform, pick a temp and load the receiver from stack. 1270 fatal("receiver always in a register"); 1271 receiver_reg = rcx; // known to be free at this point 1272 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1273 } else { 1274 // no data motion is needed 1275 receiver_reg = r->as_Register(); 1276 } 1277 } 1278 1279 // Figure out which address we are really jumping to: 1280 MethodHandles::generate_method_handle_dispatch(masm, iid, 1281 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1282 } 1283 1284 // --------------------------------------------------------------------------- 1285 // Generate a native wrapper for a given method. The method takes arguments 1286 // in the Java compiled code convention, marshals them to the native 1287 // convention (handlizes oops, etc), transitions to native, makes the call, 1288 // returns to java state (possibly blocking), unhandlizes any result and 1289 // returns. 1290 // 1291 // Critical native functions are a shorthand for the use of 1292 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1293 // functions. The wrapper is expected to unpack the arguments before 1294 // passing them to the callee. Critical native functions leave the state _in_Java, 1295 // since they cannot stop for GC. 1296 // Some other parts of JNI setup are skipped like the tear down of the JNI handle 1297 // block and the check for pending exceptions it's impossible for them 1298 // to be thrown. 1299 // 1300 // 1301 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1302 const methodHandle& method, 1303 int compile_id, 1304 BasicType* in_sig_bt, 1305 VMRegPair* in_regs, 1306 BasicType ret_type) { 1307 if (method->is_method_handle_intrinsic()) { 1308 vmIntrinsics::ID iid = method->intrinsic_id(); 1309 intptr_t start = (intptr_t)__ pc(); 1310 int vep_offset = ((intptr_t)__ pc()) - start; 1311 gen_special_dispatch(masm, 1312 method, 1313 in_sig_bt, 1314 in_regs); 1315 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1316 __ flush(); 1317 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1318 return nmethod::new_native_nmethod(method, 1319 compile_id, 1320 masm->code(), 1321 vep_offset, 1322 frame_complete, 1323 stack_slots / VMRegImpl::slots_per_word, 1324 in_ByteSize(-1), 1325 in_ByteSize(-1), 1326 (OopMapSet*)nullptr); 1327 } 1328 address native_func = method->native_function(); 1329 assert(native_func != nullptr, "must have function"); 1330 1331 // An OopMap for lock (and class if static) 1332 OopMapSet *oop_maps = new OopMapSet(); 1333 1334 // We have received a description of where all the java arg are located 1335 // on entry to the wrapper. We need to convert these args to where 1336 // the jni function will expect them. To figure out where they go 1337 // we convert the java signature to a C signature by inserting 1338 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1339 1340 const int total_in_args = method->size_of_parameters(); 1341 int total_c_args = total_in_args + (method->is_static() ? 2 : 1); 1342 1343 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1344 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1345 BasicType* in_elem_bt = nullptr; 1346 1347 int argc = 0; 1348 out_sig_bt[argc++] = T_ADDRESS; 1349 if (method->is_static()) { 1350 out_sig_bt[argc++] = T_OBJECT; 1351 } 1352 1353 for (int i = 0; i < total_in_args ; i++ ) { 1354 out_sig_bt[argc++] = in_sig_bt[i]; 1355 } 1356 1357 // Now figure out where the args must be stored and how much stack space 1358 // they require. 1359 int out_arg_slots; 1360 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args); 1361 1362 // Compute framesize for the wrapper. We need to handlize all oops in 1363 // registers a max of 2 on x86. 1364 1365 // Calculate the total number of stack slots we will need. 1366 1367 // First count the abi requirement plus all of the outgoing args 1368 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1369 1370 // Now the space for the inbound oop handle area 1371 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers 1372 1373 int oop_handle_offset = stack_slots; 1374 stack_slots += total_save_slots; 1375 1376 // Now any space we need for handlizing a klass if static method 1377 1378 int klass_slot_offset = 0; 1379 int klass_offset = -1; 1380 int lock_slot_offset = 0; 1381 bool is_static = false; 1382 1383 if (method->is_static()) { 1384 klass_slot_offset = stack_slots; 1385 stack_slots += VMRegImpl::slots_per_word; 1386 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1387 is_static = true; 1388 } 1389 1390 // Plus a lock if needed 1391 1392 if (method->is_synchronized()) { 1393 lock_slot_offset = stack_slots; 1394 stack_slots += VMRegImpl::slots_per_word; 1395 } 1396 1397 // Now a place (+2) to save return values or temp during shuffling 1398 // + 2 for return address (which we own) and saved rbp, 1399 stack_slots += 4; 1400 1401 // Ok The space we have allocated will look like: 1402 // 1403 // 1404 // FP-> | | 1405 // |---------------------| 1406 // | 2 slots for moves | 1407 // |---------------------| 1408 // | lock box (if sync) | 1409 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) 1410 // | klass (if static) | 1411 // |---------------------| <- klass_slot_offset 1412 // | oopHandle area | 1413 // |---------------------| <- oop_handle_offset (a max of 2 registers) 1414 // | outbound memory | 1415 // | based arguments | 1416 // | | 1417 // |---------------------| 1418 // | | 1419 // SP-> | out_preserved_slots | 1420 // 1421 // 1422 // **************************************************************************** 1423 // WARNING - on Windows Java Natives use pascal calling convention and pop the 1424 // arguments off of the stack after the jni call. Before the call we can use 1425 // instructions that are SP relative. After the jni call we switch to FP 1426 // relative instructions instead of re-adjusting the stack on windows. 1427 // **************************************************************************** 1428 1429 1430 // Now compute actual number of stack words we need rounding to make 1431 // stack properly aligned. 1432 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1433 1434 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1435 1436 intptr_t start = (intptr_t)__ pc(); 1437 1438 // First thing make an ic check to see if we should even be here 1439 1440 // We are free to use all registers as temps without saving them and 1441 // restoring them except rbp. rbp is the only callee save register 1442 // as far as the interpreter and the compiler(s) are concerned. 1443 1444 1445 const Register receiver = rcx; 1446 Label exception_pending; 1447 1448 __ verify_oop(receiver); 1449 // verified entry must be aligned for code patching. 1450 __ ic_check(8 /* end_alignment */); 1451 1452 int vep_offset = ((intptr_t)__ pc()) - start; 1453 1454 #ifdef COMPILER1 1455 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available. 1456 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) { 1457 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/); 1458 } 1459 #endif // COMPILER1 1460 1461 // The instruction at the verified entry point must be 5 bytes or longer 1462 // because it can be patched on the fly by make_non_entrant. The stack bang 1463 // instruction fits that requirement. 1464 1465 // Generate stack overflow check 1466 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size()); 1467 1468 // Generate a new frame for the wrapper. 1469 __ enter(); 1470 // -2 because return address is already present and so is saved rbp 1471 __ subptr(rsp, stack_size - 2*wordSize); 1472 1473 1474 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 1475 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */); 1476 1477 // Frame is now completed as far as size and linkage. 1478 int frame_complete = ((intptr_t)__ pc()) - start; 1479 1480 if (UseRTMLocking) { 1481 // Abort RTM transaction before calling JNI 1482 // because critical section will be large and will be 1483 // aborted anyway. Also nmethod could be deoptimized. 1484 __ xabort(0); 1485 } 1486 1487 // Calculate the difference between rsp and rbp,. We need to know it 1488 // after the native call because on windows Java Natives will pop 1489 // the arguments and it is painful to do rsp relative addressing 1490 // in a platform independent way. So after the call we switch to 1491 // rbp, relative addressing. 1492 1493 int fp_adjustment = stack_size - 2*wordSize; 1494 1495 #ifdef COMPILER2 1496 // C2 may leave the stack dirty if not in SSE2+ mode 1497 if (UseSSE >= 2) { 1498 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 1499 } else { 1500 __ empty_FPU_stack(); 1501 } 1502 #endif /* COMPILER2 */ 1503 1504 // Compute the rbp, offset for any slots used after the jni call 1505 1506 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; 1507 1508 // We use rdi as a thread pointer because it is callee save and 1509 // if we load it once it is usable thru the entire wrapper 1510 const Register thread = rdi; 1511 1512 // We use rsi as the oop handle for the receiver/klass 1513 // It is callee save so it survives the call to native 1514 1515 const Register oop_handle_reg = rsi; 1516 1517 __ get_thread(thread); 1518 1519 // 1520 // We immediately shuffle the arguments so that any vm call we have to 1521 // make from here on out (sync slow path, jvmti, etc.) we will have 1522 // captured the oops from our caller and have a valid oopMap for 1523 // them. 1524 1525 // ----------------- 1526 // The Grand Shuffle 1527 // 1528 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 1529 // and, if static, the class mirror instead of a receiver. This pretty much 1530 // guarantees that register layout will not match (and x86 doesn't use reg 1531 // parms though amd does). Since the native abi doesn't use register args 1532 // and the java conventions does we don't have to worry about collisions. 1533 // All of our moved are reg->stack or stack->stack. 1534 // We ignore the extra arguments during the shuffle and handle them at the 1535 // last moment. The shuffle is described by the two calling convention 1536 // vectors we have in our possession. We simply walk the java vector to 1537 // get the source locations and the c vector to get the destinations. 1538 1539 int c_arg = method->is_static() ? 2 : 1; 1540 1541 // Record rsp-based slot for receiver on stack for non-static methods 1542 int receiver_offset = -1; 1543 1544 // This is a trick. We double the stack slots so we can claim 1545 // the oops in the caller's frame. Since we are sure to have 1546 // more args than the caller doubling is enough to make 1547 // sure we can capture all the incoming oop args from the 1548 // caller. 1549 // 1550 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1551 1552 // Mark location of rbp, 1553 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); 1554 1555 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx 1556 // Are free to temporaries if we have to do stack to steck moves. 1557 // All inbound args are referenced based on rbp, and all outbound args via rsp. 1558 1559 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { 1560 switch (in_sig_bt[i]) { 1561 case T_ARRAY: 1562 case T_OBJECT: 1563 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1564 ((i == 0) && (!is_static)), 1565 &receiver_offset); 1566 break; 1567 case T_VOID: 1568 break; 1569 1570 case T_FLOAT: 1571 float_move(masm, in_regs[i], out_regs[c_arg]); 1572 break; 1573 1574 case T_DOUBLE: 1575 assert( i + 1 < total_in_args && 1576 in_sig_bt[i + 1] == T_VOID && 1577 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1578 double_move(masm, in_regs[i], out_regs[c_arg]); 1579 break; 1580 1581 case T_LONG : 1582 long_move(masm, in_regs[i], out_regs[c_arg]); 1583 break; 1584 1585 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1586 1587 default: 1588 simple_move32(masm, in_regs[i], out_regs[c_arg]); 1589 } 1590 } 1591 1592 // Pre-load a static method's oop into rsi. Used both by locking code and 1593 // the normal JNI call code. 1594 if (method->is_static()) { 1595 1596 // load opp into a register 1597 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); 1598 1599 // Now handlize the static class mirror it's known not-null. 1600 __ movptr(Address(rsp, klass_offset), oop_handle_reg); 1601 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 1602 1603 // Now get the handle 1604 __ lea(oop_handle_reg, Address(rsp, klass_offset)); 1605 // store the klass handle as second argument 1606 __ movptr(Address(rsp, wordSize), oop_handle_reg); 1607 } 1608 1609 // Change state to native (we save the return address in the thread, since it might not 1610 // be pushed on the stack when we do a stack traversal). It is enough that the pc() 1611 // points into the right code segment. It does not have to be the correct return pc. 1612 // We use the same pc/oopMap repeatedly when we call out 1613 1614 intptr_t the_pc = (intptr_t) __ pc(); 1615 oop_maps->add_gc_map(the_pc - start, map); 1616 1617 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg); 1618 1619 1620 // We have all of the arguments setup at this point. We must not touch any register 1621 // argument registers at this point (what if we save/restore them there are no oop? 1622 1623 { 1624 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg); 1625 __ mov_metadata(rax, method()); 1626 __ call_VM_leaf( 1627 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 1628 thread, rax); 1629 } 1630 1631 // RedefineClasses() tracing support for obsolete method entry 1632 if (log_is_enabled(Trace, redefine, class, obsolete)) { 1633 __ mov_metadata(rax, method()); 1634 __ call_VM_leaf( 1635 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 1636 thread, rax); 1637 } 1638 1639 // These are register definitions we need for locking/unlocking 1640 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction 1641 const Register obj_reg = rcx; // Will contain the oop 1642 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) 1643 1644 Label slow_path_lock; 1645 Label lock_done; 1646 1647 // Lock a synchronized method 1648 if (method->is_synchronized()) { 1649 Label count_mon; 1650 1651 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 1652 1653 // Get the handle (the 2nd argument) 1654 __ movptr(oop_handle_reg, Address(rsp, wordSize)); 1655 1656 // Get address of the box 1657 1658 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); 1659 1660 // Load the oop from the handle 1661 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 1662 1663 if (LockingMode == LM_MONITOR) { 1664 __ jmp(slow_path_lock); 1665 } else if (LockingMode == LM_LEGACY) { 1666 // Load immediate 1 into swap_reg %rax, 1667 __ movptr(swap_reg, 1); 1668 1669 // Load (object->mark() | 1) into swap_reg %rax, 1670 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1671 1672 // Save (object->mark() | 1) into BasicLock's displaced header 1673 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 1674 1675 // src -> dest iff dest == rax, else rax, <- dest 1676 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) 1677 __ lock(); 1678 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1679 __ jcc(Assembler::equal, count_mon); 1680 1681 // Test if the oopMark is an obvious stack pointer, i.e., 1682 // 1) (mark & 3) == 0, and 1683 // 2) rsp <= mark < mark + os::pagesize() 1684 // These 3 tests can be done by evaluating the following 1685 // expression: ((mark - rsp) & (3 - os::vm_page_size())), 1686 // assuming both stack pointer and pagesize have their 1687 // least significant 2 bits clear. 1688 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg 1689 1690 __ subptr(swap_reg, rsp); 1691 __ andptr(swap_reg, 3 - (int)os::vm_page_size()); 1692 1693 // Save the test result, for recursive case, the result is zero 1694 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 1695 __ jcc(Assembler::notEqual, slow_path_lock); 1696 } else { 1697 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 1698 __ lightweight_lock(lock_reg, obj_reg, swap_reg, thread, lock_reg, slow_path_lock); 1699 } 1700 __ bind(count_mon); 1701 __ inc_held_monitor_count(); 1702 1703 // Slow path will re-enter here 1704 __ bind(lock_done); 1705 } 1706 1707 1708 // Finally just about ready to make the JNI call 1709 1710 // get JNIEnv* which is first argument to native 1711 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); 1712 __ movptr(Address(rsp, 0), rdx); 1713 1714 // Now set thread in native 1715 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); 1716 1717 __ call(RuntimeAddress(native_func)); 1718 1719 // Verify or restore cpu control state after JNI call 1720 __ restore_cpu_control_state_after_jni(noreg); 1721 1722 // WARNING - on Windows Java Natives use pascal calling convention and pop the 1723 // arguments off of the stack. We could just re-adjust the stack pointer here 1724 // and continue to do SP relative addressing but we instead switch to FP 1725 // relative addressing. 1726 1727 // Unpack native results. 1728 switch (ret_type) { 1729 case T_BOOLEAN: __ c2bool(rax); break; 1730 case T_CHAR : __ andptr(rax, 0xFFFF); break; 1731 case T_BYTE : __ sign_extend_byte (rax); break; 1732 case T_SHORT : __ sign_extend_short(rax); break; 1733 case T_INT : /* nothing to do */ break; 1734 case T_DOUBLE : 1735 case T_FLOAT : 1736 // Result is in st0 we'll save as needed 1737 break; 1738 case T_ARRAY: // Really a handle 1739 case T_OBJECT: // Really a handle 1740 break; // can't de-handlize until after safepoint check 1741 case T_VOID: break; 1742 case T_LONG: break; 1743 default : ShouldNotReachHere(); 1744 } 1745 1746 Label after_transition; 1747 1748 // Switch thread to "native transition" state before reading the synchronization state. 1749 // This additional state is necessary because reading and testing the synchronization 1750 // state is not atomic w.r.t. GC, as this scenario demonstrates: 1751 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 1752 // VM thread changes sync state to synchronizing and suspends threads for GC. 1753 // Thread A is resumed to finish this native method, but doesn't block here since it 1754 // didn't see any synchronization is progress, and escapes. 1755 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); 1756 1757 // Force this write out before the read below 1758 if (!UseSystemMemoryBarrier) { 1759 __ membar(Assembler::Membar_mask_bits( 1760 Assembler::LoadLoad | Assembler::LoadStore | 1761 Assembler::StoreLoad | Assembler::StoreStore)); 1762 } 1763 1764 if (AlwaysRestoreFPU) { 1765 // Make sure the control word is correct. 1766 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 1767 } 1768 1769 // check for safepoint operation in progress and/or pending suspend requests 1770 { Label Continue, slow_path; 1771 1772 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */); 1773 1774 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); 1775 __ jcc(Assembler::equal, Continue); 1776 __ bind(slow_path); 1777 1778 // Don't use call_VM as it will see a possible pending exception and forward it 1779 // and never return here preventing us from clearing _last_native_pc down below. 1780 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are 1781 // preserved and correspond to the bcp/locals pointers. So we do a runtime call 1782 // by hand. 1783 // 1784 __ vzeroupper(); 1785 1786 save_native_result(masm, ret_type, stack_slots); 1787 __ push(thread); 1788 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, 1789 JavaThread::check_special_condition_for_native_trans))); 1790 __ increment(rsp, wordSize); 1791 // Restore any method result value 1792 restore_native_result(masm, ret_type, stack_slots); 1793 __ bind(Continue); 1794 } 1795 1796 // change thread state 1797 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); 1798 __ bind(after_transition); 1799 1800 Label reguard; 1801 Label reguard_done; 1802 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled); 1803 __ jcc(Assembler::equal, reguard); 1804 1805 // slow path reguard re-enters here 1806 __ bind(reguard_done); 1807 1808 // Handle possible exception (will unlock if necessary) 1809 1810 // native result if any is live 1811 1812 // Unlock 1813 Label slow_path_unlock; 1814 Label unlock_done; 1815 if (method->is_synchronized()) { 1816 1817 Label fast_done; 1818 1819 // Get locked oop from the handle we passed to jni 1820 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 1821 1822 if (LockingMode == LM_LEGACY) { 1823 Label not_recur; 1824 // Simple recursive lock? 1825 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD); 1826 __ jcc(Assembler::notEqual, not_recur); 1827 __ dec_held_monitor_count(); 1828 __ jmpb(fast_done); 1829 __ bind(not_recur); 1830 } 1831 1832 // Must save rax, if it is live now because cmpxchg must use it 1833 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 1834 save_native_result(masm, ret_type, stack_slots); 1835 } 1836 1837 if (LockingMode == LM_MONITOR) { 1838 __ jmp(slow_path_unlock); 1839 } else if (LockingMode == LM_LEGACY) { 1840 // get old displaced header 1841 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); 1842 1843 // get address of the stack lock 1844 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 1845 1846 // Atomic swap old header if oop still contains the stack lock 1847 // src -> dest iff dest == rax, else rax, <- dest 1848 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) 1849 __ lock(); 1850 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 1851 __ jcc(Assembler::notEqual, slow_path_unlock); 1852 __ dec_held_monitor_count(); 1853 } else { 1854 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 1855 __ lightweight_unlock(obj_reg, swap_reg, thread, lock_reg, slow_path_unlock); 1856 __ dec_held_monitor_count(); 1857 } 1858 1859 // slow path re-enters here 1860 __ bind(unlock_done); 1861 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 1862 restore_native_result(masm, ret_type, stack_slots); 1863 } 1864 1865 __ bind(fast_done); 1866 } 1867 1868 { 1869 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg); 1870 // Tell dtrace about this method exit 1871 save_native_result(masm, ret_type, stack_slots); 1872 __ mov_metadata(rax, method()); 1873 __ call_VM_leaf( 1874 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 1875 thread, rax); 1876 restore_native_result(masm, ret_type, stack_slots); 1877 } 1878 1879 // We can finally stop using that last_Java_frame we setup ages ago 1880 1881 __ reset_last_Java_frame(thread, false); 1882 1883 // Unbox oop result, e.g. JNIHandles::resolve value. 1884 if (is_reference_type(ret_type)) { 1885 __ resolve_jobject(rax /* value */, 1886 thread /* thread */, 1887 rcx /* tmp */); 1888 } 1889 1890 if (CheckJNICalls) { 1891 // clear_pending_jni_exception_check 1892 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD); 1893 } 1894 1895 // reset handle block 1896 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); 1897 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD); 1898 1899 // Any exception pending? 1900 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1901 __ jcc(Assembler::notEqual, exception_pending); 1902 1903 // no exception, we're almost done 1904 1905 // check that only result value is on FPU stack 1906 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); 1907 1908 // Fixup floating pointer results so that result looks like a return from a compiled method 1909 if (ret_type == T_FLOAT) { 1910 if (UseSSE >= 1) { 1911 // Pop st0 and store as float and reload into xmm register 1912 __ fstp_s(Address(rbp, -4)); 1913 __ movflt(xmm0, Address(rbp, -4)); 1914 } 1915 } else if (ret_type == T_DOUBLE) { 1916 if (UseSSE >= 2) { 1917 // Pop st0 and store as double and reload into xmm register 1918 __ fstp_d(Address(rbp, -8)); 1919 __ movdbl(xmm0, Address(rbp, -8)); 1920 } 1921 } 1922 1923 // Return 1924 1925 __ leave(); 1926 __ ret(0); 1927 1928 // Unexpected paths are out of line and go here 1929 1930 // Slow path locking & unlocking 1931 if (method->is_synchronized()) { 1932 1933 // BEGIN Slow path lock 1934 1935 __ bind(slow_path_lock); 1936 1937 if (LockingMode == LM_LIGHTWEIGHT) { 1938 // Reload the lock addr. Clobbered by lightweight_lock. 1939 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); 1940 } 1941 1942 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 1943 // args are (oop obj, BasicLock* lock, JavaThread* thread) 1944 __ push(thread); 1945 __ push(lock_reg); 1946 __ push(obj_reg); 1947 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); 1948 __ addptr(rsp, 3*wordSize); 1949 1950 #ifdef ASSERT 1951 { Label L; 1952 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1953 __ jcc(Assembler::equal, L); 1954 __ stop("no pending exception allowed on exit from monitorenter"); 1955 __ bind(L); 1956 } 1957 #endif 1958 __ jmp(lock_done); 1959 1960 // END Slow path lock 1961 1962 // BEGIN Slow path unlock 1963 __ bind(slow_path_unlock); 1964 __ vzeroupper(); 1965 // Slow path unlock 1966 1967 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 1968 save_native_result(masm, ret_type, stack_slots); 1969 } 1970 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 1971 1972 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 1973 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1974 1975 1976 // should be a peal 1977 // +wordSize because of the push above 1978 // args are (oop obj, BasicLock* lock, JavaThread* thread) 1979 __ push(thread); 1980 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 1981 __ push(rax); 1982 1983 __ push(obj_reg); 1984 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); 1985 __ addptr(rsp, 3*wordSize); 1986 #ifdef ASSERT 1987 { 1988 Label L; 1989 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 1990 __ jcc(Assembler::equal, L); 1991 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 1992 __ bind(L); 1993 } 1994 #endif /* ASSERT */ 1995 1996 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 1997 1998 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 1999 restore_native_result(masm, ret_type, stack_slots); 2000 } 2001 __ jmp(unlock_done); 2002 // END Slow path unlock 2003 2004 } 2005 2006 // SLOW PATH Reguard the stack if needed 2007 2008 __ bind(reguard); 2009 __ vzeroupper(); 2010 save_native_result(masm, ret_type, stack_slots); 2011 { 2012 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); 2013 } 2014 restore_native_result(masm, ret_type, stack_slots); 2015 __ jmp(reguard_done); 2016 2017 2018 // BEGIN EXCEPTION PROCESSING 2019 2020 // Forward the exception 2021 __ bind(exception_pending); 2022 2023 // remove possible return value from FPU register stack 2024 __ empty_FPU_stack(); 2025 2026 // pop our frame 2027 __ leave(); 2028 // and forward the exception 2029 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2030 2031 __ flush(); 2032 2033 nmethod *nm = nmethod::new_native_nmethod(method, 2034 compile_id, 2035 masm->code(), 2036 vep_offset, 2037 frame_complete, 2038 stack_slots / VMRegImpl::slots_per_word, 2039 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2040 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2041 oop_maps); 2042 2043 return nm; 2044 2045 } 2046 2047 // this function returns the adjust size (in number of words) to a c2i adapter 2048 // activation for use during deoptimization 2049 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { 2050 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2051 } 2052 2053 2054 // Number of stack slots between incoming argument block and the start of 2055 // a new frame. The PROLOG must add this many slots to the stack. The 2056 // EPILOG must remove this many slots. Intel needs one slot for 2057 // return address and one for rbp, (must save rbp) 2058 uint SharedRuntime::in_preserve_stack_slots() { 2059 return 2+VerifyStackAtCalls; 2060 } 2061 2062 uint SharedRuntime::out_preserve_stack_slots() { 2063 return 0; 2064 } 2065 2066 //------------------------------generate_deopt_blob---------------------------- 2067 void SharedRuntime::generate_deopt_blob() { 2068 // allocate space for the code 2069 ResourceMark rm; 2070 // setup code generation tools 2071 // note: the buffer code size must account for StackShadowPages=50 2072 CodeBuffer buffer("deopt_blob", 1536, 1024); 2073 MacroAssembler* masm = new MacroAssembler(&buffer); 2074 int frame_size_in_words; 2075 OopMap* map = nullptr; 2076 // Account for the extra args we place on the stack 2077 // by the time we call fetch_unroll_info 2078 const int additional_words = 2; // deopt kind, thread 2079 2080 OopMapSet *oop_maps = new OopMapSet(); 2081 2082 // ------------- 2083 // This code enters when returning to a de-optimized nmethod. A return 2084 // address has been pushed on the stack, and return values are in 2085 // registers. 2086 // If we are doing a normal deopt then we were called from the patched 2087 // nmethod from the point we returned to the nmethod. So the return 2088 // address on the stack is wrong by NativeCall::instruction_size 2089 // We will adjust the value to it looks like we have the original return 2090 // address on the stack (like when we eagerly deoptimized). 2091 // In the case of an exception pending with deoptimized then we enter 2092 // with a return address on the stack that points after the call we patched 2093 // into the exception handler. We have the following register state: 2094 // rax,: exception 2095 // rbx,: exception handler 2096 // rdx: throwing pc 2097 // So in this case we simply jam rdx into the useless return address and 2098 // the stack looks just like we want. 2099 // 2100 // At this point we need to de-opt. We save the argument return 2101 // registers. We call the first C routine, fetch_unroll_info(). This 2102 // routine captures the return values and returns a structure which 2103 // describes the current frame size and the sizes of all replacement frames. 2104 // The current frame is compiled code and may contain many inlined 2105 // functions, each with their own JVM state. We pop the current frame, then 2106 // push all the new frames. Then we call the C routine unpack_frames() to 2107 // populate these frames. Finally unpack_frames() returns us the new target 2108 // address. Notice that callee-save registers are BLOWN here; they have 2109 // already been captured in the vframeArray at the time the return PC was 2110 // patched. 2111 address start = __ pc(); 2112 Label cont; 2113 2114 // Prolog for non exception case! 2115 2116 // Save everything in sight. 2117 2118 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2119 // Normal deoptimization 2120 __ push(Deoptimization::Unpack_deopt); 2121 __ jmp(cont); 2122 2123 int reexecute_offset = __ pc() - start; 2124 2125 // Reexecute case 2126 // return address is the pc describes what bci to do re-execute at 2127 2128 // No need to update map as each call to save_live_registers will produce identical oopmap 2129 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2130 2131 __ push(Deoptimization::Unpack_reexecute); 2132 __ jmp(cont); 2133 2134 int exception_offset = __ pc() - start; 2135 2136 // Prolog for exception case 2137 2138 // all registers are dead at this entry point, except for rax, and 2139 // rdx which contain the exception oop and exception pc 2140 // respectively. Set them in TLS and fall thru to the 2141 // unpack_with_exception_in_tls entry point. 2142 2143 __ get_thread(rdi); 2144 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); 2145 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); 2146 2147 int exception_in_tls_offset = __ pc() - start; 2148 2149 // new implementation because exception oop is now passed in JavaThread 2150 2151 // Prolog for exception case 2152 // All registers must be preserved because they might be used by LinearScan 2153 // Exceptiop oop and throwing PC are passed in JavaThread 2154 // tos: stack at point of call to method that threw the exception (i.e. only 2155 // args are on the stack, no return address) 2156 2157 // make room on stack for the return address 2158 // It will be patched later with the throwing pc. The correct value is not 2159 // available now because loading it from memory would destroy registers. 2160 __ push(0); 2161 2162 // Save everything in sight. 2163 2164 // No need to update map as each call to save_live_registers will produce identical oopmap 2165 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2166 2167 // Now it is safe to overwrite any register 2168 2169 // store the correct deoptimization type 2170 __ push(Deoptimization::Unpack_exception); 2171 2172 // load throwing pc from JavaThread and patch it as the return address 2173 // of the current frame. Then clear the field in JavaThread 2174 __ get_thread(rdi); 2175 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); 2176 __ movptr(Address(rbp, wordSize), rdx); 2177 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); 2178 2179 #ifdef ASSERT 2180 // verify that there is really an exception oop in JavaThread 2181 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); 2182 __ verify_oop(rax); 2183 2184 // verify that there is no pending exception 2185 Label no_pending_exception; 2186 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); 2187 __ testptr(rax, rax); 2188 __ jcc(Assembler::zero, no_pending_exception); 2189 __ stop("must not have pending exception here"); 2190 __ bind(no_pending_exception); 2191 #endif 2192 2193 __ bind(cont); 2194 2195 // Compiled code leaves the floating point stack dirty, empty it. 2196 __ empty_FPU_stack(); 2197 2198 2199 // Call C code. Need thread and this frame, but NOT official VM entry 2200 // crud. We cannot block on this call, no GC can happen. 2201 __ get_thread(rcx); 2202 __ push(rcx); 2203 // fetch_unroll_info needs to call last_java_frame() 2204 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg); 2205 2206 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2207 2208 // Need to have an oopmap that tells fetch_unroll_info where to 2209 // find any register it might need. 2210 2211 oop_maps->add_gc_map( __ pc()-start, map); 2212 2213 // Discard args to fetch_unroll_info 2214 __ pop(rcx); 2215 __ pop(rcx); 2216 2217 __ get_thread(rcx); 2218 __ reset_last_Java_frame(rcx, false); 2219 2220 // Load UnrollBlock into EDI 2221 __ mov(rdi, rax); 2222 2223 // Move the unpack kind to a safe place in the UnrollBlock because 2224 // we are very short of registers 2225 2226 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset()); 2227 // retrieve the deopt kind from the UnrollBlock. 2228 __ movl(rax, unpack_kind); 2229 2230 Label noException; 2231 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? 2232 __ jcc(Assembler::notEqual, noException); 2233 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); 2234 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); 2235 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); 2236 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); 2237 2238 __ verify_oop(rax); 2239 2240 // Overwrite the result registers with the exception results. 2241 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2242 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2243 2244 __ bind(noException); 2245 2246 // Stack is back to only having register save data on the stack. 2247 // Now restore the result registers. Everything else is either dead or captured 2248 // in the vframeArray. 2249 2250 RegisterSaver::restore_result_registers(masm); 2251 2252 // Non standard control word may be leaked out through a safepoint blob, and we can 2253 // deopt at a poll point with the non standard control word. However, we should make 2254 // sure the control word is correct after restore_result_registers. 2255 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std())); 2256 2257 // All of the register save area has been popped of the stack. Only the 2258 // return address remains. 2259 2260 // Pop all the frames we must move/replace. 2261 // 2262 // Frame picture (youngest to oldest) 2263 // 1: self-frame (no frame link) 2264 // 2: deopting frame (no frame link) 2265 // 3: caller of deopting frame (could be compiled/interpreted). 2266 // 2267 // Note: by leaving the return address of self-frame on the stack 2268 // and using the size of frame 2 to adjust the stack 2269 // when we are done the return to frame 3 will still be on the stack. 2270 2271 // Pop deoptimized frame 2272 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset())); 2273 2274 // sp should be pointing at the return address to the caller (3) 2275 2276 // Pick up the initial fp we should save 2277 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2278 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset())); 2279 2280 #ifdef ASSERT 2281 // Compilers generate code that bang the stack by as much as the 2282 // interpreter would need. So this stack banging should never 2283 // trigger a fault. Verify that it does not on non product builds. 2284 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset())); 2285 __ bang_stack_size(rbx, rcx); 2286 #endif 2287 2288 // Load array of frame pcs into ECX 2289 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset())); 2290 2291 __ pop(rsi); // trash the old pc 2292 2293 // Load array of frame sizes into ESI 2294 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset())); 2295 2296 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset()); 2297 2298 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset())); 2299 __ movl(counter, rbx); 2300 2301 // Now adjust the caller's stack to make up for the extra locals 2302 // but record the original sp so that we can save it in the skeletal interpreter 2303 // frame and the stack walking of interpreter_sender will get the unextended sp 2304 // value and not the "real" sp value. 2305 2306 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset()); 2307 __ movptr(sp_temp, rsp); 2308 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset())); 2309 __ subptr(rsp, rbx); 2310 2311 // Push interpreter frames in a loop 2312 Label loop; 2313 __ bind(loop); 2314 __ movptr(rbx, Address(rsi, 0)); // Load frame size 2315 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand 2316 __ pushptr(Address(rcx, 0)); // save return address 2317 __ enter(); // save old & set new rbp, 2318 __ subptr(rsp, rbx); // Prolog! 2319 __ movptr(rbx, sp_temp); // sender's sp 2320 // This value is corrected by layout_activation_impl 2321 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); 2322 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable 2323 __ movptr(sp_temp, rsp); // pass to next frame 2324 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 2325 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 2326 __ decrementl(counter); // decrement counter 2327 __ jcc(Assembler::notZero, loop); 2328 __ pushptr(Address(rcx, 0)); // save final return address 2329 2330 // Re-push self-frame 2331 __ enter(); // save old & set new rbp, 2332 2333 // Return address and rbp, are in place 2334 // We'll push additional args later. Just allocate a full sized 2335 // register save area 2336 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); 2337 2338 // Restore frame locals after moving the frame 2339 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2340 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2341 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local 2342 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2343 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2344 2345 // Set up the args to unpack_frame 2346 2347 __ pushl(unpack_kind); // get the unpack_kind value 2348 __ get_thread(rcx); 2349 __ push(rcx); 2350 2351 // set last_Java_sp, last_Java_fp 2352 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg); 2353 2354 // Call C code. Need thread but NOT official VM entry 2355 // crud. We cannot block on this call, no GC can happen. Call should 2356 // restore return values to their stack-slots with the new SP. 2357 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2358 // Set an oopmap for the call site 2359 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); 2360 2361 // rax, contains the return result type 2362 __ push(rax); 2363 2364 __ get_thread(rcx); 2365 __ reset_last_Java_frame(rcx, false); 2366 2367 // Collect return values 2368 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); 2369 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); 2370 2371 // Clear floating point stack before returning to interpreter 2372 __ empty_FPU_stack(); 2373 2374 // Check if we should push the float or double return value. 2375 Label results_done, yes_double_value; 2376 __ cmpl(Address(rsp, 0), T_DOUBLE); 2377 __ jcc (Assembler::zero, yes_double_value); 2378 __ cmpl(Address(rsp, 0), T_FLOAT); 2379 __ jcc (Assembler::notZero, results_done); 2380 2381 // return float value as expected by interpreter 2382 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2383 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2384 __ jmp(results_done); 2385 2386 // return double value as expected by interpreter 2387 __ bind(yes_double_value); 2388 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2389 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2390 2391 __ bind(results_done); 2392 2393 // Pop self-frame. 2394 __ leave(); // Epilog! 2395 2396 // Jump to interpreter 2397 __ ret(0); 2398 2399 // ------------- 2400 // make sure all code is generated 2401 masm->flush(); 2402 2403 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2404 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2405 } 2406 2407 2408 #ifdef COMPILER2 2409 //------------------------------generate_uncommon_trap_blob-------------------- 2410 void SharedRuntime::generate_uncommon_trap_blob() { 2411 // allocate space for the code 2412 ResourceMark rm; 2413 // setup code generation tools 2414 CodeBuffer buffer("uncommon_trap_blob", 512, 512); 2415 MacroAssembler* masm = new MacroAssembler(&buffer); 2416 2417 enum frame_layout { 2418 arg0_off, // thread sp + 0 // Arg location for 2419 arg1_off, // unloaded_class_index sp + 1 // calling C 2420 arg2_off, // exec_mode sp + 2 2421 // The frame sender code expects that rbp will be in the "natural" place and 2422 // will override any oopMap setting for it. We must therefore force the layout 2423 // so that it agrees with the frame sender code. 2424 rbp_off, // callee saved register sp + 3 2425 return_off, // slot for return address sp + 4 2426 framesize 2427 }; 2428 2429 address start = __ pc(); 2430 2431 if (UseRTMLocking) { 2432 // Abort RTM transaction before possible nmethod deoptimization. 2433 __ xabort(0); 2434 } 2435 2436 // Push self-frame. 2437 __ subptr(rsp, return_off*wordSize); // Epilog! 2438 2439 // rbp, is an implicitly saved callee saved register (i.e. the calling 2440 // convention will save restore it in prolog/epilog) Other than that 2441 // there are no callee save registers no that adapter frames are gone. 2442 __ movptr(Address(rsp, rbp_off*wordSize), rbp); 2443 2444 // Clear the floating point exception stack 2445 __ empty_FPU_stack(); 2446 2447 // set last_Java_sp 2448 __ get_thread(rdx); 2449 __ set_last_Java_frame(rdx, noreg, noreg, nullptr, noreg); 2450 2451 // Call C code. Need thread but NOT official VM entry 2452 // crud. We cannot block on this call, no GC can happen. Call should 2453 // capture callee-saved registers as well as return values. 2454 __ movptr(Address(rsp, arg0_off*wordSize), rdx); 2455 // argument already in ECX 2456 __ movl(Address(rsp, arg1_off*wordSize),rcx); 2457 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap); 2458 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); 2459 2460 // Set an oopmap for the call site 2461 OopMapSet *oop_maps = new OopMapSet(); 2462 OopMap* map = new OopMap( framesize, 0 ); 2463 // No oopMap for rbp, it is known implicitly 2464 2465 oop_maps->add_gc_map( __ pc()-start, map); 2466 2467 __ get_thread(rcx); 2468 2469 __ reset_last_Java_frame(rcx, false); 2470 2471 // Load UnrollBlock into EDI 2472 __ movptr(rdi, rax); 2473 2474 #ifdef ASSERT 2475 { Label L; 2476 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset()), 2477 (int32_t)Deoptimization::Unpack_uncommon_trap); 2478 __ jcc(Assembler::equal, L); 2479 __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap"); 2480 __ bind(L); 2481 } 2482 #endif 2483 2484 // Pop all the frames we must move/replace. 2485 // 2486 // Frame picture (youngest to oldest) 2487 // 1: self-frame (no frame link) 2488 // 2: deopting frame (no frame link) 2489 // 3: caller of deopting frame (could be compiled/interpreted). 2490 2491 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. 2492 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! 2493 2494 // Pop deoptimized frame 2495 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset())); 2496 __ addptr(rsp, rcx); 2497 2498 // sp should be pointing at the return address to the caller (3) 2499 2500 // Pick up the initial fp we should save 2501 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2502 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset())); 2503 2504 #ifdef ASSERT 2505 // Compilers generate code that bang the stack by as much as the 2506 // interpreter would need. So this stack banging should never 2507 // trigger a fault. Verify that it does not on non product builds. 2508 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset())); 2509 __ bang_stack_size(rbx, rcx); 2510 #endif 2511 2512 // Load array of frame pcs into ECX 2513 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset())); 2514 2515 __ pop(rsi); // trash the pc 2516 2517 // Load array of frame sizes into ESI 2518 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset())); 2519 2520 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset()); 2521 2522 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset())); 2523 __ movl(counter, rbx); 2524 2525 // Now adjust the caller's stack to make up for the extra locals 2526 // but record the original sp so that we can save it in the skeletal interpreter 2527 // frame and the stack walking of interpreter_sender will get the unextended sp 2528 // value and not the "real" sp value. 2529 2530 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset()); 2531 __ movptr(sp_temp, rsp); 2532 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset())); 2533 __ subptr(rsp, rbx); 2534 2535 // Push interpreter frames in a loop 2536 Label loop; 2537 __ bind(loop); 2538 __ movptr(rbx, Address(rsi, 0)); // Load frame size 2539 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand 2540 __ pushptr(Address(rcx, 0)); // save return address 2541 __ enter(); // save old & set new rbp, 2542 __ subptr(rsp, rbx); // Prolog! 2543 __ movptr(rbx, sp_temp); // sender's sp 2544 // This value is corrected by layout_activation_impl 2545 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); 2546 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable 2547 __ movptr(sp_temp, rsp); // pass to next frame 2548 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 2549 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 2550 __ decrementl(counter); // decrement counter 2551 __ jcc(Assembler::notZero, loop); 2552 __ pushptr(Address(rcx, 0)); // save final return address 2553 2554 // Re-push self-frame 2555 __ enter(); // save old & set new rbp, 2556 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! 2557 2558 2559 // set last_Java_sp, last_Java_fp 2560 __ get_thread(rdi); 2561 __ set_last_Java_frame(rdi, noreg, rbp, nullptr, noreg); 2562 2563 // Call C code. Need thread but NOT official VM entry 2564 // crud. We cannot block on this call, no GC can happen. Call should 2565 // restore return values to their stack-slots with the new SP. 2566 __ movptr(Address(rsp,arg0_off*wordSize),rdi); 2567 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); 2568 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2569 // Set an oopmap for the call site 2570 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); 2571 2572 __ get_thread(rdi); 2573 __ reset_last_Java_frame(rdi, true); 2574 2575 // Pop self-frame. 2576 __ leave(); // Epilog! 2577 2578 // Jump to interpreter 2579 __ ret(0); 2580 2581 // ------------- 2582 // make sure all code is generated 2583 masm->flush(); 2584 2585 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); 2586 } 2587 #endif // COMPILER2 2588 2589 //------------------------------generate_handler_blob------ 2590 // 2591 // Generate a special Compile2Runtime blob that saves all registers, 2592 // setup oopmap, and calls safepoint code to stop the compiled code for 2593 // a safepoint. 2594 // 2595 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 2596 2597 // Account for thread arg in our frame 2598 const int additional_words = 1; 2599 int frame_size_in_words; 2600 2601 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2602 2603 ResourceMark rm; 2604 OopMapSet *oop_maps = new OopMapSet(); 2605 OopMap* map; 2606 2607 // allocate space for the code 2608 // setup code generation tools 2609 CodeBuffer buffer("handler_blob", 2048, 1024); 2610 MacroAssembler* masm = new MacroAssembler(&buffer); 2611 2612 const Register java_thread = rdi; // callee-saved for VC++ 2613 address start = __ pc(); 2614 address call_pc = nullptr; 2615 bool cause_return = (poll_type == POLL_AT_RETURN); 2616 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); 2617 2618 if (UseRTMLocking) { 2619 // Abort RTM transaction before calling runtime 2620 // because critical section will be large and will be 2621 // aborted anyway. Also nmethod could be deoptimized. 2622 __ xabort(0); 2623 } 2624 2625 // If cause_return is true we are at a poll_return and there is 2626 // the return address on the stack to the caller on the nmethod 2627 // that is safepoint. We can leave this return on the stack and 2628 // effectively complete the return and safepoint in the caller. 2629 // Otherwise we push space for a return address that the safepoint 2630 // handler will install later to make the stack walking sensible. 2631 if (!cause_return) 2632 __ push(rbx); // Make room for return address (or push it again) 2633 2634 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); 2635 2636 // The following is basically a call_VM. However, we need the precise 2637 // address of the call in order to generate an oopmap. Hence, we do all the 2638 // work ourselves. 2639 2640 // Push thread argument and setup last_Java_sp 2641 __ get_thread(java_thread); 2642 __ push(java_thread); 2643 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg); 2644 2645 // if this was not a poll_return then we need to correct the return address now. 2646 if (!cause_return) { 2647 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack. 2648 // Additionally, rbx is a callee saved register and we can look at it later to determine 2649 // if someone changed the return address for us! 2650 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset())); 2651 __ movptr(Address(rbp, wordSize), rbx); 2652 } 2653 2654 // do the call 2655 __ call(RuntimeAddress(call_ptr)); 2656 2657 // Set an oopmap for the call site. This oopmap will map all 2658 // oop-registers and debug-info registers as callee-saved. This 2659 // will allow deoptimization at this safepoint to find all possible 2660 // debug-info recordings, as well as let GC find all oops. 2661 2662 oop_maps->add_gc_map( __ pc() - start, map); 2663 2664 // Discard arg 2665 __ pop(rcx); 2666 2667 Label noException; 2668 2669 // Clear last_Java_sp again 2670 __ get_thread(java_thread); 2671 __ reset_last_Java_frame(java_thread, false); 2672 2673 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD); 2674 __ jcc(Assembler::equal, noException); 2675 2676 // Exception pending 2677 RegisterSaver::restore_live_registers(masm, save_vectors); 2678 2679 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2680 2681 __ bind(noException); 2682 2683 Label no_adjust, bail, not_special; 2684 if (!cause_return) { 2685 // If our stashed return pc was modified by the runtime we avoid touching it 2686 __ cmpptr(rbx, Address(rbp, wordSize)); 2687 __ jccb(Assembler::notEqual, no_adjust); 2688 2689 // Skip over the poll instruction. 2690 // See NativeInstruction::is_safepoint_poll() 2691 // Possible encodings: 2692 // 85 00 test %eax,(%rax) 2693 // 85 01 test %eax,(%rcx) 2694 // 85 02 test %eax,(%rdx) 2695 // 85 03 test %eax,(%rbx) 2696 // 85 06 test %eax,(%rsi) 2697 // 85 07 test %eax,(%rdi) 2698 // 2699 // 85 04 24 test %eax,(%rsp) 2700 // 85 45 00 test %eax,0x0(%rbp) 2701 2702 #ifdef ASSERT 2703 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below 2704 #endif 2705 // rsp/rbp base encoding takes 3 bytes with the following register values: 2706 // rsp 0x04 2707 // rbp 0x05 2708 __ movzbl(rcx, Address(rbx, 1)); 2709 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05 2710 __ subptr(rcx, 4); // looking for 0x00 .. 0x01 2711 __ cmpptr(rcx, 1); 2712 __ jcc(Assembler::above, not_special); 2713 __ addptr(rbx, 1); 2714 __ bind(not_special); 2715 #ifdef ASSERT 2716 // Verify the correct encoding of the poll we're about to skip. 2717 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl); 2718 __ jcc(Assembler::notEqual, bail); 2719 // Mask out the modrm bits 2720 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask); 2721 // rax encodes to 0, so if the bits are nonzero it's incorrect 2722 __ jcc(Assembler::notZero, bail); 2723 #endif 2724 // Adjust return pc forward to step over the safepoint poll instruction 2725 __ addptr(rbx, 2); 2726 __ movptr(Address(rbp, wordSize), rbx); 2727 } 2728 2729 __ bind(no_adjust); 2730 // Normal exit, register restoring and exit 2731 RegisterSaver::restore_live_registers(masm, save_vectors); 2732 2733 __ ret(0); 2734 2735 #ifdef ASSERT 2736 __ bind(bail); 2737 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 2738 #endif 2739 2740 // make sure all code is generated 2741 masm->flush(); 2742 2743 // Fill-out other meta info 2744 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2745 } 2746 2747 // 2748 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2749 // 2750 // Generate a stub that calls into vm to find out the proper destination 2751 // of a java call. All the argument registers are live at this point 2752 // but since this is generic code we don't know what they are and the caller 2753 // must do any gc of the args. 2754 // 2755 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 2756 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2757 2758 // allocate space for the code 2759 ResourceMark rm; 2760 2761 CodeBuffer buffer(name, 1000, 512); 2762 MacroAssembler* masm = new MacroAssembler(&buffer); 2763 2764 int frame_size_words; 2765 enum frame_layout { 2766 thread_off, 2767 extra_words }; 2768 2769 OopMapSet *oop_maps = new OopMapSet(); 2770 OopMap* map = nullptr; 2771 2772 int start = __ offset(); 2773 2774 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); 2775 2776 int frame_complete = __ offset(); 2777 2778 const Register thread = rdi; 2779 __ get_thread(rdi); 2780 2781 __ push(thread); 2782 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg); 2783 2784 __ call(RuntimeAddress(destination)); 2785 2786 2787 // Set an oopmap for the call site. 2788 // We need this not only for callee-saved registers, but also for volatile 2789 // registers that the compiler might be keeping live across a safepoint. 2790 2791 oop_maps->add_gc_map( __ offset() - start, map); 2792 2793 // rax, contains the address we are going to jump to assuming no exception got installed 2794 2795 __ addptr(rsp, wordSize); 2796 2797 // clear last_Java_sp 2798 __ reset_last_Java_frame(thread, true); 2799 // check for pending exceptions 2800 Label pending; 2801 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 2802 __ jcc(Assembler::notEqual, pending); 2803 2804 // get the returned Method* 2805 __ get_vm_result_2(rbx, thread); 2806 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); 2807 2808 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); 2809 2810 RegisterSaver::restore_live_registers(masm); 2811 2812 // We are back to the original state on entry and ready to go. 2813 2814 __ jmp(rax); 2815 2816 // Pending exception after the safepoint 2817 2818 __ bind(pending); 2819 2820 RegisterSaver::restore_live_registers(masm); 2821 2822 // exception pending => remove activation and forward to exception handler 2823 2824 __ get_thread(thread); 2825 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 2826 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); 2827 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2828 2829 // ------------- 2830 // make sure all code is generated 2831 masm->flush(); 2832 2833 // return the blob 2834 // frame_size_words or bytes?? 2835 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); 2836 }