4229 ins_pipe(ialu_reg_mem); // XXX
4230 %}
4231
4232
4233 // Load Klass Pointer
4234 instruct loadKlass(rRegP dst, memory mem)
4235 %{
4236 match(Set dst (LoadKlass mem));
4237
4238 ins_cost(125); // XXX
4239 format %{ "movq $dst, $mem\t# class" %}
4240 ins_encode %{
4241 __ movq($dst$$Register, $mem$$Address);
4242 %}
4243 ins_pipe(ialu_reg_mem); // XXX
4244 %}
4245
4246 // Load narrow Klass Pointer
4247 instruct loadNKlass(rRegN dst, memory mem)
4248 %{
4249 match(Set dst (LoadNKlass mem));
4250
4251 ins_cost(125); // XXX
4252 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4253 ins_encode %{
4254 __ movl($dst$$Register, $mem$$Address);
4255 %}
4256 ins_pipe(ialu_reg_mem); // XXX
4257 %}
4258
4259 // Load Float
4260 instruct loadF(regF dst, memory mem)
4261 %{
4262 match(Set dst (LoadF mem));
4263
4264 ins_cost(145); // XXX
4265 format %{ "movss $dst, $mem\t# float" %}
4266 ins_encode %{
4267 __ movflt($dst$$XMMRegister, $mem$$Address);
4268 %}
4269 ins_pipe(pipe_slow); // XXX
4270 %}
4271
4272 // Load Double
4273 instruct loadD_partial(regD dst, memory mem)
4274 %{
4275 predicate(!UseXmmLoadAndClearUpper);
4276 match(Set dst (LoadD mem));
4277
4278 ins_cost(145); // XXX
11576
11577 format %{ "cmpl $mem, $src\t# compressed ptr" %}
11578 ins_encode %{
11579 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant);
11580 %}
11581 ins_pipe(ialu_cr_reg_mem);
11582 %}
11583
11584 instruct compN_rReg_imm_klass(rFlagsRegU cr, rRegN op1, immNKlass op2) %{
11585 match(Set cr (CmpN op1 op2));
11586
11587 format %{ "cmpl $op1, $op2\t# compressed klass ptr" %}
11588 ins_encode %{
11589 __ cmp_narrow_klass($op1$$Register, (Klass*)$op2$$constant);
11590 %}
11591 ins_pipe(ialu_cr_reg_imm);
11592 %}
11593
11594 instruct compN_mem_imm_klass(rFlagsRegU cr, memory mem, immNKlass src)
11595 %{
11596 match(Set cr (CmpN src (LoadNKlass mem)));
11597
11598 format %{ "cmpl $mem, $src\t# compressed klass ptr" %}
11599 ins_encode %{
11600 __ cmp_narrow_klass($mem$$Address, (Klass*)$src$$constant);
11601 %}
11602 ins_pipe(ialu_cr_reg_mem);
11603 %}
11604
11605 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
11606 match(Set cr (CmpN src zero));
11607
11608 format %{ "testl $src, $src\t# compressed ptr" %}
11609 ins_encode %{ __ testl($src$$Register, $src$$Register); %}
11610 ins_pipe(ialu_cr_reg_imm);
11611 %}
11612
11613 instruct testN_mem(rFlagsReg cr, memory mem, immN0 zero)
11614 %{
11615 predicate(CompressedOops::base() != nullptr);
|
4229 ins_pipe(ialu_reg_mem); // XXX
4230 %}
4231
4232
4233 // Load Klass Pointer
4234 instruct loadKlass(rRegP dst, memory mem)
4235 %{
4236 match(Set dst (LoadKlass mem));
4237
4238 ins_cost(125); // XXX
4239 format %{ "movq $dst, $mem\t# class" %}
4240 ins_encode %{
4241 __ movq($dst$$Register, $mem$$Address);
4242 %}
4243 ins_pipe(ialu_reg_mem); // XXX
4244 %}
4245
4246 // Load narrow Klass Pointer
4247 instruct loadNKlass(rRegN dst, memory mem)
4248 %{
4249 predicate(!UseCompactObjectHeaders);
4250 match(Set dst (LoadNKlass mem));
4251
4252 ins_cost(125); // XXX
4253 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4254 ins_encode %{
4255 __ movl($dst$$Register, $mem$$Address);
4256 %}
4257 ins_pipe(ialu_reg_mem); // XXX
4258 %}
4259
4260 instruct loadNKlassCompactHeaders(rRegN dst, memory mem, rFlagsReg cr)
4261 %{
4262 predicate(UseCompactObjectHeaders);
4263 match(Set dst (LoadNKlass mem));
4264 effect(KILL cr);
4265 ins_cost(125); // XXX
4266 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4267 ins_encode %{
4268 Register index = $mem$$index != 4 ? $mem$$index$$Register : noreg;
4269 Address::ScaleFactor sf = (index != noreg) ? static_cast<Address::ScaleFactor>($mem$$scale) : Address::no_scale;
4270 __ load_nklass_compact_c2($dst$$Register, $mem$$base$$Register, index, sf, $mem$$disp);
4271 %}
4272 ins_pipe(pipe_slow); // XXX
4273 %}
4274
4275 // Load Float
4276 instruct loadF(regF dst, memory mem)
4277 %{
4278 match(Set dst (LoadF mem));
4279
4280 ins_cost(145); // XXX
4281 format %{ "movss $dst, $mem\t# float" %}
4282 ins_encode %{
4283 __ movflt($dst$$XMMRegister, $mem$$Address);
4284 %}
4285 ins_pipe(pipe_slow); // XXX
4286 %}
4287
4288 // Load Double
4289 instruct loadD_partial(regD dst, memory mem)
4290 %{
4291 predicate(!UseXmmLoadAndClearUpper);
4292 match(Set dst (LoadD mem));
4293
4294 ins_cost(145); // XXX
11592
11593 format %{ "cmpl $mem, $src\t# compressed ptr" %}
11594 ins_encode %{
11595 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant);
11596 %}
11597 ins_pipe(ialu_cr_reg_mem);
11598 %}
11599
11600 instruct compN_rReg_imm_klass(rFlagsRegU cr, rRegN op1, immNKlass op2) %{
11601 match(Set cr (CmpN op1 op2));
11602
11603 format %{ "cmpl $op1, $op2\t# compressed klass ptr" %}
11604 ins_encode %{
11605 __ cmp_narrow_klass($op1$$Register, (Klass*)$op2$$constant);
11606 %}
11607 ins_pipe(ialu_cr_reg_imm);
11608 %}
11609
11610 instruct compN_mem_imm_klass(rFlagsRegU cr, memory mem, immNKlass src)
11611 %{
11612 predicate(!UseCompactObjectHeaders);
11613 match(Set cr (CmpN src (LoadNKlass mem)));
11614
11615 format %{ "cmpl $mem, $src\t# compressed klass ptr" %}
11616 ins_encode %{
11617 __ cmp_narrow_klass($mem$$Address, (Klass*)$src$$constant);
11618 %}
11619 ins_pipe(ialu_cr_reg_mem);
11620 %}
11621
11622 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
11623 match(Set cr (CmpN src zero));
11624
11625 format %{ "testl $src, $src\t# compressed ptr" %}
11626 ins_encode %{ __ testl($src$$Register, $src$$Register); %}
11627 ins_pipe(ialu_cr_reg_imm);
11628 %}
11629
11630 instruct testN_mem(rFlagsReg cr, memory mem, immN0 zero)
11631 %{
11632 predicate(CompressedOops::base() != nullptr);
|