4242 ins_pipe(ialu_reg_mem); // XXX
4243 %}
4244
4245
4246 // Load Klass Pointer
4247 instruct loadKlass(rRegP dst, memory mem)
4248 %{
4249 match(Set dst (LoadKlass mem));
4250
4251 ins_cost(125); // XXX
4252 format %{ "movq $dst, $mem\t# class" %}
4253 ins_encode %{
4254 __ movq($dst$$Register, $mem$$Address);
4255 %}
4256 ins_pipe(ialu_reg_mem); // XXX
4257 %}
4258
4259 // Load narrow Klass Pointer
4260 instruct loadNKlass(rRegN dst, memory mem)
4261 %{
4262 match(Set dst (LoadNKlass mem));
4263
4264 ins_cost(125); // XXX
4265 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4266 ins_encode %{
4267 __ movl($dst$$Register, $mem$$Address);
4268 %}
4269 ins_pipe(ialu_reg_mem); // XXX
4270 %}
4271
4272 // Load Float
4273 instruct loadF(regF dst, memory mem)
4274 %{
4275 match(Set dst (LoadF mem));
4276
4277 ins_cost(145); // XXX
4278 format %{ "movss $dst, $mem\t# float" %}
4279 ins_encode %{
4280 __ movflt($dst$$XMMRegister, $mem$$Address);
4281 %}
4282 ins_pipe(pipe_slow); // XXX
4283 %}
4284
4285 // Load Double
4286 instruct loadD_partial(regD dst, memory mem)
4287 %{
4288 predicate(!UseXmmLoadAndClearUpper);
4289 match(Set dst (LoadD mem));
4290
4291 ins_cost(145); // XXX
11589
11590 format %{ "cmpl $mem, $src\t# compressed ptr" %}
11591 ins_encode %{
11592 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant);
11593 %}
11594 ins_pipe(ialu_cr_reg_mem);
11595 %}
11596
11597 instruct compN_rReg_imm_klass(rFlagsRegU cr, rRegN op1, immNKlass op2) %{
11598 match(Set cr (CmpN op1 op2));
11599
11600 format %{ "cmpl $op1, $op2\t# compressed klass ptr" %}
11601 ins_encode %{
11602 __ cmp_narrow_klass($op1$$Register, (Klass*)$op2$$constant);
11603 %}
11604 ins_pipe(ialu_cr_reg_imm);
11605 %}
11606
11607 instruct compN_mem_imm_klass(rFlagsRegU cr, memory mem, immNKlass src)
11608 %{
11609 match(Set cr (CmpN src (LoadNKlass mem)));
11610
11611 format %{ "cmpl $mem, $src\t# compressed klass ptr" %}
11612 ins_encode %{
11613 __ cmp_narrow_klass($mem$$Address, (Klass*)$src$$constant);
11614 %}
11615 ins_pipe(ialu_cr_reg_mem);
11616 %}
11617
11618 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
11619 match(Set cr (CmpN src zero));
11620
11621 format %{ "testl $src, $src\t# compressed ptr" %}
11622 ins_encode %{ __ testl($src$$Register, $src$$Register); %}
11623 ins_pipe(ialu_cr_reg_imm);
11624 %}
11625
11626 instruct testN_mem(rFlagsReg cr, memory mem, immN0 zero)
11627 %{
11628 predicate(CompressedOops::base() != nullptr);
|
4242 ins_pipe(ialu_reg_mem); // XXX
4243 %}
4244
4245
4246 // Load Klass Pointer
4247 instruct loadKlass(rRegP dst, memory mem)
4248 %{
4249 match(Set dst (LoadKlass mem));
4250
4251 ins_cost(125); // XXX
4252 format %{ "movq $dst, $mem\t# class" %}
4253 ins_encode %{
4254 __ movq($dst$$Register, $mem$$Address);
4255 %}
4256 ins_pipe(ialu_reg_mem); // XXX
4257 %}
4258
4259 // Load narrow Klass Pointer
4260 instruct loadNKlass(rRegN dst, memory mem)
4261 %{
4262 predicate(!UseCompactObjectHeaders);
4263 match(Set dst (LoadNKlass mem));
4264
4265 ins_cost(125); // XXX
4266 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4267 ins_encode %{
4268 __ movl($dst$$Register, $mem$$Address);
4269 %}
4270 ins_pipe(ialu_reg_mem); // XXX
4271 %}
4272
4273 instruct loadNKlassCompactHeaders(rRegN dst, memory mem, rFlagsReg cr)
4274 %{
4275 predicate(UseCompactObjectHeaders);
4276 match(Set dst (LoadNKlass mem));
4277 effect(KILL cr);
4278 ins_cost(125); // XXX
4279 format %{ "movl $dst, $mem\t# compressed klass ptr" %}
4280 ins_encode %{
4281 Register index = $mem$$index != 4 ? $mem$$index$$Register : noreg;
4282 Address::ScaleFactor sf = (index != noreg) ? static_cast<Address::ScaleFactor>($mem$$scale) : Address::no_scale;
4283 __ load_nklass_compact_c2($dst$$Register, $mem$$base$$Register, index, sf, $mem$$disp);
4284 %}
4285 ins_pipe(pipe_slow); // XXX
4286 %}
4287
4288 // Load Float
4289 instruct loadF(regF dst, memory mem)
4290 %{
4291 match(Set dst (LoadF mem));
4292
4293 ins_cost(145); // XXX
4294 format %{ "movss $dst, $mem\t# float" %}
4295 ins_encode %{
4296 __ movflt($dst$$XMMRegister, $mem$$Address);
4297 %}
4298 ins_pipe(pipe_slow); // XXX
4299 %}
4300
4301 // Load Double
4302 instruct loadD_partial(regD dst, memory mem)
4303 %{
4304 predicate(!UseXmmLoadAndClearUpper);
4305 match(Set dst (LoadD mem));
4306
4307 ins_cost(145); // XXX
11605
11606 format %{ "cmpl $mem, $src\t# compressed ptr" %}
11607 ins_encode %{
11608 __ cmp_narrow_oop($mem$$Address, (jobject)$src$$constant);
11609 %}
11610 ins_pipe(ialu_cr_reg_mem);
11611 %}
11612
11613 instruct compN_rReg_imm_klass(rFlagsRegU cr, rRegN op1, immNKlass op2) %{
11614 match(Set cr (CmpN op1 op2));
11615
11616 format %{ "cmpl $op1, $op2\t# compressed klass ptr" %}
11617 ins_encode %{
11618 __ cmp_narrow_klass($op1$$Register, (Klass*)$op2$$constant);
11619 %}
11620 ins_pipe(ialu_cr_reg_imm);
11621 %}
11622
11623 instruct compN_mem_imm_klass(rFlagsRegU cr, memory mem, immNKlass src)
11624 %{
11625 predicate(!UseCompactObjectHeaders);
11626 match(Set cr (CmpN src (LoadNKlass mem)));
11627
11628 format %{ "cmpl $mem, $src\t# compressed klass ptr" %}
11629 ins_encode %{
11630 __ cmp_narrow_klass($mem$$Address, (Klass*)$src$$constant);
11631 %}
11632 ins_pipe(ialu_cr_reg_mem);
11633 %}
11634
11635 instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
11636 match(Set cr (CmpN src zero));
11637
11638 format %{ "testl $src, $src\t# compressed ptr" %}
11639 ins_encode %{ __ testl($src$$Register, $src$$Register); %}
11640 ins_pipe(ialu_cr_reg_imm);
11641 %}
11642
11643 instruct testN_mem(rFlagsReg cr, memory mem, immN0 zero)
11644 %{
11645 predicate(CompressedOops::base() != nullptr);
|